A Novel Three-Phase Six-Switch PFC Rectifier with Zero-Voltage

energies

Article A Novel Three-Phase Six-Switch PFC Rectiﬁer with Zero-Voltage-Switching and Zero-Current-Switching Features

Chun-Wei Lin 1,*, Chang-Yi Peng 2 and Huang-Jen Chiu 1

1 Department of Electronic and Computer Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan; [email protected] 2 Department of Electrical Engineering, Chung-Yuan Christian University, Taoyuan 32023, Taiwan; [email protected] * Correspondence: [email protected]; Tel.: +886-937-880-025

Received: 18 March 2019; Accepted: 19 March 2019; Published: 22 March 2019

Abstract: A novel three-phase power-factor-correction (PFC) rectifier with zero-voltage-switching (ZVS) in six main switches and zero-current-switching (ZCS) in the auxiliary switch is proposed, analyzed, and experimentally verified. The main feature of the proposed auxiliary circuit is used to reduce the switching loss when the six main switches are turned on and the one auxiliary switch is turned off. In this paper, a detailed operating analysis of the proposed circuit is given. Modeling and analysis are verified by experimental results based on a three-phase 7 kW rectifier. The soft-switched PFC rectifier shows an improvement in efficiency of 2.25% compared to its hard-switched counterpart at 220 V under full load.

Keywords: three-phase rectiﬁer; PFC; switch-mode rectiﬁer; ZVS; ZCS

1. Introduction Power electronic converters play a critical role in the energy industry due to their ability to optimally control and condition the power they deliver to a load. In addition, they are required to control and condition the power they draw from energy sources to support their optimal operation. This is achieved by compliance to EMI and harmonic standards such as EN6100-3-2 and efficiency standards such as 80Plus [1]. Soft-switching technologies are a primary enabler for improving efficiency by minimizing switching losses and reducing EMI and harmonics by “soft” ending the edges of the switching transitions [2–12]. References [8] and [9] report soft-switching techniques that includes zero-voltage-switching (ZVS) and zero-current-switching (ZCS). Three-phase rectifiers with active power-factor-correction (PFC) control achieve an improved power factor and lower harmonic content [10–13]. Active PFC rectifiers using a boost (current source) front end achieve better input current wave-shaping and lower harmonic distortion compared to their buck-derived counterparts [14]. Three single-phase PFC rectifiers are used in [15] to synthesize a three-phase PFC rectifier. Reference [16] reports the use of space vector modulation (SVM) to achieve a high power factor in a three-phase six-switch rectifier. Soft-switching techniques employed in three-phase rectifiers are reported in [17–19] to improve efficiency and EMI performance. Soft-switching using a passive lossless snubber is presented in [17]. Although this approach can improve the efficiency, the circuit suffers from higher component stress. In [18], an active snubber is used to achieve soft-switching at the expense of higher control complexity and switching stress in the auxiliary switch. In [19–22], the zero-voltage-transition and control technique was applied in a three-phase PFC rectifier. Although the main switches can achieve ZVS at turn-on, the auxiliary switch was hard-switched operated at turn-off.

Energies 2019, 12, 1119; doi:10.3390/en12061119 www.mdpi.com/journal/energies Energies 2019, 12, 1119 2 of 12

A conventional three-phase six-switch PFC rectifier is shown in Figure1. A novel soft-switched AA conventional conventional three-phase three-phase six-switch six-switch PFC PFC rectifier rectifier is is shown shown in in Figure Figure 1. 1. A A novel novel soft-switched soft-switched three-phase active rectifier using an active auxiliary circuit is proposed in this paper. The principal three-phasethree-phase activeactive rectifierrectifier using using anan active active auxiliaryauxiliary circuitcircuit isis proposedproposed inin thisthis paper.paper. TheThe principalprincipal performance improvement is the achievement of ZVS at turn-on for the six rectifier switches and performanceperformance improvement improvement is is the the achievement achievement of of ZVS ZVS at at turn-on turn-on for for the the six six re rectifierctifier switches switches and and ZCS ZCS ZCS at turn-off for the one auxiliary switch. A detailed description of the operation of the proposed atat turn-off turn-off for for the the one one auxiliary auxiliary switch. switch. A A detailed detailed description description of of the the operatio operationn of of the the proposed proposed soft- soft- soft-switched rectifier is presented in Section2. Validation of the design through simulation and switchedswitched rectifierrectifier isis presentedpresented inin SectionSection 2.2. ValidationValidation ofof thethe designdesign throughthrough simulationsimulation andand experimental results are shown in Section3 followed by concluding remarks in Section4. experimentalexperimental results results are are shown shown in in Section Section 3 3 followed followed by by concluding concluding remarks remarks in in Section Section 4. 4.

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FigureFigure 1 1.1. .A A conventional conventional three-phase three-phase six-switch six-switch power-factor-correction power-factor-correction (PFC) (PFC) rectifier.rectifier. rectifier. 2. Proposed Three-Phase Six-Switch Soft-switching PFC Rectifier 2.2. Proposed Proposed Three-Phase Three-Phase Six-Switch Six-Switch Soft-switching Soft-switching PFC PFC Rectifier Rectifier The proposed three-phase six-switch soft-switching PFC rectifier is shown in Figure2. The circuit TheThe proposedproposed three-phasethree-phase six-switchsix-switch soft-switchisoft-switchingng PFCPFC rectifierrectifier isis shownshown inin FigureFigure 2.2. TheThe inside the dotted box is a soft-switching assist circuit to achieve ZVS in the main switches and ZCS in the circuitcircuit inside inside the the dotted dotted box box is is a a soft-switching soft-switching assist assist circuit circuit to to achieve achieve ZVS ZVS in in the the main main switches switches and and auxiliary switch. The soft-switching assist circuit consists of the auxiliary switch SA, resonant inductor ZCSZCS inin thethe auxiliaryauxiliary switch.switch. TheThe soft-switchingsoft-switching assistassist circuitcircuit consistsconsists ofof thethe auxiliaryauxiliary switchswitch SSAA, , LR, transformer Tr, barrier diode DR1, clamp circuit RC–DC–CC, and resonant capacitor (the capacitance resonantresonant inductorinductor LLRR, , transformertransformer TTr,r , barrierbarrier diodediode DDR1R1, , clampclamp circuitcircuit RRCC–D–DCC–C–CCC, , andand resonantresonant employs the parasitic capacitance of main switch). capacitorcapacitor (the (the capacitance capacitance employs employs the the pa parasiticrasitic capacitance capacitance of of main main switch). switch).

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Figure 2. The circuit of the proposed soft-switching PFC rectiﬁer. FigureFigure 2. 2. The The circuit circuit of of the the proposed proposed soft-switching soft-switching PFC PFC rectifier. rectifier.

Three phase line voltages VRN, VSN, VTN for a balanced three-phase system are shown in Figure3. ThreeThree phase phase line line voltages voltages V VRNRN, ,V VSNSN, ,V VTNTN for for a a balanced balanced three-phase three-phase system system are are shown shown in in Figure Figure The 60◦ symmetry in the three-phase voltages is evident from Figure3. The operation of the three-phase 3.3. The The 60 60°° symmetry symmetry in in the the three-phase three-phase voltages voltages is is eviden evidentt from from Figure Figure 3. 3. The The operation operation of of the the threethree- PFC using the 60◦ symmetry is described in detail in [11]. phasephase PFC PFC using using the the 60 60°° symmetry symmetry is is described described in in detail detail in in [11]. [11].

22 Energies 2019, 12, 1119 3 of 12

0 ωt

Figure 3. The line cycle in three-phase balance power system. Figure 3. The line cycle in three-phase balance power system. In orderIn order to simplify to simplify theFigure analysis, the 3. analysis, The lineInterval cycle Interval in1 three-ph(0°–60°) 1 (0◦ase –60can balance◦ )be can selected power be selected system.for the for analysis the analysis of the of the switchingswitching cycles cycles as the as operation the operation over overthe rectifier the rectifier is identical is identical in the in other the other60° segments. 60◦ segments. The following The following In order to simplify the analysis, Interval 1 (0°–60°) can be selected for the analysis of the assumptionsassumptions are made are made to support to support the operating the operating analysis: analysis: switching cycles as the operation over the rectifier is identical in the other 60° segments. The following (1) Input inductance LB is large enough to allow the input current to be considered as a current assumptions are made to support the operating analysis: (1)sourceInput over inductance a switchingL period;B is large enough to allow the input current to be considered as a current source(1) Input over inductance a switching LB is period; large enough to allow the input current to be considered as a current (2) Input capacitance CL is large enough to be equivalent to the ideal voltage source VO; and source over a switching period; (2)(3) TheInput output capacitance capacitanceCL is of large the clamp enough circuit to be C equivalentC is large enough to the idealto allow voltage its voltage source VVC Oto; andbe (2) Input capacitance CL is large enough to be equivalent to the ideal voltage source VO; and (3)consideredThe output a voltage capacitance source over of the a switching clamp circuit period.CC is large enough to allow its voltage VC to be (3) The output capacitance of the clamp circuit CC is large enough to allow its voltage VC to be Underconsidered the assumptions a voltage listed source abov overe, the a switchingsimplified period.circuit diagram is shown in Figure 4 and the considered a voltage source over a switching period. voltage polarity and current direction for each main component are defined. UnderUnder the the assumptions assumptions listedlisted above,above, thethe simplifiedsimplified circuit diagram is is shown shown in in Figure Figure 4 and the the voltagevoltage polarity polarity and and current current directiondirection forfor eacheach mainmain componentcomponent areare defined.defined.

Figure 4. The simplified circuit of the proposed soft-switched rectifier.

A detailed descriptionFigureFigure of 4.circuit4. TheThe simpliﬁedsimplified operation circuit is provided of the proposed in this section. soft-switched The key rectifier. rectiﬁer. waveforms of the circuit for Interval 1 are shown in Figure 5, and equivalent circuits for each operating mode are shown AA detaileddetailed descriptiondescription ofof circuitcircuit operationoperation is provided in this section. The The key key waveforms waveforms of of the the in Figure 6. There are 12 operating modes to be analyzed over a switching cycle. circuitcircuit for for Interval Interval 1 1 are are shownshown inin FigureFigure5 5,, and and equivalentequivalent circuitscircuits forfor each operating mode are shown shown in Figure 6. There are 12 operating modes to be analyzed over a switching cycle. 2.1. Modein Figure 0: (t6 .≦ There T0) are 12 operating modes to be analyzed over a switching cycle.

2.1.This2.1. Mode Modemode 0: 0: is (t(t based5 ≦T 0T)0 on) the analysis of the switching cycle in Interval 1 (VRN > 0, VTN > 0, and VSN < 0). Before T0, as in Figure 6a, the diode D1, D6, and D5 are in the state of conduction. The main ThisThis mode mode isis basedbased onon the analysis of of the the switching switching cycle cycle in in Interval Interval 1 ( 1V (RNV RN> 0,> V 0,TNV >TN 0, and> 0, V andSN switches S1 to S6 and auxiliary switch SA are turned off. The currents iR and iT flow through diode DB V

3 Energies 2019, 12, 1119 4 of 12

Figure 5. The key waveforms of the proposed soft-switched rectifier. Figure 5. The key waveforms of the proposed soft-switched rectifier. 2.2. Mode 1 (T0 < t 5 T1) 2.2. Mode 1 (T0 < t ≦ T1) At T0, the auxiliary switch SA is turned on to go into Mode 1. The current i1 of resonant inductor LR startsAt to T0 increase,, the auxiliary and currentswitch Si1A isflows turned through on to go the into primary Mode winding 1. The currentN1 of i the1 of resonant transformer inductorTr. TheLRinduced starts to currentincrease,i2 andand current excitation i1 flows current throughim outflow the primary through winding secondary N1 of coilthe transformerN2, as shown Tr. in The Figureinduced6b. The current voltage i2 and on theexcitation seconding current winding im outflowN2 is the through output secondary voltage V Ocoil. The N2, voltage as shownV1 andin FigureV2 across6b. The the windingsvoltage on of the transformer secondingT windingr are obtained N2 is the as follows: output voltage VO. The voltage V1 and V2 across the windings of transformer Tr are obtained as follows: V = V (1) 2 =O VV2 O (1) N1 V1 = V2 = nVO (2) N N1 VVnV==2 (2) 12N O The current in the resonant inductor i1 increases linearly2 with the slope given by

The current in the resonant inductor i1 increases linearly with the slope given by di1 VO − V1 VO − nVO VO = −−= = (1 − n) (3) dt di1LR VVVnVOOOO1 LR VLR == =−(1n ) (3) dt L L L R RR Similarly to i1, the excitation current im also displays a linear increase, and the slope is Similarly to i1, the excitation current im also displays a linear increase, and the slope is di V m = O (4) dt dimOLm V = (4) dt Lm

When the current i1 ascends to iS current, this mode ends. The time interval is given as below:

4 Energies 2019, 12, 1119 5 of 12

When the current i1 ascends to iS current, this mode ends. The time interval is given as below:

is t01 =is (5) t = Vo(1 − n)LR 01 − (5) VnLoR(1 )

ib iRR il il S1 S3 S5 S1 S3 S5 S1 S3 S5 iR + iR + iR + i2 i2 iS − + iS − + iS − + N + VC − VO N im + VC − VON im + VC − VO iT − iT − iT − ia ia

S4 S6 S2 SA S4 S6 S2 SA S4 S6 S2 SA

(a) Mode 0 (b) Mode 1 (c)Mode 2

iRR il il il S1 S3 S5 S1 S3 S5 S1 S3 S5 iR + iR + iR + i2 i2 i2 iS − + iS − + iS − + N im + VC − VO N im + VC − VO N im + VC − VO iT − iT − iT − ia ia ia S4 S6 S2 SA S4 S6 S2 SA S4 S6 S2 SA

(d)Mode 3 (e) Mode 4 (f)Mode 5

S1 S3 S5 S1 S3 S5 S1 S3 S5 iR + iR + iR + iS − + iS − + iS − + N im + VC − VO N im + VC − VO N im + VC − VO iT − iT − iT − ia ia

S4 S6 S2 SA S4 S6 S2 SA S4 S6 S2 SA

(g) Mode 6 (h) Mode 7 (i) Mode 8

S1 S3 S5 S1 S3 S5 S1 S3 S5 iR + iR + iR + iS − + iS − + iS − + N + VC − VO N + VC − VO N + VC − VO iT − iT − iT −

S4 S6 S2 SA S4 S6 S2 SA S4 S6 S2 SA

(j) Mode 9 (k) Mode 10 (l)Mode 11

S1 S3 S5 iR + iS − + N + VC − VO iT −

S4 S6 S2 SA

(m) Mode 12

Figure 6. Operation modes of the proposed soft-switched rectiﬁer. Figure 6. Operation modes of the proposed soft-switched rectifier.

2.3. Mode 2 (T1 < t 5 T2) 2.3. Mode 2 (T1 < t ≦ T2) At t = T1, the DC link diode current ib reaches zero. The reverse recovery current of diode DB ﬂows At t ＝ T1, the DC link diode current ib reaches zero. The reverse recovery current of diode DB through diode DB in a negative direction. The resonant inductor current keeps increasing, as shown in flowsFigure through6c. diode DB in a negative direction. The resonant inductor current keeps increasing, as shown in Figure 6c. 2.4. Mode 3 (T2 < t 5 T3) 2.4. Mode 3 (T2 < t ≦ T3) At t = T2, the parasitic capacitance of diode Db along with the resonant capacitor CR, which ＝ Atincludes t T the2, the parasitic parasitic capacitor capacitance of the of main diode switches Db along and with the the resonant resonant inductor capacitorLR, startCR, which resonating, as includes the parasitic capacitor of the main switches and the resonant inductor LR, start resonating, as shown in Figure 6d. When the equivalent voltage VX of the main switch is decreased to zero at t ＝ T3, the mode ends. The equivalent voltage VX and resonant current i1 are shown in Equations (6) and (7).

5 Energies 2019, 12, 1119 6 of 12

shown in Figure6d. When the equivalent voltage VX of the main switch is decreased to zero at t = T3, the mode ends. The equivalent voltage VX and resonant current i1 are shown in Equations (6) and (7).

VX = VO − (1 − n)VO(1 − cos(ωRt)) (6)

(1 − n)VO i1 = is + iRR + sin(ωRt) (7) ZC

CR = C2 + C3 + C4 (8) 1 ωR = p (9) LR(CR + Cb) s LR ZC = (10) CR + Cb

2.5. Mode 4: (T3 < t 5 T4)

When t > T3, the bridge rectiﬁer voltage VX is decreased to zero and the auxiliary switch SA continues to conduct. The corresponding equivalent circuit is shown in Figure6e. The body diodes D4, D3, and D2 of the main switches S4, S3, and S2 are conducting. Turning on the main switches S4, S6, and S2 when the bridge voltage reaches zero achieves ZVS turn-on. The detection circuitry to turn on the main switches at zero voltage also enables the minimization of duty-cycle loss and, thus, loss of efﬁciency. After the main switches turn on at ZVS, the resonant inductor current i1 decreases linearly with the slope given by Equation (11). When the current of the main switches S4 and S2 reaches zero at t = T4, the mode ends. di nV 1 = − O (11) dt LR

2.6. Mode 5: (T4 < t 5 T5)

As shown in Figure6f, when t > T4, then S4, S6, and S2 keep conducting. The current il is continuously decreased to zero until t = T5.

2.7. Mode 6: (T5 < t 5 T6)

When t > T5, the input currents iR and iT ﬂow through the main switches S4 and S2, as shown in Figure6g. When the current ia ﬂows through the auxiliary switch SA, it consists mostly of the magnetizing current, im, of the transformer. If the magnetizing inductance Lm is designed to be relatively large, the current ia of the auxiliary switch SA is extremely close to zero. When T5 < t 5 T6, the auxiliary switch is set to be turned off so that it can effectively achieve the purpose of ZCS.

2.8. Mode 7: (T6 < t 5 T7)

When t = T6, the auxiliary switch SA is turned off, as shown in Figure6h. Subsequently, the magnetizing current im of the transformer charges the parasitic capacitance Coss1 of the auxiliary switch SA so that the auxiliary switch voltage will increase continuously.

2.9. Mode 8: (T7 5 t 5 T8)

At t = T7, the auxiliary switch voltage VSA increases to VO + VC and the clamp diode DC is conducting. The magnetizing current im discharges through the clamp circuit DC–VC, as shown in Figure6i. The slope of the excitation current in this mode is given by

di V m = − C (12) dt Lm Energies 2019, 12, 1119 7 of 12

2.10. Mode 10: (T8 5 t 5 T9)

At t = T8, the magnetizing current im is decreased to zero which resets the transformer, as shown in Figure6j. 2.10. Mode 10: (T8 ≦ t ≦ T9) ＝ 2.11. ModeAt 10: t (T T9 8<, the t 5 magnetizingT10) current im is decreased to zero which resets the transformer, as shown in Figure 6j. At t = T9, the main switch S4 is turned off. The input current iR charges the parasitic capacitance of the2.11. main Mode switch 10: (TS9 <4 tand ≦ T the10) equivalent voltage VX of the main switch is increased, as shown in Figure6k. At t ＝ T9, the main switch S4 is turned off. The input current iR charges the parasitic capacitance of the main switch S4 and the equivalent voltage VX of the main switch is increased, as shown in Figure 2.12. Mode 11: (T t T ) 6k. 10 5 5 11 At t = T10, the equivalent voltage VX of the main switch is increased to VO and the diode DB is 2.12. Mode 11: (T10 ≦ t ≦ T11) conducting as shown in Figure6l. Subsequently, the antiparallel diode D1 of the main switch S1 is conducting.At t The＝ T input10, the currentequivalentiR voltageflowsthrough VX of the diodesmain switchD1 and is increasedDB and to flows VO and back the from diodeiS DthroughB is the load.conducting as shown in Figure 6l. Subsequently, the antiparallel diode D1 of the main switch S1 is conducting. The input current iR flows through diodes D1 and DB and flows back from iS through the 2.13.load. Mode 12: (T11 5 t 5 T12) t T S i At2.13. =Mode11 ,12: the (T main11 ≦ t switch≦ T12) 2 is turned off. The input current T starts to charge the parasitic capacitance of the main switch S2, as shown in Figure6m. At t ＝ T11, the main switch S2 is turned off. The input current iT starts to charge the parasitic 3. Experimentalcapacitance of Verifications the main switch S2, as shown in Figure 6m.

Based3. Experimental on the design Verifications described, a prototype was built. When the line voltage in the three-phase input wasBased 220 V, on namely, the design the described, phase voltage a prototype was 127 was V, built. the switching When the frequencyline voltage 40 in kHz, the three-phase and the output load 7input kW, was then 220V, the namely, measured the phase waveforms voltage forwas three-phase 127V, the switching VRN,V frequencySN,VTN, 40kHz, line voltage and the and output the line currentload were 7kW, at then low the line measured and full load.waveforms The current for three-phase waveform, VRN, as V inSN, FigureVTN , line7, isvoltage practically and the sinusoidal line with lowcurrent THD were and at low a high line power and full factor load. The (the current A-THD waveform, is shown as in in Figure Figure8 7, and is practically power factor sinusoidal is shown in Figurewith9 low). THD and a high power factor (the A-THD is shown in Figure 8 and power factor is shown in Figure 9).

FigureFigure 7. Measured 7. Measured waveforms waveforms of of inputinput voltag voltagee and and input input current current at full at full load. load. 7 Energies 2019, 12, 1119 8 of 12

Figure 8. A-THD measured results. Figure 8. A-THD measured results.

Figure 9. PowePowerr factor m measuredeasured results. Figure 9. Power factor measured results.

Figure 10 shows the simulationFigure waveforms 9. Power factor using m Isspiceeasured atresults. half load and full load. It can be seen Figure 10 shows the simulation waveforms using Isspice at half load and full load. It can be seen that the main switches S4 and S2 onon the the bottom sides turned on when their VX waswas down down to to zero zero by that the main switches S4 and S2 on the bottom sides turned on when their VX was down to zero by the resona resonantFigurent 10 circuit, shows after the simulation the auxiliary waveforms switch SA using was turned Isspice on. at half load and full load. It can be seen the resonant circuit, after the auxiliary switch SA was turned on. that theMeasured main switches waveforms S4 and of the S2 ongate the drive bottom signals sides an and turnedd voltage on across when theirthe main VX was switch down are to shown zero by in Measured waveforms of the gate drive signals and voltage across the main switch are shown in theFigure resona 11.11. nt The circuit, captured after waveforms the auxiliary indicate switch the theSA was need turned to turn on. on the auxiliaryauxiliary switchswitch SA before the Figure 11. The captured waveforms indicate the need to turn on the auxiliary switch SA before the turningMeasured on the main waveforms switches of theS4 andand gateSS 2drive2 toto achieve achieve signals ZVS. ZVS. and voltage across the main switch are shown in turning on the main switches S4 and S2 to achieve ZVS. FigureAs 11. shown The in captured Figure 12,12waveforms, when the indicate current i1theofof resonantneed resonant to turninductor inductor on the LR decreasesauxiliarydecreases switchto to zero, zero, S the theA before auxiliary auxiliary the As shown in Figure 12, when the current i1 of resonant inductor LR decreases to zero, the auxiliary turningswitch S onA cancan the be bemain turned turned switches off off under under S4 and ZCS ZCSS2 conditions.to conditions. achieve ZVS. switch SA can be turned off under ZCS conditions. As shown in Figure 12, when the current i1 of resonant inductor LR decreases to zero, the auxiliary S S switch SA can be turnedA off under ZCS conditions. A S A S A S S S4 S4 S A 4 S A 4

S2 S2 S2 S2 S4 S4

vx S2 vx S2 vx vx

vx vx

il il

il il il

(a) (b) (a) (b)

Figure 10. Simulation of key waveforms of the main switch voltage VX and current il at (a) half load FigureFigure 10.10. SimulationSimulation(a ofof) keykey waveformswaveforms ofof thethe mainmain switchswitch voltagevoltageV VXX andand currentcurrent(b) iill atat ((aa)) halfhalf loadload and (b) full load. andand ((bb)) fullfull load.load. Figure 10. Simulation of key waveforms of the main switch voltage VX and current il at (a) half load and (b) full load. 8 8 8 Energies 2019, 12, 1119 9 of 12

Figure 11. 11. MeasuredMeasured waveforms waveforms of drive of signal drive and signal voltag ande for voltage the main for switch the main of the switch soft-switched of the rectifier.soft-switched rectiﬁer.

Figure 12. 12. MeasuredMeasured waveforms waveforms of of drive drive signal signal and and resona resonantnt current current for the for main the main switch switch of the of soft- the switchedsoft-switched rectifier. rectiﬁer.

A comparison betweenbetween thethe hard-switchedhard-switched and and proposed proposed soft-switched soft-switched rectifier rectifier was was performed performed at ata loada load of of 7 kW7kW over over an an input input voltage voltage range range of of 190–250 190–250V. V. TheThe hard-switchedhard-switched rectifierrectifier was tested by simply disablingdisabling thethe soft-switchsoft-switch assist assist circuitry. circuitry. Figure Figure 13 13 shows shows the the efficiency efficiency improvement improvement from from the thesoft-switched soft-switched rectifier. rectifier. The largestThe largestlargest efficiency efficiencyefficiency difference differencedifference between bebe hard-switchtween hard-switch and soft-switch and soft-switch rectifier rectifierwas 2.55% was when 2.55% the when input the line input voltage line wasvoltage 220 was V, and 220V, Figure and 14 Figure shows 14 the shows soft-switched the soft-switched rectifier rectifierefficiency efficiency from 1–7 from kW. 1–7kW.

9 Energies 2019, 12, 1119 10 of 12

Figure 13. The efficiency comparison between hard-switching and soft-switching rectifier at 7 kW Figureload. 13.13. TheThe efﬁciencyefficiency comparison comparison between between hard-switching hard-switching and and soft-switching soft-switching rectiﬁer rectifier at 7 kWat 7 load. kW load.

Figure 14. MeasuredMeasured efficiency efficiency from 1 to 7 kW with the soft-switched rectifier.rectifier. Figure 14. Measured efficiency from 1 to 7 kW with the soft-switched rectifier. 4. Conclusions 4. Conclusions A novel three-phasethree-phase rectifierrectifier withwith zero-voltage-switchingzero-voltage-switching andand zero-current-switchingzero-current-switching features was proposed.A novel three-phase The design rectifier has been with validated zero-voltage-s with simulationwitching andand experimentalexperimentzero-current-switchingal data captured features on a was77kW kW proposed. three-phase three-phase The rectifier rectifier design prototype. has been validated Efficiency Efficiency with improvement simulation between and experiment hard-switchal data and captured soft-switch on a 7kWrectifiersrectifiers three-phase peaks at rectifier2.55% when when prototype. the the input input Efficiency line line voltage voltage improvement is is 220V 220 Vat between at full full load. load. hard-switch Mathematical Mathematical and equations soft-switch equations to rectifierstoexplain explain circuit peaks circuit operation at operation2.55% whenhave have beenthe been input derived derived line and voltage and analyzed analyzed is 220V under at under full a sequence load. a sequence Mathematical of operating of operating equations modes. modes. The to Theexplainexperimental experimental circuit results operation results have havehave confirmed confirmedbeen derived the the proposed proposedand analyzed design design under of of the the a soft-switched sequence soft-switched of operating rectifier rectifier in inmodes. achieving The experimentalhigh efficiency,efficiency, results highhigh powerpowerhave confirmed factor,factor, andand the lowlow proposed THD.THD. design of the soft-switched rectifier in achieving high efficiency, high power factor, and low THD. Author Contributions: Contributions:C.-W.L. C.-W.L. and C.-Y.P.and C.-Y.P. designed, designed, debugged debugged the system, the built system, some partbuilt of some hardware part and of performedAuthorhardware Contributions: theand experiment. performed C.-W.L.C.-W.L. the experiment. also and mainly C.-Y.P. responsible Chun-Wei designed, for Lin preparing debugged also mainly the paper.the responsible system, H.-J.C., supervisedbuilt for preparingsome the part design, the of analysis, experiment, and editing the paper. hardwarepaper. H.-J.C., and supervisedperformed the design,experiment. anal ysis,Chun-Wei experiment, Lin also and mainly editing responsible the paper. for preparing the paper.Funding: H.-J.C.,The authors supervised would likethe design, to acknowledge analysis, the experiment, financial support and ofediting the Ministry the paper. of Science and Technology ofFunding: Taiwan throughThe authors grant would number like NSC to 103-2221-E-011 acknowledge -064 the -MY3.financial support of the Ministry of Science and Funding:ConflictsTechnology of The Interest: of authors TaiwanThe would through authors like declare grant to acknowledge nonumber conflict NSC of the interest. 103-2221-E-011 financial support -064 of -MY3. the Ministry of Science and Technology of Taiwan through grant number NSC 103-2221-E-011 -064 -MY3. Conflicts of Interest: The authors declare no conflict of interest. Conflicts of Interest: The authors declare no conflict of interest. References References 10 10 Energies 2019, 12, 1119 11 of 12

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