User’s Manual User’s

ISL8024DEMO2Z A Power Module for Xilinx RFSoC Applications Demonstration Board

Industrial Analog and Power

Rev.1.00 Mar 2019 USER’S MANUAL

ISL8024DEMO2Z UG187 Demonstration Board Rev.1.00 Mar 5, 2019

1. Overview The ISL8024DEMO2Z is a low-noise power module to power the high-speed data converters on Xilinx RFSoCs. It is used as a power module that plugs into an application board.

1.1 Key Features • Three input voltage sources: 5.0V, 3.3V, and 1.8V • Five output voltages: ADC_AVCC, ADC_AVCCAUX, DAC_AVCC, DAC_AVTT, and DAC_AVCCAUX • PMBus interface that can digitally control the voltage set-point and margining of the DAC_AVTT rail • All rails have differential point-of-load voltage sensing • Additional low-pass filter to reduce output voltage ripple related to the switching regulator while maintaining high efficiency

1.2 Specifications

Table 1. Specifications Typical Voltage Voltage Set-Point Accuracy Adjustment Range Maximum Current Rail (V) (%) (V) (A) ADC_AVCC 0.925 ±1 0.70 to 1.16 2.0 ADC_AVCCAUX 1.8 ±1 1.35 to 2.25 2.0 DAC_AVCC 0.925 ±1 0.70 to 1.16 3.5 DAC_AVCCAUX 1.8 ±1 1.35 to 2.25 2.0 DAC_AVTT 2.5 and 3.0 ±1 1.88 to 3.75 2.0

1.3 Ordering Information

Part Number Description ISL8024DEMO2Z ISL8024 demonstration board

1.4 Related Literature For a full list of related documents, visit our website: • ISL8024, ISL28191 device pages

UG187 Rev.1.00 Page 2 of 17 Mar 5, 2019 ISL8024DEMO2Z 2. Functional Description

2. Functional Description Overall system power blocks are shown in Figure 1. The 1.8V and 2.5V output voltage is derived from 5V, and the 0.925V rails are derived from 3.3V. Each rail is followed by an additional LC filter to reduce output voltage ripple.

3.3V ADC_AVCC ISL8024 LP Filter Input 0.925V

5V ADC_AVCCAUX ISL8024 LP Filter Input 1.8V

3.3V DAC_AVCC ISL8024 LP Filter Input 0.925V

5V DAC_AVCCAUX ISL8024 LP Filter Input 1.8V

5V DAC_AVTT ISL8024 LP Filter Input 2.5/3.0V

Figure 1. Simplified Block Diagram of the ISL8024DEMO2Z Power Module Board

Based on the specification, the ISL8024 is used as the DC/DC converter solution and as the main component. The ISL8024 has ±0.8% VFB tolerance across the temperature range of -40°C to +85°C. It has a programmable switching frequency up to 2MHz to reduce the size of the LC filters. To further reduce the output voltage ripple, a 2nd stage LC filter is used after the LC filter for the buck regulators. To reduce the conductor trace voltage drop related to the board connectors and to achieve the best load point voltage regulation, a remote sense scheme is used with the ISL28191 as a differential amplifier. Reduce the EMI to the upstream converters, a dedicated LC filter is also used as the input filter for each rail. An example power block and its related schematics is shown in Figure 2, demonstrating the device components.

Figure 2. Single Rail Power Block

UG187 Rev.1.00 Page 3 of 17 Mar 5, 2019 ISL8024DEMO2Z 2. Functional Description

Low-pass filter design requires a balance between phase loss and VOUT ripple attenuation. The LC filter used in Figure 2 has about 40dB noise attenuation at 2MHz and a phase drop of 20° at 100kHz as shown in Figure 3. The compensation design of the ISL8024 regulator has been tuned to accommodate this phase loss. (dB) dB(L1-N)-dB(V1-pos)

Frequency (Hz) Figure 3. 2nd Stage LC Filter Characteristics

2.1 Quick Start Guide The ISL8024DEMO2Z board can be powered on or off with external connectors, or plugged into Xilinx application boards.

UG187 Rev.1.00 Page 4 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines

3. PCB Layout Guidelines

3.1 ISL8024DEMO2Z Demonstration Board

Figure 4. ISL8024DEMO2Z Demonstration Board (Bottom)

Figure 5. ISL8024DEMO2Z Demonstration Board (Top)

UG187 Rev.1.00 Page 5 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines PMBUS_DATA PMBUS_CLK PMBUS_ALERT VCC1V8 2 4 6 8 10 2 4 6 8 10 1 3 5 7 J4 J2 J3 1 3 5 7 9 1 3 5 7 9 2 4 6 8 VCC5V0 VCC3V3 VCC1V8 VCC3V3 VCC1V8 ADC_AVCC DAC_AVTT DAC_AVCC DAC_AVCCAUX ADC_AVCCAUX ADC_AVCC_VS_P ADC_AVCC_VS_N DAC_AVCC_VS_P DAC_AVCC_VS_N ADC_AVCCAUX_VS_P ADC_AVCCAUX_VS_N DAC_AVTT_VS_P DAC_AVTT_VS_N DAC_AVCCAUX_VS_P DAC_AVCCAUX_VS_N ALT_PMBUS_ADDR0 ALT_PMBUS_ADDR1 PMBUS_ALERT PMBUS_DATA PMBUS_CLK 24 18 30 22 6 12 34 54 56 16 28 38 42 44 46 50 58 4 10 64 2 8 68 60 14 20 26 32 36 40 48 52 62 66 70 NC_2 GND2 GND8 GND14 GND20 GND26 GND32 GND36 GND40 GND48 GND52 GND62 GND66 GND70 RSVD_2 RSVD_4 GND_44 RSVD_6 RSVD_8 RSVD_9 PMBUS_CLK PMBUS_DATA PMBUS_ALERT DAC_AVTT_VS_P DAC_AVTT_VS_N ADC_AVCC_VS_P DAC_AVCC_VS_P ADC_AVCC_VS_N DAC_AVCC_VS_N ALT_PMBUS_ADDR0 ALT_PMBUS_ADDR1 ADC_AVCCAUX_VS_P DAC_AVCCAUX_VS_P ADC_AVCCAUX_VS_N DAC_AVCCAUX_VS_N Figure 6. ISL8024DEMO2Z Schematics, Page1 GND1 ADC_AVCC_CS_P ADC_AVCC_CS_N GND7 DAC_AVCC_CS_P DAC_AVCC_CS_N GND13 ADC_AVCCAUX_CS_P ADC_AVCCAUX_CS_N GND19 DAC_AVTT_CS_P DAC_AVTT_CS_N GND25 DAC_AVCCAUX_CS_P DAC_AVCCAUX_CS_N GND31 NC_1 GND35 RSVD_1 GND39 RSVD_3 GND43 RSVD_5 GND47 RSVD_7 GND51 DAC_AVCC_PGOOD DAC_AVTT_PGOOD DAC_AVCCAUX_PGOOD ADC_AVCC_PGOOD ADC_AVCCAUX_PGOOD GND63 GND65 GND67 POR_B J1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 POR_B ADC_AVCC_CS_P ADC_AVCC_CS_N DAC_AVCC_CS_P DAC_AVCC_CS_N DAC_AVTT_CS_P DAC_AVTT_CS_N DAC_AVTT_PGOOD DAC_AVCC_PGOOD ADC_AVCC_PGOOD ADC_AVCCAUX_CS_P ADC_AVCCAUX_CS_N DAC_AVCCAUX_CS_P DAC_AVCCAUX_CS_N DAC_AVCCAUX_PGOOD ADC_AVCCAUX_PGOOD 3.2 ISL8024DEMO2ZCircuit Schematic

UG187 Rev.1.00 Page 6 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines C Title Size Date: Title Size Date: ADC_AVCC_CS_P ADC_AVCC_CS_N ALT_PMBUS_ADDR0 PMBUS_ALERT PMBUS_DATA PMBUS_CLK DNP ADC_AVCCAUX_CS_P ADC_AVCCAUX_CS_N R22 PMBUS_ALERT PMBUS_DATA PMBUS_CLK ADC_AVCC 0.925V (0.70V-1.16V) 2A ADC_AVCC_VS_P ADC_AVCC_VS_N DNP DNP ADC_AVCCAUX_VS_P ADC_AVCCAUX_VS_N R25 R73 1.8V (1.35V-2.25V) 2A ADC_AVCCAUX R11 100 R17 100 DNP DNP DNP R35 R41 R21 R24 R46 100 100 DNP R49 DNP DNP C26 2k R13 R45 R48 DNP 2k R15 2k 2k R38 R39 C49 DNP C24 DNP C37 2k R12 0.1uF 18 17 16 15 14 13

DNP

0.1uF 2k R36 C47 C18

EPAD 25 17 16 15 14 18 13 A2 A1 A0 C33 C42

100nF

0.1uF

3 4 C22 VCC

EPAD

VREG_OUT GND2 EXT_CLK 12 25

DNP 19 A2 A1 A0

I2CVCC

3 4 VCC3V3 + -

2

6 VCC

NC3 VREG_OUT

SMBALERT2 GND2 C8

EXT_CLK 20 11 19 12 5 VCC3V3

2k + - R18

0.1uF

I2CVCC 2

C36 6

1uF

VINM SMBALERT1 NC3 SMBALERT2

5 2k R42

C45 C23 21 20 11 10 DNP

DNP

1 DNP

U3

VINP VINM SMBALERT1

C14 NC2

0.1uF

U2 22 21 10 9 C32 1uF 1

C46

C7 U6

DNP DNP ISL28191 U5 VREG_IN VINP NC2

1uF SMBDAT

VCC5V0 23 8 22 9 DNP

ISL28191

R19

VBUS VREG_IN SMBDAT

1uF SMBCLK

C11

VCC5V0 24 23 8 7 DNP

R43

VBUS

C10 SMBCLK

24 C40 7 10uF NC1 GND1 AUXP AUXM AUXV DAC_OUT 47uF R30 100mohm 1 2 3 4 5 6 NC1 GND1 AUXP AUXM AUXV DAC_OUT DNP C122 C25 C16 DNP C123 DNP 47uF 1 2 3 4 5 6 R5 C31 100mohm C21 10uF 10nF C48 R14 DNP 536 C44 2.7nF 2 R37 2k DNP R20 DNP 2 R44 L2 C20 DNP 1k 0 Ohm Resistor DNP R10 R16 50nH 1 L7 R40 1k C43 DNP 1 DNP R34 C15 47uF R4 100mohm C39 DNP C6 10uF 2 C34 22uF 50nH L4 C19 DNP C38 DNP R8 22uF 1 22uF C13 C30 22uF C5 22uF 2 C12 22uF R32 ADC_AVCCAUX_PGOOD 10P 680nH 24.9k C41 L6 22uF C4 R33 DNP 1 C35 2 180pF 8 3 9 13 14 15 ADC_AVCC_PGOOD R7 10p

680nH 24.9k

L3 C17 PHASE PHASE PHASE FB PG R9 DNP 1

COMP

VIN1 PGND

C9

16 180pF 11

VIN PGND

U4 1 12 Figure 7. ISL8024DEMO2Z Schematics, Page2

8 3 13 14 15 9 ISL8024 VDD EPAD

2 17

PHASE PHASE PHASE FB PG

COMP

EN FS SS SGND SYNC VIN1 PGND

16 11

5 6 7 4 R27

PGND VIN DNP

10

U1 1 12

ISL8024 VDD EPAD

2 17 DNP C29 C28 EN FS SS SGND SYNC 1uF 133k 5 6 7 4 R1 DNP 10 R31 0 C27 22uF R29 DNP C3 2 C2 1uF 96.5k 0 22uF C1 R2 R6 50nH L5 0 R28 1 2 0 R3 110nH L1 POR_B VCC5V0 1 POR_B VCC3V3

UG187 Rev.1.00 Page 7 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines C Title Size Date: Title Size Date: PMBUS_ALERT PMBUS_DATA PMBUS_CLK DAC_AVCC_CS_P DAC_AVCC_CS_N R50 DNP DAC_AVCC 0.925V (0.70V-1.16V) 3.5A DAC_AVCC_VS_P DAC_AVCC_VS_N DAC_AVCCAUX_CS_P DAC_AVCCAUX_CS_N ALT_PMBUS_ADDR1 PMBUS_ALERT PMBUS_DATA PMBUS_CLK R72 DNP 1.8V (1.35V-2.25V) 2A DAC_AVCCAUX R60 R67 DAC_AVCCAUX_VS_P 100 100 DNP DAC_AVCCAUX_VS_N R75 DNP DNP R86 100 R92 100 R71 R74 DNP R117 DNP 2k R64 R65 2k C75 DNP DNP DNP R96 R99 2k R88 2k R90 C73 C61 DNP 0.1uF 2k R62 C99 16 15 14 13 17 18 C86

DNP 0.1uF

C67 EPAD

100nF A2 A1 A0 25 2k

R87

C58

VCC

VREG_OUT 0.1uF EXT_CLK

3 4

GND2 19 12 13 16 15 14 18 17 DNP C83 I2CVCC

C97

C92

0.1uF

VCC3V3

C71 DNP + -

NC3 SMBALERT2

100nF EPAD 6 2

20 11

A2 A1 A0 25

5 R68 2k C72

3 4 VCC DNP

VINM SMBALERT1 C60 VREG_OUT

1uF

GND2 EXT_CLK 12 21 10 19

I2CVCC

VCC3V3

+ -

C85

1uF 2

DNP 6

U9 VINP NC2 NC3

1 SMBALERT2

C95

22 9 20 11 5 2k R93 DNP U8

C57 1uF

VNEG_IN SMBDAT VINM

ISL28191 SMBALERT1 VCC5V0 23 8 21 C82 10 1uF DNP

1

DNP

R70

U12 VBUS SMBCLK VINP

U11 NC2 24 7 22 9

C96

ISL28191 VREG_IN SMBDAT

C65 VCC5V0 23 DNP 8 47uF NC1 GND1 AUXP AUXM AUXV DAC_OUT

R55 100mohm

DNP R95

C74 VBUS

DNP SMBCLK

1 2 3 4 5 6 24 C90 7 C124 DNP 47uF 100mohm R81 C56 10uF NC1 GND1 AUXP AUXM AUXV DAC_OUT C70 10nF R63 536 1 2 3 4 5 6 C81 C125 10uF DNP DNP C98 DNP 2 C94 R69 2.7nF R89 2k 2 DNP 0 Ohm Resistor R94 L11 R66 1k C69 DNP 1 DNP R59 50nH L14 1k R91 C93 1 DNP C63 DNP R85 47uF R54 100mohm C55 C88 10uF 22uF C80 2 22uF 50nH L10 C87 22uF C68 1 DNP DNP R58 C79 C64 22uF 22uF 2 C54 22uF R83 DAC_AVCCAUX_PGOOD 10p 680nH 24.9k C91 L13 C62 R84 22uF DNP 1 C84 180pF C53

22uF

13 14 15 8 3 9

PHASE PHASE PHASE FB PG

2

COMP

VIN1 PGND

16 11

PGND

DAC_AVCC_PGOOD VIN R57 U10 12 DNP 1 680nH 32.4K

L9 C66

ISL8024 VDD EPAD

2 R61 17 DNP 1 Figure 8. ISL8024DEMO2Z Schematics, Page3 C59 180pF EN FS SS SGND SYNC

5 6 7 4 R77

DNP 10 13 14 15 3 8 9

PHASE PHASE PHASE FB PG

COMP

DNP VIN1

PGND C78 16 11 C77

1uF

PGND VIN 96.5k

U7 12 1 0

22uF

C76 ISL8024 VDD

EPAD R79 R82 2 17 EN FS SS SGND SYNC 2 5 6 7 4 R51 DNP 10 0 R78 50nH L12 1 DNP C52 C51 1uF 111k 0 22uF C50 R53 R56 POR_B VCC5V0 2 0 R52 110nH L8 1 POR_B VCC3V3

UG187 Rev.1.00 Page 8 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines DAC_AVTT_CS_P DAC_AVTT_CS_N DAC_AVTT 2.5V/3.0V (1.88V-3.75V) 2A DAC_AVTT_VS_P DAC_AVTT_VS_N PMBUS_ALERT PMBUS_DATA PMBUS_CLK R110 R116 100 100 DNP R23 0 R47 0 DNP R80 R76 2k R112 2k R114 0 R26 C106 C121 4.7uF 0.1uF 2k R111 18 16 15 14 13 17 C119 100nF 100nF

C114 EPAD A2 A1 A0 25 0.1uF C111

VCC

3 4 VREG_OUT

GND2 EXT_CLK 19 12 I2CVCC

VCC5V0 + -

NC3 SMBALERT2

6 2

20 11

5 2k C117 100nF

VINM

C105 SMBALERT1 1uF

21 10

1uF

U15 VINP

1 NC2

C109

22 U14 9

VREG_IN

ISL28023FR12Z SMBDAT

ISL28191

VCC5V0 23

10 8

R98 C118 100nF

VBUS

C108 SMBCLK 10uF

24 7 NC1 GND1 AUXP AUXM AUXV DAC_OUT C112 47uF 1 2 3 4 5 6 C126 1uF R105 C116 C120 DNP 2 1.8nF R113 3.09k 100mohm 1K R97 50nH L17 1 1k R115 C115 DNP DNP R108 C104 22uF C110 22uF C103 22uF 2 DAC_AVTT_PGOOD R107 10p 1uH 24.9k L16 C113 R109 DNP 1 C107 180pF Figure 9. ISL8024DEMO2Z Schematics, Page4

8 3 13 14 15 9

PHASE PHASE PHASE FB PG

COMP

VIN1 PGND

16 11

VIN PGND

U13 1 12

ISL8024 VDD EPAD

2 17 EN FS SS SGND SYNC 5 6 7 4 DNP 10 0 DNP C101 1uF R104 111k C102 R106 22uF C100 2 0 R103 50nH L15 1 POR_B VCC5V0

UG187 Rev.1.00 Page 9 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines

3.3 Bill of Materials

Qty Reference Designator Description PCB Footprint Part Number 23 C1, C4, C5, C12, C13, C27, C30, C34, C38, C50, 22µF SMC0805, X5R, 10V C53, C54, C62, C64, C76, C79, C80, C87, C88, C100, C103, C104, C110 16 C2, C7, C11, C28, C32, C36, C51, C57, C60, C77, 1µF SMC0603, X5R, 10V C82, C85, C101, C105, C109, C126 17 C3, C19, C20, C25, C29, C43, C48, C52, C68, DNP C69, C74, C78, C93, C98, C102, C115, C120, C122, C123, C124, C125, C26, C49, C75, C99, 7 C6, C10, C31, C55, C56, C81, C108 10µF SMC0805, X5R, 10V 11 C8, C14, C18, C33, C37, C58, C61, C83, C86, 0.1µF SMC0603, X7R, 10V C106, C111 5 C9, C35, C59, C84, C107 180pF SMC0402, COG, 10V 7 C15, C16, C40, C63, C65, C90, C112 47µF SMC1206, X5R, 10V 4 C17, C41, C113, C91 10PF SMC0402, COG, 10V 2 C21, C70 10nF SMC0402, X7R, 10V 7 C42, C67, C92, C114, C117, C118, C119 100nF SMC0402, X5R, 10V 13 C22, C23, C24, C45, C46, C47, C71, C72, C73, DNP C95, C96, C97, C66 1 C121 4.7µF SMC0603, X5R, 10V 2 C44, C94 2.7nF SMC0402, X7R, 10V 1 C116 1.8nF SMC0402, X7R, 10V 1 C39 DNP SMC0805 24 R3, R6, R26, R28, R31, R47, R52, R56, R76, R78, 0 SMR0402 R82, R103, R106 1 J1 CON70A ERM8_035_08_LDV_K_TR ERM8_035_08_LDV_K_TR 2 J2, J3 CON10A IPBS-105-01-T-D IPBS-105-01-T-D 1 J4 CON8A Jumper8 5-146256-4 10 L4, L5, L12, L15, L7, L10, L14, L17 50nH L805 74479978105 2 L2, L11 0Ω SMR0805 4 L3, L6, L9, L13 680nH IND_WE7443835XXX 744383560068 2 L1, L8 110nH WE7447997XXX 74479899111 1 L16 1µH IND_WE7443835XXX 74438356010 24 R1, R8, R9, R10, R23, R24, R27, R33, R34, R48, DNP SMR0402 R50, R51, R58, R59, R61, R73, R74, R77, R80, R84, R85, R96, R102, R108, R109, R71, R75, R72, R99, R100 2 R2, R79 97.6k SMR0402, 1% 7 R4, R5, R30, R54, R55, R81, R105 100mΩ SMR0603, 1% RL0816S-R10-F 4 R7, R32, R83, R107 24.9k SMR0402, 1% 10 R11, R17, R35, R41, R60, R67, R86, R92, 100 SMR0402, 1% R110, R116 22 R12, R13, R15, R18, R36, R37, R38, R39, R42, 2k SMR0402, 1% R62, R64, R65, R68, R87, R88, R89, R90, R93, R101, R111, R112, R114 2 R14, R63 536 SMR0402, 1%

UG187 Rev.1.00 Page 10 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines

Qty Reference Designator Description PCB Footprint Part Number 1 R57 32.4k 6 R16, R40, R66, R97, R115, R91 1k SMR0402, 1% 1 R98 10 SMR0402, 1% 1 R29 133k SMR0402, 1% R20, R44, R69, R70, R95, R19, R43, R21, R25, DNP R45, R46, R49, R94 2 R22, R117 DNP SMR0402, 1% 2 R53, R104 110k SMR0402, 1% 1 R113 3.09k SMR0402, 1% 5 U1, U4, U7, U10, U13 QFN16_118X118_197_EPD ISL8024IRTAJZ 5 U2, U5, U8, U11, U14 SOT23-6 ISL28191FHZ 1 U15 QFN24_157X157_197_EP ISL28023FR12Z 3 U3, U6, U9, U12 DNP

3.4 Board Layout

Figure 10. Top Layer

UG187 Rev.1.00 Page 11 of 17 Mar 5, 2019 ISL8024DEMO2Z 3. PCB Layout Guidelines

Figure 11. Bottom Layer

UG187 Rev.1.00 Page 12 of 17 Mar 5, 2019 ISL8024DEMO2Z 4. Typical Performance Curves

4. Typical Performance Curves

Efficiency was tested on these boards.

90 90

80 80

70 70

ADC_AVCC 60 60

Efficiency (%) Efficiency 50

Efficiency (%) Efficiency 50

40 40 ADC_AVCC Vout = 0.925V, fSW = 1.99MHz DAC_AVCC Vout = 0.925V, fSW = 1.76Mhz 30 30 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 Output Current (A) Output Current (A) Figure 12. ADC_AVCC Rail, Peak Efficiency = 84% Figure 13. DAC_AVCC Rail, Peak Efficiency = 85%

100 100

90 90

80 80

70 70 DAC_AVCC

60 60 Efficiency (%) Efficiency 50 (%) Efficiency 50

40 40 ADC_AVCCAUX Vout = 1.8V, fSW = 1.50MHz DAC_AVCCAUX Vout = 1.8V fSW = 1.99MHz 30 30 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 Output Current (A) Output Current (A) Figure 14. ADC_ACCAUX Rail, Peak Efficiency = 90% Figure 15. DAC_AVCCAUX Rail, Peak Efficiency = 90%

100

90

80

70

60 Efficiency (%) Efficiency 50

40 DAC_AVTT Vout = 2.5V, fSW = 1.76MHz 30 0.4 0.9 1.4 1.9 2.4 2.9 3.4 3.9 Output Current (A) Figure 16. 5.DAC_AVTT Rail, Peak Efficiency = 92%

UG187 Rev.1.00 Page 13 of 17 Mar 5, 2019 ISL8024DEMO2Z 5. Summary

5. Summary The ISL8024DEMO2Z demonstration board integrates five output voltage rails into a high-density plug-in power module. It offers a very low output voltage ripple with dual LC filters. It has very tight load-point voltage regulation with remote voltage sense to compensate for board copper loss and interconnection voltage drop. Digital programmability is also available as an option. LC filters at each input rail alleviate the EMI interactions between different rails.

UG187 Rev.1.00 Page 14 of 17 Mar 5, 2019 ISL8024DEMO2Z 6. Revision History

6. Revision History

Rev. Date Description 1.00 Mar 5, 2019 The Typical Performance Curves heading was modified: “output voltage ripple” was deleted. Typical Performance Curves 13, 15, 17, 19, and 21 were deleted, and the remaining figures were renumbered. 0.00 Oct 10, 2018 Initial release

UG187 Rev.1.00 Page 15 of 17 Mar 5, 2019 1RWLFH

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