DOCSLIB.ORG

UC San Diego Electronic Theses and Dissertations

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
UC San Diego Electronic Theses and Dissertations UC San Diego UC San Diego Electronic Theses and Dissertations Title 10-nm CMOS : a design study on technology requirement with power/performance assessment Permalink https://escholarship.org/uc/item/64g181j0 Author Liu, Minjian Publication Date 2007 Peer reviewed|Thesis/dissertation eScholarship.org Powered by the California Digital Library University of California UNIVERSITY OF CALIFORNIA, SAN DIEGO 10-nm CMOS — A Design Study on Technology Requirement with Power/Performance Assessment A dissertation submitted in partial satisfaction of the requirements for the degree Doctor of Philosophy in Electrical Engineering (Applied Physics) by Minjian Liu Committee in charge: Professor Yuan Taur, Chair Professor Prabhaker Bandaru Professor Chung-Kuan Cheng Professor Yu-Hwa Lo Professor Deli Wang 2007 The dissertation of Minjian Liu is approved, and it is acceptable in quality and form for publication on paper: Chair University of California, San Diego 2007 iii DEDICATION To my mom Zhou YuYing, my dad Liu DongLin and my husband Yang Yang. iv TABLE OF CONTENTS SignaturePage................................ iii Dedication .................................. iv TableofContents .............................. v ListofFigures................................ vii ListofTables ................................ viii Acknowledgments .............................. ix Vita...................................... xi Abstract ................................... xii 1 Introduction ................................. 1 1.1 CMOS Scaling — Reaching the Limit . 1 1.2FundamentalLimitingFactors . 4 1.2.1 Non-scaling electron thermal voltage . 5 1.2.2 Gate-oxidescalinglimit . 8 1.3OrganizationofThesis . 10 2 BackgroundandMethodology . 12 2.1MOSFETScalingTheory . 13 2.2LeakageCurrentsinStatic . 17 2.2.1 Tunneling through gate insulator . 19 2.2.2 Band-to-bandtunneling . 21 2.2.3 Source-to-drain direct tunneling . 21 2.3ProblemsToBeAddressed . 22 2.4Methodology............................... 24 3 Short Channel Effect and Threshold Voltage Design . ... 27 v 3.1 Depletion Layer Depth and Gate Dielectric Thickness . ..... 30 3.1.1 Properties of high-K dielectrics . 32 3.1.2 Choice of high-K dielectric for 10-nm CMOS . 33 3.2 Gate Electrode: Metal Gate vs. Poly-Silicon . ... 34 3.3 Doping Profile Design for Threshold Voltage Requirements ..... 38 3.3.1 Retrogradedopingprofile . 39 3.3.2 Quantum-mechanicaleffect . 42 3.3.3 Threshold voltage lowering by counterdoping . .. 45 3.4LaterallyNonuniformDoping. 51 3.5 Effect of Source-Drain Junction Depth on Short Channel Effect. 55 3.6 Vt LoweringbyForwardBodyBias. 56 3.7EffectofThickerGateOxide . 61 4 Optimization of Gate Overlap and Source/Drain Doping Lateral Gradient 63 4.1 CMOS Performance Metric — Inverter Delay . 67 4.2 Optimum Gate Overlap for an Abrupt Source - Drain Profile . ... 69 4.3 The Effect of Source-Drain Doping Gradient on Performance .... 73 4.4 Band-to-Band Tunneling Current . 77 5 The Scaling Limit of Power Supply Voltage from Noise Margin Consid- erations.................................... 86 5.1 Device Assumptions for Noise Margin Study . 90 5.2NoiseMarginforCMOSNANDCircuits . 90 5.3 Minimum Power Supply Voltage from Noise Margin Considerations . 96 6 Scalingto10nm—Bulk,SOIorDGMOSFETs? . 101 6.1SOICMOS................................103 6.2DGMOSFET ..............................106 6.3 10 nm: Bulk MOSFET is the More Likely Candidate . 109 7 Conclusion..................................112 Bibliography.................................115 vi LIST OF FIGURES Figure 1.1: A brief chronology of the major milestones in the develop- mentofVLSI ............................. 2 Figure 1.2: Trends in lithographic feature size, and number of transis- tors per chip for DRAM and microprocessor chips. 3 Figure 1.3: The scaling trend of CMOS technology node and channel length.................................. 4 Figure 1.4: History and trends of power-supply voltage (Vdd), threshold voltage (Vt), and gate-oxide thickness (tox) vs. channel length for CMOSlogictechnologies. 5 Figure 1.5: Measured (dots) and simulated (solid lines) tunneling cur- rents in thin-oxide polysilicon-gate MOS devices. The dashed line indicates a tunneling current level of 1A/cm2 [8]........... 9 Figure 2.1: The band diagram of the channel in an n-MOSFET. The potential barrier is controlled by the gate voltage. When the chan- nel length decreases, the barrier is increasingly affected by the drain voltage especially when the drain is tied at su . 15 Figure 2.2: Simplified geometry for analyzing 2-D effects in a short- channel MOSFET. The white area in silicon represents the deple- tion regions where mobile carriers are swept away by the built-in as well as the applied fields of the gate and betwee . 16 Figure 2.3: The operation of an inverter. When the gate voltage is switched from zero to Vdd, output node is discharged through n- MOSFET. Therefore n-MOSFET is called a pull-down device. Sim- ilarly, p-MOSFET acts as a pull-up device. 19 Figure 2.4: Leakage currents of an n-MOSFET are shown in different status. When the FET is ”ON”, the major leakage source is the gate tunneling current. When the FET is ”OFF”, the major three leakage currents are shown in the band diagram. 20 Figure 2.5: Schematic band diagram of a P-N junction under reverse bias (a) energy-momentum picture for indirect tunneling (b). The minimum tunneling distance is wT,min [25].............. 22 Figure 3.1: Constant scale length λ contours (solid lines) in a tox-Wd design plane, assuming SiO2 or ǫsi/ǫox = 3. The dotted line marks the boundary on which the ideality factor m equals 1.3. The interc 28 vii Figure 3.2: Constant gate-insulator dielectric constant contours in a ti/λ-Wd/λ plane............................. 31 Figure 3.3: Band diagram showing polysilicon-gate depletion effects when a positive voltage is applied to the n+ polysilicon gate of a p-type MOScapacitor............................. 35 Figure 3.4: The illustration of the three regions for analytically solving scale length when the polysilicon depletion is not negligible. tp is the polysilicon depletion depth, ti is the gate insulator thickness and Wd istheSidepletion ...................... 36 Figure 3.5: Scale length λ vs. polysilicon doping concentration Np for different ti, ǫi and normal surface field Es. ............. 37 Figure 3.6: A schematic diagram showing the low-high (retrograde) step doping profile, x = 0 denotes the silicon-oxide interface . 40 Figure 3.7: The structure of extreme retrograde doping profile. For a 10-nm n-type MOSFET, the doping levels are labeled. 42 Figure 3.8: The drain current vs. gate voltage for 10-nm n-type MOS- FET with extreme retrograde doping profile at drain voltage of 50 mVand1V. ............................. 44 Figure 3.9: An illustration of the doping concentration (a) and band diagram (b) for MOS with uniform doping, extreme retrograde doping and counterdoping in the vertical direction. The surface field, which is the slope of the potential/energy band a . .. 47 Figure 3.10: The structure of 10-nm n-type MOSFET with counterdop- ing profile. The doping type and concentration are labeled in each region. Counterdoping thickness is 3 nm. Source/drain deep junc- tion (14 nm) is assumed. Gate work function is the sam . 48 Figure 3.11: The doping profile along the parallel cut 1 nm below the interface. ................................ 49 Figure 3.12: The doping profile along the parallel cut 7 nm below the interface. ................................ 49 Figure 3.13: The doping profile along the perpendicular cut in the middle of the device. The location of x=0 is the gate oxide/silicon interface. 50 Figure 3.14: The drain current versus gate voltage for drain voltage of 50 mV and 1 V respectively. The threshold voltage at low drain bias is 0.28 V which is obtained by linear extrapolation. DIBL is 85 mV/V and subthreshold swing is 100 mV/decade. 50 Figure 3.15: Schematic doping contours of SUPER-HALO profile.... 51 viii Figure 3.16: The illustration of HALO doping for channel length of 10 nm. HALO pockets of 4-nm are kept laterally on each side next to the source-drain region. The region between the HALO pockets has the same doping concentration as the substrate in . 52 Figure 3.17: The electrostatic potential contour of a 10-nm n-MOSFET with HALO doping. The doping profiles are illustrated in Fig- ure 3.16. The bias condition is Vs = 0 and Vg = Vd =1V...... 53 Figure 3.18: Threshold voltages are plotted as a function of the channel length for MOSFETs without HALO doping and with two other HALO doping profiles as shown in Figure 3.16. 54 Figure 3.19: Threshold voltages versus body bias are plotted with dif- ferentextractionmethods. 59 Figure 3.20: The electrostatic potential contour for 10-nm MOSFET with forward body bias of 0.5 V. The gate voltage is at 0.33 V whichisthethresholdvoltage. 60 Figure 3.21: The leakage current of a diode under forward bias condition. The diode under study has the doping concentration same as the source and substrate doping of a 10-nm n-MOSFET. 60 Figure 3.22: The threshold voltage and the drain-induced barrier low- ering (DIBL) versus channel length for effective oxide thickness (EOT) of 0.4 nm and 0.8 nm. The threshold voltage is for the drain voltage at 1 V. For thicker oxide thickness, the . 62 Figure 4.1: The illustration of the optimum gate length as a result of the trade-off between current drive and miller capacitance. (a) shows that the gate is too long and large overlap capacitance degrades theperformance. (c)showsthatthegateis . 66 Figure 4.2: The schematic of the 3-stage ring oscillator setup. At each node (n1, n2 and n3), a loading capacitance can be added to mea- sure the loaded delay. The current source is added to provide a pulse signal to “kick” the circuit start . 67 Figure 4.3: The node voltages are plotted versus time for three-stage ring oscillator. The period of the oscillation is given by n(τn +τp)= 2nτ where τ =(τn + τp)/2 is the the delay of an inverter. 68 Figure 4.4: Switching delay of a 3-stage ring oscillator vs.
Load more

Recommended publications
  • Neutron Transmutation Doping of Silicon at Research Reactors
    Silicon at Research Silicon Reactors Neutron Transmutation Doping of Doping Neutron Transmutation IAEA-TECDOC-1681 IAEA-TECDOC-1681 n NEUTRON TRANSMUTATION DOPING OF SILICON AT RESEARCH REACTORS 130010–2 VIENNA ISSN 1011–4289 ISBN 978–92–0– INTERNATIONAL ATOMIC AGENCY ENERGY ATOMIC INTERNATIONAL Neutron Transmutation Doping of Silicon at Research Reactors The following States are Members of the International Atomic Energy Agency: AFGHANISTAN GHANA NIGERIA ALBANIA GREECE NORWAY ALGERIA GUATEMALA OMAN ANGOLA HAITI PAKISTAN ARGENTINA HOLY SEE PALAU ARMENIA HONDURAS PANAMA AUSTRALIA HUNGARY PAPUA NEW GUINEA AUSTRIA ICELAND PARAGUAY AZERBAIJAN INDIA PERU BAHRAIN INDONESIA PHILIPPINES BANGLADESH IRAN, ISLAMIC REPUBLIC OF POLAND BELARUS IRAQ PORTUGAL IRELAND BELGIUM QATAR ISRAEL BELIZE REPUBLIC OF MOLDOVA BENIN ITALY ROMANIA BOLIVIA JAMAICA RUSSIAN FEDERATION BOSNIA AND HERZEGOVINA JAPAN SAUDI ARABIA BOTSWANA JORDAN SENEGAL BRAZIL KAZAKHSTAN SERBIA BULGARIA KENYA SEYCHELLES BURKINA FASO KOREA, REPUBLIC OF SIERRA LEONE BURUNDI KUWAIT SINGAPORE CAMBODIA KYRGYZSTAN CAMEROON LAO PEOPLES DEMOCRATIC SLOVAKIA CANADA REPUBLIC SLOVENIA CENTRAL AFRICAN LATVIA SOUTH AFRICA REPUBLIC LEBANON SPAIN CHAD LESOTHO SRI LANKA CHILE LIBERIA SUDAN CHINA LIBYA SWEDEN COLOMBIA LIECHTENSTEIN SWITZERLAND CONGO LITHUANIA SYRIAN ARAB REPUBLIC COSTA RICA LUXEMBOURG TAJIKISTAN CÔTE DIVOIRE MADAGASCAR THAILAND CROATIA MALAWI THE FORMER YUGOSLAV CUBA MALAYSIA REPUBLIC OF MACEDONIA CYPRUS MALI TUNISIA CZECH REPUBLIC MALTA TURKEY DEMOCRATIC REPUBLIC MARSHALL ISLANDS UGANDA
    [Show full text]
  • Modeling Techniques for Multijunction Solar Cells Meghan N
    NUSOD 2018 Modeling Techniques for Multijunction Solar Cells Meghan N. Beattie Karin Hinzer Matthew M. Wilkins SUNLAB, Centre for Research in SUNLAB, Centre for Research in SUNLAB, Centre for Research in Photonics Photonics Photonics University of Ottawa University of Ottawa University of Ottawa Ottawa, Canada Ottawa, Canada Ottawa, Canada [email protected] Christopher E. Valdivia SUNLAB, Centre for Research in Photonics University of Ottawa Ottawa, Canada Abstract—Multi-junction solar cell efficiencies far exceed density of defects at the interface [4]. Many of these defects those attainable with silicon photovoltaics. Recently, this propagate towards the surface, resulting in threading technology has been applied to photonic power converters with dislocations that inhibit minority carrier collection [3] In this conversion efficiencies higher than 65%. These devices operate research, we are investigating the use of a voided germanium well in part because of luminescent coupling that occurs in the interface layer to intercept dislocations before they reach the multijunction device. We present modeling results to explain surface, enabling epitaxial growth of high quality Ge, IV how this boosts device efficiencies by approximately 70 mV per (e.g. SiGeSn), and III-V (e.g. InGaAs, InGaP) junction in GaAs devices. Luminescent coupling also increases semiconductors on Si substrates. efficiency in devices with four more junctions, however, the high cost of materials remains a barrier to their widespread By modelling multijunction solar cell designs on Si use. Substantial cost reduction could be achieved by replacing substrates, we investigate the impact of threading the germanium substrate with a less expensive alternative: dislocations on device performance. With highly doped Si, silicon.
    [Show full text]
  • Efficient Er/O Doped Silicon Light-Emitting Diodes at Communication Wavelength by Deep Cooling
    Efficient Er/O Doped Silicon Light-Emitting Diodes at Communication Wavelength by Deep Cooling Huimin Wen1,#, Jiajing He1,#, Jin Hong2,#, Fangyu Yue2* & Yaping Dan1* 1University of Michigan-Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai, 200240, China. 2Key Laboratory of Polar Materials and Devices, Ministry of Education, East China Normal University, Shanghai, 200241, China. #These authors contributed equally * To whom correspondence should be addressed: [email protected], [email protected] Abstract A silicon light source at communication wavelength is the bottleneck for developing monolithically integrated silicon photonics. Doping silicon with erbium ions was believed to be one of the most promising approaches but suffers from the aggregation of erbium ions that are efficient non-radiative centers, formed during the standard rapid thermal treatment. Here, we apply a deep cooling process following the high- temperature annealing to suppress the aggregation of erbium ions by flushing with Helium gas cooled in liquid nitrogen. The resultant light emitting efficiency is increased to a record 14% at room temperature, two orders of magnitude higher than the sample treated by the standard rapid thermal annealing. The deep-cooling-processed Si samples were further made into light-emitting diodes. Bright electroluminescence with a spectral peak at 1.54 µm from the silicon-based diodes was also observed at room temperature. With these results, it is promising to develop efficient silicon lasers at communication wavelength for the monolithically integrated silicon photonics. The monolithic integration of fiber optics with complementary metal-oxide- semiconductor (CMOS) integrated circuits will significantly speed up the computing and data transmission of current communication networks.1-3 This technology requires efficient silicon-based lasers at communication wavelengths.4, 5 Unfortunately, silicon is an indirect bandgap semiconductor and cannot emit light at communication wavelengths.
    [Show full text]
  • A New Strategy of Bi-Alkali Metal Doping to Design Boron Phosphide Nanocages of High Nonlinear Optical Response with Better Thermodynamic Stability
    A New Strategy of bi-Alkali Metal Doping to Design Boron Phosphide Nanocages of High Nonlinear Optical Response with Better Thermodynamic Stability Rimsha Baloach University of Education Khurshid Ayub University of Education Tariq Mahmood University of Education Anila Asif University of Education Sobia Tabassum University of Education Mazhar Amjad Gilani ( [email protected] ) University of Education Original Research Full Papers Keywords: Boron phosphide (B12P12), Bi-alkali metal doping, Nonlinear optical response (NLO), Density functional theory Posted Date: February 11th, 2021 DOI: https://doi.org/10.21203/rs.3.rs-207373/v1 License: This work is licensed under a Creative Commons Attribution 4.0 International License. Read Full License Version of Record: A version of this preprint was published at Journal of Inorganic and Organometallic Polymers and Materials on April 16th, 2021. See the published version at https://doi.org/10.1007/s10904-021-02000-6. A New Strategy of bi-Alkali Metal Doping to Design Boron Phosphide Nanocages of High Nonlinear Optical Response with Better Thermodynamic Stability ABSTRACT: Nonlinear optical materials possess high rank in fields of optics owing to their impacts, utilization and extended applications in industrial sector. Therefore, design of molecular systems with high nonlinear optical response along with high thermodynamic stability is a dire need of this era. Hence, the present study involves investigation of bi-alkali metal doped boron phosphide nanocages M2@B12P12 (M=Li, Na, K) in search of stable nonlinear optical materials. The investigation includes execution of geometrical and opto-electronic properties of complexes by means of density functional theory (DFT) computations. Bi-doped alkali metal atoms introduce excess of electrons in the host B12P12 nanocage.
    [Show full text]
  • Recent Advances in Electrical Doping of 2D Semiconductor Materials: Methods, Analyses, and Applications
    nanomaterials Review Recent Advances in Electrical Doping of 2D Semiconductor Materials: Methods, Analyses, and Applications Hocheon Yoo 1,2,† , Keun Heo 3,† , Md. Hasan Raza Ansari 1,2 and Seongjae Cho 1,2,* 1 Department of Electronic Engineering, Gachon University, 1342 Seongnamdaero, Sujeong-gu, Seongnam-si, Gyeonggi-do 13120, Korea; [email protected] (H.Y.); [email protected] (M.H.R.A.) 2 Graduate School of IT Convergence Engineering, Gachon University, 1342 Seongnamdaero, Sujeong-gu, Seongnam-si, Gyeonggi-do 13120, Korea 3 Department of Semiconductor Science & Technology, Jeonbuk National University, Jeonju-si, Jeollabuk-do 54896, Korea; [email protected] * Correspondence: [email protected] † These authors contributed equally to this work. Abstract: Two-dimensional materials have garnered interest from the perspectives of physics, materi- als, and applied electronics owing to their outstanding physical and chemical properties. Advances in exfoliation and synthesis technologies have enabled preparation and electrical characterization of various atomically thin films of semiconductor transition metal dichalcogenides (TMDs). Their two-dimensional structures and electromagnetic spectra coupled to bandgaps in the visible region indicate their suitability for digital electronics and optoelectronics. To further expand the potential applications of these two-dimensional semiconductor materials, technologies capable of precisely controlling the electrical properties of the material are essential. Doping has been traditionally used to effectively change the electrical and electronic properties of materials through relatively simple processes. To change the electrical properties, substances that can donate or remove electrons are Citation: Yoo, H.; Heo, K.; added. Doping of atomically thin two-dimensional semiconductor materials is similar to that used Ansari, M..H.R.; Cho, S.
    [Show full text]
  • Designing Band Gap of Graphene by B and N Dopant Atoms
    Designing band gap of graphene by B and N dopant atoms Pooja Rani and V.K. Jindal1 Department of Physics, Panjab University, Chandigarh-160014, India Ab-initio calculations have been performed to study the geometry and electronic structure of boron (B) and nitrogen (N) doped graphene sheet. The effect of doping has been investigated by varying the concentrations of dopants from 2 % (one atom of the dopant in 50 host atoms) to 12 % (six dopant atoms in 50 atoms host atoms) and also by considering different doping sites for the same concentration of substitutional doping. All the calculations have been performed by using VASP (Vienna Ab-initio Simulation Package) based on density functional theory. By B and N doping p-type and n-type doping is induced respectively in the graphene sheet. While the planar structure of the graphene sheet remains unaffected on doping, the electronic properties change from semimetal to semiconductor with increasing number of dopants. It has been observed that isomers formed differ significantly in the stability, bond length and band gap introduced. The band gap is maximum when dopants are placed at same sublattice points of graphene due to combined effect of symmetry breaking of sub lattices and the band gap is closed when dopants are placed at adjacent positions (alternate sublattice positions). These interesting results provide the possibility of tuning the band gap of graphene as required and its application in electronic devices such as replacements to Pt based catalysts in Polymer Electrolytic Fuel Cell (PEFC). INTRODUCTION Graphene is the name given to a single layer of graphite, made up of sp2 hybridized carbon atoms arranged in a honeycomb lattice, consisting of two interpenetrating triangular sub-lattices A and B (Fig.
    [Show full text]
  • Doping of Semiconductors N Doping This Involves Substituting Si by Neighboring Elements That Contribute Excess Electrons
    Materials 100A, Class 12, Electrical Properties etc Ram Seshadri MRL 2031, x6129 [email protected]; http://www.mrl.ucsb.edu/∼seshadri/teach.html Doping of semiconductors n doping This involves substituting Si by neighboring elements that contribute excess electrons. For example, small amounts of P or As can substitute Si. Since P/As have 5 valence electrons, they behave like Si plus an extra electron. This extra electron contributes to electrical conductivity, and with a sufficiently large number of such dopant atoms, the material can displays metallic conductivity. With smaller amounts, one has extrinsic n-type semiconduction. Rather than n and p being equal, the n electrons from the donor usually totally outweigh the intrinsic n and p type carriers so that: σ ∼ n|e|µe The donor levels created by substituting Si by P or As lie just below the bottom of the conduction band. Thermal energy is usually sufficient to promote the donor electrons into the conduction band. electron from P Energy CB electron pair Donor levels VB p doping This involves substituting Si by neighboring atom that has one less electron than Si, for example, by B or Al. The substituent atom then creates a “hole” around it, that can hop from one site to another. The hopping of a hole in one direction corresponds to the hopping of an electron in the opposite direction. Once again, the dominant conduction process is because of the dopant. σ ∼ p|e|µh hole from Al Energy CB electron pair Acceptor levels VB T dependence of the carrier concentration The expression: 1 Materials 100A, Class 12, Electrical Properties etc Eg ρ = ρ0 exp( ) 2kBT can inverted and written in terms of the conductivity −Eg σ = σ0 exp( ) 2kBT Now σ = n|e|µe or σ = p|e|µh.
    [Show full text]
  • Ultrahigh Doping of Graphene Using Flame-Deposited Moo 3
    1592 IEEE ELECTRON DEVICE LETTERS, VOL. 41, NO. 10, OCTOBER 2020 Ultrahigh Doping of Graphene Using Flame-Deposited MoO3 Sam Vaziri , Member, IEEE, Victoria Chen, Lili Cai, Yue Jiang , Michelle E. Chen, Ryan W. Grady, Xiaolin Zheng, and Eric Pop , Senior Member, IEEE Abstract— The expected high performance of graphene- result, applying conventional semiconductor doping methods based electronics is often hindered by lack of adequate (e.g. substituting C atoms with dopants) is very challenging doping, which causes low carrier density and large sheet for graphene and other 2D materials. resistance. Many reported graphene doping schemes also suffer from instability or incompatibility with existing semi- A more promising route to control the doping of graphene conductor processing. Here we report ultrahigh and stable and other 2D materials is to introduce charge carriers from p-type doping up to ∼7 × 1013 cm−2 (∼2 × 1021 cm−3) of the outside, either with a field-effect (electrostatically or with monolayer graphene grown by chemical vapor deposition. external charge dipoles) or by external dopants (similar to This is achieved by direct polycrystalline MoO3 growth on modulation doping in conventional semiconductors) [10]–[13]. graphene using a rapid flame synthesis technique. With this approach, the metal-graphene contact resistance for For example, charge transfer from external metal-oxide layers holes is reduced to ∼200 · μm. We also demonstrate is one of the most promising mechanisms, being compati- that flame-deposited MoO3 provides over 5× higher doping ble with semiconductor device processing while minimally of graphene, as well as superior thermal and long-term degrading the electronic properties of graphene [14], [15].
    [Show full text]
  • Doping Concentration Effect on Performance of Single QW Double-Heterostructure Ingan/Algan Light Emitting Diode
    EPJ Web of Conferences 162, 01037 (2017) DOI: 10.1051/epjconf/201716201037 InCAPE2017 Doping concentration effect on performance of single QW double-heterostructure InGaN/AlGaN light emitting diode N. Syafira Abdul Halim1,*, M.Halim A. Wahid1, N. Azura M. Ahmad Hambali1, Shanise Rashid1, and Mukhzeer M.Shahimin2 1Semiconductor Photonics & Integrated Lightwave Systems (SPILS), School of Microelectronic Engineering, Universiti Malaysia Perlis, Pauh Putra Campus, 02600 Malaysia. 2Department of Electrical and Electronic Engineering, Faculty of Engineering, National Defence University of Malaysia (UPNM), Kem Sungai Besi, 57000 Kuala Lumpur. Abstract. Light emitting diode (LED) employed a numerous applications such as displaying information, communication, sensing, illumination and lighting. In this paper, InGaN/AlGaN based on one quantum well (1QW) light emitting diode (LED) is modeled and studied numerically by using COMSOL Multiphysics 5.1 version. We have selected In0.06Ga0.94N as the active layer with thickness 50nm sandwiched between 0.15µm thick layers of p and n-type Al0.15Ga0.85N of cladding layers. We investigated an effect of doping concentration on InGaN/AlGaN double heterostructure of light-emitting diode (LED). Thus, energy levels, carrier concentration, electron concentration and forward voltage (IV) are extracted from the simulation results. As the doping concentration is increasing, the performance of threshold voltage, Vth on one quantum well (1QW) is also increases from 2.8V to 3.1V. 1 Introduction dislocation density. In this context, the improvement of increasing doping concentration in gallium nitride (GaN) Wide band gap gallium nitride (GaN) based LED structure has a great importance for better semiconductor device has become a great potential of performances in GaN LED structure.
    [Show full text]
  • Tunnel Junctions for III-V Multijunction Solar Cells Review
    crystals Review Tunnel Junctions for III-V Multijunction Solar Cells Review Peter Colter *, Brandon Hagar * and Salah Bedair * Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695, USA * Correspondence: [email protected] (P.C.); [email protected] (B.H.); [email protected] (S.B.) Received: 24 October 2018; Accepted: 20 November 2018; Published: 28 November 2018 Abstract: Tunnel Junctions, as addressed in this review, are conductive, optically transparent semiconductor layers used to join different semiconductor materials in order to increase overall device efficiency. The first monolithic multi-junction solar cell was grown in 1980 at NCSU and utilized an AlGaAs/AlGaAs tunnel junction. In the last 4 decades both the development and analysis of tunnel junction structures and their application to multi-junction solar cells has resulted in significant performance gains. In this review we will first make note of significant studies of III-V tunnel junction materials and performance, then discuss their incorporation into cells and modeling of their characteristics. A Recent study implicating thermally activated compensation of highly doped semiconductors by native defects rather than dopant diffusion in tunnel junction thermal degradation will be discussed. AlGaAs/InGaP tunnel junctions, showing both high current capability and high transparency (high bandgap), are the current standard for space applications. Of significant note is a variant of this structure containing a quantum well interface showing the best performance to date. This has been studied by several groups and will be discussed at length in order to show a path to future improvements. Keywords: tunnel junction; solar cell; efficiency 1.
    [Show full text]
  • Novel High Efficiency Quadruple Junction Solar Cell with Current
    Article published in Solar Energy, v.139, 1 December 2016, p.100-107 https://doi.org/10.1016/j.solener.2016.09.031 Novel High Efficiency Quadruple Junction Solar Cell with Current Matching and Quantum Efficiency Simulations Mohammad Jobayer Hossaina, Bibek Tiwaria, Indranil Bhattacharyaa a ECE Department, Tennessee Technological University, Cookeville, Tennessee, 38501, USA Abstract: A high theoretical efficiency of 47.2% was achieved by a novel combination of In0.51Ga0.49P, GaAs, In0.24Ga0.76As and In0.19Ga0.81Sb subcell layers in a quadruple junction solar cell simulation model. The electronic bandgap of these materials are 1.9eV, 1.42 eV, 1.08 eV and 0.55 eV respectively. This unique arrangement enables the cell absorb photons from ultraviolet to deep infrared wavelengths of the sunlight. Emitter and base thicknesses of the subcells and doping levels of the materials were optimized to maintain the same current in all the four junctions and to obtain the highest conversion efficiency. The short-circuit current density, open circuit voltage and fill factor of the solar cell are 14.7 mA/cm2, 3.3731 V and 0.9553 respectively. In our design, we considered 1 sun, AM 1.5 global solar spectrum. Keywords: Novel solar cell, multijunction, quantum efficiency, high efficiency solar cell, current matching, optimization. 1. Introduction The inability of single junction solar cells in absorbing the whole solar spectrum efficiently and the losses occurred in their operation led the researchers to multijunction approach (Razykov et al., 2011; Xiong et al., 2010). A multijunction solar cell consists of several subcell layers (or junctions), each of which is channeled to absorb and convert a certain portion of the sunlight into electricity.
    [Show full text]
  • Thermal Diffusion Boron Doping of Single-Crystal Diamond Jung-Hun Seo1, Henry Wu2, Solomon Mikael1, Hongyi Mi1, James P
    Thermal Diffusion Boron Doping of Single-Crystal Diamond Jung-Hun Seo1, Henry Wu2, Solomon Mikael1, Hongyi Mi1, James P. Blanchard3, Giri Venkataramanan1, Weidong Zhou4, Sarah Gong5, Dane Morgan2 and Zhenqiang Ma1* 1Department of Electrical and Computer Engineering, 2Department of Materials Science and Engineering, 3Department of Nuclear Engineering and Engineering Physics, 4Department of Electrical Engineering, NanoFAB Center, University of Texas at Arlington, Arlington, TX 76019, USA, 5Department of Biomedical Engineering and Wisconsin Institute for Discovery, University of Wisconsin-Madison, Madison, WI 53706, USA Keywords: Boron doping, diamond, diode, rectifier, nanomembrane, silicon, thermal diffusion, vacancy *Authors to whom correspondence should be addressed. Electronic address: [email protected] Abstract: With the best overall electronic and thermal properties, single crystal diamond (SCD) is the extreme wide bandgap material that is expected to revolutionize power electronics and radio-frequency electronics in the future. However, turning SCD into useful semiconductors requires overcoming doping challenges, as conventional substitutional doping techniques, such as thermal diffusion and ion implantation, are not easily applicable to SCD. Here we report a simple and easily accessible doping strategy demonstrating that electrically activated, substitutional doping in SCD without inducing graphitization transition or lattice damage can be readily realized with thermal diffusion at relatively low temperatures by using heavily doped Si nanomembranes as a unique dopant carrying medium. Atomistic simulations elucidate a vacancy exchange boron doping mechanism that occur at the bonded interface between Si and diamond. We further demonstrate selectively doped high voltage diodes and half-wave rectifier circuits using such doped SCD. Our new doping strategy has established a reachable path toward using SCDs for future high voltage power conversion systems and for other novel diamond based electronic devices.
    [Show full text]