Soft-Switching Technology of Three-Phase Six-Switch PFC Rectifier

energies

Article Soft-Switching Technology of Three-Phase Six-Switch PFC Rectiﬁer

Qihui Zhen 1,2,3 and Qingyun Di 1,2,3,*

1 Institute of Geology and Geophysics, Innovation Academy for Earth Science, CAS, Beijing 100029, China; [email protected] 2 Frontier Technology and Equipment Development Center for Deep Resources Exploration, Institute of Geology and Geophysics, CAS, Beijing 100029, China 3 Key Laboratory of Shale Gas and Geoengineering, Institute of Geology and Geophysics, CAS, Beijing 100029, China * Correspondence: [email protected]; Tel.: +86-010-82998216

Received: 25 July 2020; Accepted: 22 September 2020; Published: 2 October 2020

Abstract: An active clamp, three-phase, six-switch power factor correction rectifier with a one-cycle controller is proposed, which can effectively suppress the reverse recovery of the reverse parallel diode of the bridge arm switch and reduce the reverse recovery loss. The main switches and auxiliary switch are both zero-voltage switches. It works in a fixed switching frequency and low power stress during the switching period. The specific working process and control circuit are analyzed in detail, and the model simulation is carried out. The experimental platform of a 2.5 KW prototype, with a complete test and verification of the soft switch technology proposed in this paper, was set up in the laboratory.

Keywords: soft switching; PFC; rectiﬁer; compound active clamp

1. Introduction The early three-phase power factor correction (PFC) (PFC) rectifier is derived from the single-phase PFC rectifier system and/or passive three-phase diode rectifier [1,2]. Since then, the research on a three-phase power correction circuit and its control have rapidly developed [3]. Three-phase current senseless control for a PFC bridge converter is proposed and implemented on the Digital Signal Processor (DSP) based platform in reference [4]. A bridgeless, four-switch, three-phase rectifier is proposed in reference [5], and it can operate with any pulse width modulation (PWM) method used in a standard three-phase, six-switch voltage source rectifier. Fewer semiconductors than any other topology of its kind have been used in the proposed converter. Azazi, H.Z presents a single-stage, three-phase power factor correction (PFC) rectifier using a single-switch boost regulator with less than 5% total harmonic distortion (THD) in the supply current [6]. A three-phase, single-stage AC-DC converter with topology utilizing SiC MOSFETs is proposed and analyzed by Zhang, Z [7]. Compared with DCM mode operating in other single-stage converters, continuous current mode (CCM) mode is working in the proposed converter, which reduces the current stress running through the semiconductor devices. However, its efficiency decreases rapidly with a further increase of power. Therefore, the proposed circuit is mostly suitable for low power applications.Wu, H investigated the topologies, operation principles, and modulation strategies of a three-port three-phase rectifier (TPTPR). The study improves the overall efficiency of the TPTPR-based AC-DC power conversion system [8]. Mallik, A proposed a three-phase boost power factor correction (PFC) using a single DC output voltage sensor is controlled by another methodology [9]. The current state of input voltage and input current is estimated by measuring the ripple information on the DC link voltage, and the

Energies 2020, 13, 5130; doi:10.3390/en13195130 www.mdpi.com/journal/energies Energies 2020, 13, 5130 2 of 15 controller is constructed under the condition that the three-phase input voltage has strict symmetry. Huber, L show a three-phase, six-switch boost PFC rectifier with average-current control [10]. It is examined whether the output-voltage transient response with respect to input-voltage changes can be improved by the proportional compensation with input-voltage feedforward only if duty-cycle feedforward is also implemented. Three-phase power factor correction AC-DC conversion, which has high conversion efficiency and fewer semiconductor devices, is a common application for middle or large power three-phase rectifiers. Switching loss based on hard switching is a significant portion of the total loss of the converter. Moreover, electromagnetic interference (EMI) noise and conversion efficiency conducted by the high di/dt, which comes from the reverse recovery problem of the six switches anti-parallel diodes, requires attention [4–10]. The aforementioned problems with hard switched power factor correction (PFC) can be solved by soft switching technology achieved by modifying control and adding auxiliary circuits. Lin C.W proposed a soft-switching assist circuit for a three-phase six-switch rectifier was used to achieve zero voltage switching (ZVS) in the main switches and zero current switching (ZCS) in the auxiliary switch, and consists of an auxiliary switch, a resonant inductor, a transformer, three barrier diodes, and a clamp RDC circuit [11]. Another soft switching circuit is proposed by Nagai, S that has only two active power semiconductor devices, which consists of one ARCPL (auxiliary resonant commutated pole link) circuit and one ARDCL (auxiliary resonant DC link) circuit. Compared with the hard switching circuit, the conversion efficiency of the proposed circuit could improve from 88.5% to 90.5%, which is confirmed on the 50 kVA system experiment [12]. Divan, D.M developed a zero-switching-loss inverters features voltage stresses which are about 1.3 times than DC-LINK volte [13]. Furthermore, the resonant dc link converter has been used for a high-frequency inverter system, which is presented by Venkataramanan, G [14]. This system uses a discrete pulse modulation strategy based on the cost function regulator, and the transient performance is improved by the additional switching arms. Qu, K.Q proposed an auxiliary resonant commutated pole link (ARCPL) for three-phase PWM rectifiers which consists of two auxiliary switches, one resonant inductor, and six diodes. The six main switches act under the ZVS state, while the two auxiliary switches work under the ZCS state. From the trend of the efficiency curve in the reference, when the output power exceeds 1.1 kW, the efficiency starts to decline gradually [15]. In another study, McMurray, W introduced resonant snubbers with auxiliary switches [16]. However, resonant snubbers including auxiliary active devices and their control introduce considerable complexity. Also, zero current transition (ZCT) topology was proposed by Mao, H [17] for high-power applications. A three-phase PWM rectifier proposed in the reference consists of three resonant capacities, three resonant inductors and three auxiliary switches. The turn off losses have been practically eliminated with the main switches turned off under the zero current condition and a low-power auxiliary ZCT circuit. The resonant DC link converter with high voltage rating, high auxiliary switching frequency, unfixed switching frequency and high noise requires a discrete PWM strategy [12–15], which can potentially lead to sub-harmonic oscillations. Therefore, the auxiliary resonant circuit on the AC side with fixed switching frequency is placed in the resonant pole converter which adopts SVM control methods. However, the cost of the auxiliary circuit with six additional switches and their gate drivers is difficult to control [16,17]. The auxiliary circuit including the apartments with one resonant inductor and three additional bidirectional switches, which using ZVS strategy is proposed by Mallik, A [18]. Two equal capacitors across the DC link are put in a series combination to access the midpoint of the output implemented, which avoid an additional resonant capacitor. However, mismatch in equal voltage sharing across two series capacitors would be caused by a potential issue, and also, the cost should increase by the three additional bidirectional switches. A compact auxiliary circuit, which consists of one LC branch and one auxiliary switch, is used in the three-phase six-switch PFC, which is another effective soft-switching strategy [19–21]. The converter costs become very low due to the use of fewer components and the main six switches and one auxiliary switch can work in ZVS state, which thus reduces the extra losses Energies 2020, 13, 5130 3 of 15

Energies 2020, 13, x FOR PEER REVIEW 3 of 16 from the add-on system significantly. However, the controller must be implemented by intelligent intelligentchips such chips as DSP. such Also, as DSP. the ZVSSVMAlso, the ZVSSVM control algorithm control algorithm is proposed is proposed in current in references current references which is whichcomplex is complex and diffi cultand todifficult popularize. to popularize. AA one-cycle one-cycle control control (OOC) (OOC) soft-switching soft-switching technology technology is is proposed proposed in in this this paper paper to to alleviate alleviate the the aforementionedaforementioned issues issues of of existing existing methods. methods. The The OO OOCC controller controller is is composed composed of of a a reset reset integrator, integrator, flip-flop,flip-flop, and and other other simple simple circuits, circuits, which which simplifies simplifies the the controller controller design, design, reduces reduces the the control control cost, cost, andand makes makes it iteasy easy to tomaintain maintain [22 [–28].22–28 This]. Thispaper paper proposes proposes the control the control strategy, strategy, which needs which a needs certain a timecertain interval time interval ahead aheadof the ofmain the mainsix switches six switches driving driving signal signal produced produced by by the the common common one-cycle one-cycle controllercontroller to to drive drive the the auxiliary switch switch in in the circuit. The The control control strategy strategy divides divides the the phase phase voltage voltage intointo six six regions regions in in a a cycle, cycle, which which is is different different from from the ZVSSVM ZVSSVM with with 12 12 regions regions proposed proposed in in existing existing references.references. In In addition, addition, the the controller controller proposed proposed in in th thisis paper paper only only needs needs ordinary ordinary circuit circuit chips chips instead instead ofof intelligent ones. In thisthis paper,paper, the the feasibility feasibility of of the the algorithm algorithm is is verified verified by by model model simulation, simulation, and and the theaccuracy accuracy of the of the system system is verified is verifi byed theby the actual actual 2.5-KW 2.5-KW rectifier. rectifier. ThisThis paper paper is is devoted devoted to to rectifiers rectifiers with with soft-swi soft-switchingtching technology technology for for active active clamp, clamp, three-phase, three-phase, six-switchsix-switch PFC PFC rectifiers. rectifiers. The The circuit circuit of ofthe the proposed proposed soft-switching soft-switching PFC PFC rectifier rectifier is reviewed is reviewed in Sectionin Section 2 2and and the the proposed proposed soft-switching soft-switching PFC PFC controller controller is is described described in in detail detail in Section 3.3. ExperimentalExperimental verification verification is given for the the rectifier rectifier in in Section Section 44.. Section 5 5 discussesdiscusses thethe systemsystem inin detail.detail. Finally,Finally, a conclusion is provided in Section6 6..

2.2. Circuit Circuit of of the the Proposed Proposed Soft-Switching Soft-Switching PFC PFC Rectifier Rectiﬁer TheThe compound compound active-clamping active-clamping ZVS ZVS three-phase three-phase PFC PFC rectifier rectiﬁer is is shown shown in in Figure Figure 11.. Within thethe dotteddotted wire wire frame frame is is the the auxiliary auxiliary circuit circuit of the main and auxiliary switches to realize soft switching.

Lr Cc + Sap Sbp Scp Cr L C1 C3 C5 Va ia L Sr Vb ib O c L V ic C RL San Sbn Scn C2 C4 C6 - FigureFigure 1. 1. CompoundCompound active active clamp clamp ZVS ZVS three-phase three-phase VSR VSR circuit. circuit. The rectifier is a standard six-switch, three-phase boost PFC with an added auxiliary circuit, The rectifier is a standard six-switch, three-phase boost PFC with an added auxiliary circuit, which includes an auxiliary switch Sr, a clamp capacitor Cc, and a resonant inductor Lr. The working which includes an auxiliary switch Sr, a clamp capacitor Cc, and a resonant inductor Lr. The working frequency of the auxiliary switch is the same as that of the main switches. The switching frequency of frequency of the auxiliary switch is the same as that of the main switches. The switching frequency the converter is fixed. With a one-cycle control strategy, all the main and auxiliary switches can be of the converter is fixed. With a one-cycle control strategy, all the main and auxiliary switches can be zero-voltage switched, and the switches have low voltage stress. The reverse recovery current of the zero-voltage switched, and the switches have low voltage stress. The reverse recovery current of the switch reverse parallel diode is also suppressed. switch reverse parallel diode is also suppressed. The three-phase, six-switch rectifier controlled by conventional SPWM or SVM requires six current The three-phase, six-switch rectifier controlled by conventional SPWM or SVM requires six commutations in one operating cycle. If the bridge arm switch with the largest phase current is not current commutations in one operating cycle. If the bridge arm switch with the largest phase current operated, the four current commutations will occur in one switching cycle, two of which are the reverse is not operated, the four current commutations will occur in one switching cycle, two of which are parallel diode commutating to the opposite switch, and the other two are the switches commutating to the reverse parallel diode commutating to the opposite switch, and the other two are the switches the opposite reverse parallel diode. The former two are natural soft switches, while the latter two are commutating to the opposite reverse parallel diode. The former two are natural soft switches, while hard switches, and the reverse recovery of the diode exists. the latter two are hard switches, and the reverse recovery of the diode exists. In a compound active clamp converter, the auxiliary switch operates only once during a period of In a compound active clamp converter, the auxiliary switch operates only once during a period the main switch’s operation, resonates the DC bus to zero, and creates the condition of a zero voltage of the main switch’s operation, resonates the DC bus to zero, and creates the condition of a zero switch for the main switches. The switching of two main switches with reverse recovery must be voltage switch for the main switches. The switching of two main switches with reverse recovery must be completed in this zero voltage time. This paper presents an improved one-cycle control method which can realize this process.

Energies 2020, 13, 5130 4 of 15 completed in this zero voltage time. This paper presents an improved one-cycle control method which Energiescan realize 2020, 13 this, x FOR process. PEER REVIEW 4 of 16

3.3. One One Cycle Cycle Controller Controller InIn this this part, thethe traditionaltraditional one-cycle one-cycle control control [21 [21]] is brieﬂyis briefly introduced, introduced, and and the processthe process of the of main the mainbridge bridge arm switcharm switch is analyzed. is analyzed. On this On basis, this an basis, improved an improved one-cycle one-cycle control method control ismethod proposed, is proposed,and the detailed and the process detailed of process realizing of the realizing soft-switching the soft-switching action of the action active of clamp the active ZVS three-phaseclamp ZVS three-phaserectiﬁer circuit rectifier in Figure circuit1 is in analyzed. Figure 1 is analyzed.

3.1.3.1. One One Cycle Cycle Controller Controller for for Three-Phase Three-Phase PFC PFC Rectifier Rectiﬁer TheThe three-phase three-phase voltage voltage is is divided divided into into six six regions regions in a cycle, each of which is 6060°as◦ as shown shown in in FigureFigure 22.. The polarity of the phase with the largest voltage is always opposite to that of the other two phases.phases. Therefore, onlyonly twotwo phase phase currents currents with with the th samee same polarity polarity need need to be to controlled be controlled in each in region. each region.Due to Due thefact to the that fact sum that of sum three of phase three currentsphase cu withoutrrents without the middle the middle line equals line equals zero, thezero, third the phasethird phasewill be will controlled be controlled after controlling after controlling two phases. two phases.

120º 60º Va Vb Vc 1 2 3 1

180º 0º 4 6

-1 240º 300º 123456 0º 180º

Figure 2. Voltage partitioning principle in three-phase balance power system. Figure 2. Voltage partitioning principle in three-phase balance power system. In the first region [0◦, 60◦], the three-phase control can be realized by controlling the switches San andIn Scn thein Figurefirst region1. The [0°,60°], equivalent the three-phase duty cycles contro are givenl can by be realized by controlling the switches San and Scn in Figure 1. The equivalent duty cycles are given by   dap = 1 dan   =−−  ddapd 1= 0 an (1)   bp  = ddcpbp = 01 dcn (1) −  =− ddcp1 cn where dxx denotes the duty cycle of Sxx. whereAccording dxx denotes to the reference duty cycle [21], of the Sxx parameter. Vm is defined as According to reference [21], the parameter Vm is defined as V Rs V = dc (2) m VR⋅ · = dcRe s Vm (2) Re where Rs is the equivalent resistance of current detection and Re is the equivalent input resistance whereof rectifier. Rs is the equivalent resistance of current detection and Re is the equivalent input resistance of rectifier.So the one-cycle control equation can be obtained as follows So the one-cycle control equation" can be #obtained" as follows# " # 1 dan 2 1 ia Vm −1− di= Rs 21  (3) VR1 dbn an=⋅· 1 2 ⋅· a ib ms−−   (3) 1 dibn12  b According to Formula (3), the core control circuit of the one-cycle controller can be obtained as shownAccording in Figure to3. Formula (3), the core control circuit of the one-cycle controller can be obtained as shown in Figure 3.

Energies 2020, 13, x FOR PEER REVIEW 5 of 16 Energies 2020, 13, x FOR PEER REVIEW 5 of 16 Energies 2020, 13, 5130 5 of 15 Energies 2020, 13, x FOR PEER REVIEW 5 of 16 Rsip 2 Sp Rsip R Q Sp 2 R Q Rsip S Q Sp 2 R Q S Q

S Q Sn S Q Sn S Q Rsin R Q Sn 2 S Q Rsin R Q 2 Rsin R Q 2 clock clock Vm(1-t/Ts) Vdc* Vm clock PI Vm(1-t/Ts) Vdc* - PI Vm Vdc Vm(1-t/Ts) Vdc*- Vm Vdc PI - Vdc Figure 3. Core Circuit of one-cycle controller. Figure 3. Core Circuit of one-cycle controller. Figure 3. Core Circuit of one-cycle controller. Figure 3. Core Circuit of one-cycle controller. For different control regions, ip and in are different, which can be any two of the currents ia, ib and For different control regions, ip and in are different, which can be any two of the currents ia, ib and ic. Similarly,For diff erentthe switches control corresponding regions, ip and iton areSp and diff erent,Sn have which different can bechoices any two in different of the currents controli aregions., ib and ic. Similarly,For different the switches control corresponding regions, ip and to in Sarep and different, Sn have which different can choices be any twoin different of the currents control regions.ia, ib and ic. Similarly,According the to switches Figure corresponding2, the partition to ci Srcuitp and is Sasn haveshown di ffinerent Figure choices 4 below. in di fferent control regions. ic. Similarly,According the to switches Figure 2,corresponding the partition tocircuit Sp and is Sasn haveshown different in Figure choices 4 below. in different control regions. According to Figure2, the partition circuit is as shown in Figure4 below. According to Figure 2, the partition circuit is as shown in Figure 4 below. Region 1 Region 1 Va Region 1 Va A A Region 2 A A Region 2 Va A Region 2 A Region 3 Vb B Region 3 Vb B B B Region 3 Vb Region 4 B B Region 4 Vc Region 4 Vc C C Region 5 C C Region 5 Vc C C Region 5 Region 6 Region 6 Region 6 Figure 4. TheThe partition partition circuit. Figure 4. The partition circuit. The purpose ofof aa one-cycleone-cycle control controlFigure can can be4. be The achieved achieved partition by by circuit. selecting selecting the the input input and and output output signals signals of the of thecontrol controlThe circuit purpose circuit in Figureof in a Figure one-cycle3 from 3 from the control output the outputcan region be achievedregion signals signals ofby the selecting of partition the partition the circuit input circuit inand Figure output in Figure4. The signals input4. The of theinputselection controlThe selection purpose circuit circuit circuit and inof outputFigurea andone-cycle output 3 driving from control driving the signal output can signal of be the region achieved of controller the signals controller by is selecting of shown the is shownpartitionin the Figure input in circuitFigure5 .and output in5. Figure signals 4. The of inputthe control selection circuit circuit in Figureand output 3 from driving the output signal region of the signalscontroller of theis shown partition in Figure circuit 5.in Figure 4. The

input selection circuit and output drivingRegion 1 signal of the controllerSp is shown in Figure 5. Sp RegionRegion 1 2 Region 1 Sp RegionRegion 2 3 Region 2 Rsip RegionRegion 3 4 Rsip Sap RegionRegion 4 3 Region 1 Region 5 s a | s a| Sap R i R i Rsip Region 1 San Precision Rectifier RegionRegion 5 4 Region 2 s a | s a| Region 6 R i R i SSanap Precision Rectifier RegionRegion 2 1 Sbp RegionRegion 6 5 Region 3 Rsia |Rsia| SSbpan Rsib Precision Rectifier |Rsib| RegionRegion 3 2 Sbn Precision Rectifier Region 6 Region 4 Rsib |Rsib| Region 1 SSbnbp Precision Rectifier RegionRegion 4 3 Scp Region 1 Region 5 Rsib |Rsib| Region 2 Rsic Precision Rectifier |Rsic| RegionRegion 5 4 SScpbn Precision Rectifier Region 6 Scn RegionRegion 2 1 Rsic |Rsic| Region 3 Precision Rectifier RegionRegion 6 5 SScncp RegionRegion 3 2 Rsin Rsic |Rsic| Region 4 Precision Rectifier Rsin Region 6 Scn RegionRegion 4 3 Region 5 Rsin RegionRegion 5 4 Region 6 Sn Sn RegionRegion 6 5 Figure 5. PrincipleRegion diagram 6 of input andSn output signal of controller. Figure 5. Principle diagram of input and output signal of controller. Figure 5. Principle diagram of input and output signal of controller. Figure 5. Principle diagram of input and output signal of controller.

Energies 2020, 13, 5130 6 of 15 Energies 2020, 13, x FOR PEER REVIEW 6 of 16

Combining Figures Figure3 3–5,, Figure a three-phase4, and Figure six-switch5, a three-phase PFC rectifier six-switch one-cycle PFC controller rectiﬁer is one-cycle formed. In eachcontroller control is formed.cycle, only In eachtwo controlof the six cycle, switches only two have of switching the six switches operations have switchingwhile the operationsother four switcheswhile the are other in fourno-operation switches areand in are no-operation acted by anda reverse are acted parallel by a reversediode. parallelThe two diode. switches The that two participateswitches that in the participate action of inthe the switch action are of always the switch turned are on always at the turnedsame time on at first. the same After time a period at ﬁrst. of time,After the a period two switches of time, theare twoclosed switches successively, are closed as shown successively, in Figure as shown6. in Figure6.

FigureFigure 6. DrivingDriving waveforms waveforms of of two two switches switches in in one-cycle one-cycle control. control. The sequence of closing two action switches is determined by the working region, and the two The sequence of closing two action switches is determined by the working region, and the two switches involved in operation are either both upper arm or lower arm at the same time, so there switches involved in operation are either both upper arm or lower arm at the same time, so there will will not be a case where one is in upper arm and the other is in lower arm. In each working region, not be a case where one is in upper arm and the other is in lower arm. In each working region, the the operation mode of the switches participating in the switching action is the same. In a switch operation mode of the switches participating in the switching action is the same. In a switch cycle, cycle, each bridge arm has one current commutation. When the switch is turned off, it is a soft switch, each bridge arm has one current commutation. When the switch is turned off, it is a soft switch, and and when the switch is reset and turned on, it is a hard switch. For soft switching when the switch is when the switch is reset and turned on, it is a hard switch. For soft switching when the switch is reset reset and turned on, it is necessary to make amends to the one-cycle control, as illustrated above. and turned on, it is necessary to make amends to the one-cycle control, as illustrated above. 3.2. The Proposed One Cycle Controller 3.2. The Proposed One Cycle Controller The one-cycle controlled ZVS three-phase compound active clamp rectifier requires the main The one-cycle controlled ZVS three-phase compound active clamp rectifier requires the main switches and the auxiliary switch to work at the same frequency. The auxiliary switch is always turned switches and the auxiliary switch to work at the same frequency. The auxiliary switch is always off before the main switches turn on in all situations. At this time, the auxiliary resonant inductance turned off before the main switches turn on in all situations. At this time, the auxiliary resonant current discharges the parallel capacitors of the main switches to make the arm’s volt resonate to zero inductance current discharges the parallel capacitors of the main switches to make the arm’s volt and then turn on the main switches. The purpose of this is to realize zero-voltage turn-on. In addition, resonate to zero and then turn on the main switches. The purpose of this is to realize zero-voltage due to the existence of auxiliary resonant inductance, the reverse recovery characteristics of the switch turn-on. In addition, due to the existence of auxiliary resonant inductance, the reverse recovery diode in parallel are suppressed. The driving waveform of the auxiliary switch Sr is characterized by characteristics of the switch diode in parallel are suppressed. The driving waveform of the auxiliary turning off before the two control switches Sn and Sp turn on, and turning on before the two control switch Sr is characterized by turning off before the two control switches Sn and Sp turn on, and turning switches Sn and Sp turn off. The improved one-cycle control does not need to change the original on before the two control switches Sn and Sp turn off. The improved one-cycle control does not need control circuit, but only needs to process the clock reset signal of the one-cycle control to obtain the to change the original control circuit, but only needs to process the clock reset signal of the one-cycle driving signal of the auxiliary switch, as shown in Figure7. control to obtain the driving signal of the auxiliary switch, as shown in Figure 7. The method of processing is to get two delays tds for clock signal, and obtain the signals clk1 and clk2 respectively. Then, the two signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switch Sr. Finally, the driving signal of Sr is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for the clock circuit is flexible, and can include circuits such as the crystal oscillator circuit or a clock pulse generator composed of 555 timers. For the delay circuit, the simplest method is to use an RC charging and discharging circuit and shape the waveform through a logic gate circuit. For the compression process of fetching Sr, the driving signal, a simple delay circuit adds an AND gate can be used. The process described above can also be implemented by programmable logic devices.

Energies 2020, 13, x FOR PEER REVIEW 7 of 16

Clock Delay Delay clk_set clock clk1 clk2 circle circuit circuit Delay （Ts）（td）（td） circuit

（tsd）

clock

Energies 2020, 13, 5130 clk1 7 of 15 Energies 2020, 13, x FOR PEER REVIEWtd 7 of 16

clk2 Sr ts Clock Delay Delay clk_set Sr clock clk1 clk2 circle circuit circuit Delay tsd （Ts）（td）（td） circuit

（t d） clk_set s

clockSn

td clk1Sp td

clk2 Figure 7. Improved one-cycle control waveform processing.

The method of processingSr is to get two delays tds for clock signal, and obtain the signals clk1 and clk2 respectively. Then, the twotsd signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switchclk_set Sr. Finally, the driving signal of Sr is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for the clock circuit is flexible,Sn and can include circuits such as the crystal oscillator circuit or a clock pulse generator composed of 555 timers. For the delay circuit, the simplest method is to use an RC Sp charging and discharging circuit and shape the waveform through a logic gate circuit. For the compression process ofFigure Figurefetching 7. 7.Improved ImprovedSr, the driving one-cycle one-cycle signal, control control a waveformsimple waveform delay processing. processing. circuit adds an AND gate can be used. The process described above can also be implemented by programmable logic devices. TheTheThe method specific speciﬁc of workingworking processing waveformwaveform is to get of twoof the the delays three-phase three-phase tds for active clock active clampsignal, clampPFC and PFC rectiﬁerobtain rectifier the soft signals switch soft switchclk1 is shown and is clk2shownin Figurerespectively. in 8Figure. 8.Then, the two signals of clk1 and clk2 are processed to obtain the driving signal of the auxiliary switch Sr. Finally, the driving signal of Sr is anti-compressed to obtain the clk_set signal, which is used as the reset clock signal of the one-cycle core control circuit. The selection choice for iLr the clock circuit is flexible, and can include circuits such as the crystal oscillator circuit or a clock pulse generator composedVcr of 555 timers. For the delay circuit, the simplest method is to use an RC charging and discharging circuit and shape the waveform through a logic gate circuit. For the Vcn compression process of fetching Sr, the driving signal, a simple delay circuit adds an AND gate can be used. The process describedVcp above can also be implemented by programmable logic devices. The specific working waveform of the three-phase activeTs clamp PFC rectifier soft switch is shown in Figure 8. Sr

iLr Sn

Vcr Sp Vcn

Vcp t0 t1 t2 t3 t4 t5 t6 t7 t8 Ts FigureFigure 8. 8. TheThe key key waveforms waveforms of of the the proposed proposed soft-switched soft-switched rectifier. rectiﬁer. Sr The saw-tooth wave is the current waveform i of the resonant inductance. The three dotted lines The saw-tooth wave is the current waveformLr iLr of the resonant inductance. The three dotted are voltages of the two main switches Vcn, Vcp and one auxiliary switch Vcr. From the waveform, it can lines are voltages of theS twon main switches Vcn, Vcp and one auxiliary switch Vcr. From the waveform, itbe can inferred be inferred that the that three the switches three switches are all turnedare all onturned when on the when voltage the is voltage zero, thus is zero, achieving thus achieving the goal of zero voltage conduction. Because each switch has a parallel capacitor, the zero voltage turning oﬀ of Sp the switch is guaranteed. Therefore, all switches are zero voltage action, and the whole circuit achieves soft switching. t0 t1 t2 t3 t4 t5 t6 t7 t8 Figure 8. The key waveforms of the proposed soft-switched rectifier.

The saw-tooth wave is the current waveform iLr of the resonant inductance. The three dotted lines are voltages of the two main switches Vcn, Vcp and one auxiliary switch Vcr. From the waveform, it can be inferred that the three switches are all turned on when the voltage is zero, thus achieving

Energies 2020, 13, x FOR PEER REVIEW 8 of 16 the goal of zero voltage conduction. Because each switch has a parallel capacitor, the zero voltage

Energiesturning2020 off, 13of, 5130the switch is guaranteed. Therefore, all switches are zero voltage action, and the whole8 of 15 circuit achieves soft switching.

3.3. Operating Modes overOver a a Switching Switching Cycle Cycle InIn anyany workingworking region,region, thethe correspondingcorresponding equivalentequivalent rectiﬁerrectifier circuitcircuit isis shownshown inin FigureFigure9 .9.

C1 Sbp

Lp iLp Lr iLr

C5 Dp Cr Cc

iLn Ln VCc

Vp Vn Dn Sr C Vdc Sn Cn Sp Cp

Dt Lt iLt

Figure 9. Equivalent rectiﬁerrectifier circuit.

InIn thethe secondsecond halfhalf ofof thethe ﬁrstfirst regionregion [30[30°,60°],◦, 60◦], the currents of phases a and c are positive and the current of phasephase b is negative. At this region, it is then known that Figure 99 correspondscorresponds toto FigureFigure1 1.. V = V , V = V , L = L = L = L,D is S ’s parallel diode, S and C are S with its parallel Vpp = Vabab, Vn =n Vcb, Lcbp = Lpn= Lt n= L, tDt is Sbn’st parallelbn diode, Sn and Cnn are Scn withn itscn parallel capacitor, capacitor, D and C equivalent to S ’s parallel diode and capacitor, and S and C are San with its Dn and C5 equivalentn 5 to Scp’s parallelcp diode and capacitor, and Sp and Cp pare Sanp with its parallel parallel capacitor, D and C equivalent to Sap parallel diode and capacitor. capacitor, Dp and C1p equivalent1 to Sap parallel diode and capacitor. From FigureFigure8 ,8, it it can can be be seen seen that that there there are are eight eight operating operating modes modes in the in circuitthe circuit of Figure of Figure9 in one 9 in switchingone switching cycle. cycle. Taking Taking the ﬁrst the working first working region as re angion example, as an eight example, working eight modes working are analyzed modes oneare byanalyzed one. one by one.

3.3.1. Mode 1: (t0–t1) 3.3.1. Mode1:(t0-t1) All the main switches are turned off and the auxiliary switches Sr is turned on. In the first region, All the main switches are turned off and the auxiliary switches Sr is turned on. In the first region, the currents of phases A and C are positive, and the phase B current is negative, so the reverse parallel the currents of phases A and C are positive, and the phase B current is negative, so the reverse parallel diodes Dp,Dn, and Dt are turned on. In the resonant groove circuit consisting of auxiliary resonant diodes Dp, Dn, and Dt are turned on. In the resonant groove circuit consisting of auxiliary resonant inductor Lr, clamping capacitor Cc and auxiliary switch Sr, the voltage of auxiliary resonant inductor inductor Lr, clamping capacitor Cc and auxiliary switch Sr, the voltage of auxiliary resonant inductor Lr is the clamping capacitor voltage VCc, and the current of resonant inductor increases linearly with Lr is the clamping capacitor voltage VCc, and the current of resonant inductor increases linearly with the current change rate the current change rate di V Lr = Cc (4) di V dt Lr = LCcr dt L (4) At t = t1, the auxiliary switch Sr turns off, and thisr mode ends.

At t = t1, the auxiliary switch Sr turns off, and this mode ends. 3.3.2. Mode 2: (t1–t2)

3.3.2.At Mode2:(tt = t1, the1-t2) auxiliary switch is turned oﬀ and the auxiliary inductance current begins to decrease. The auxiliary inductance Lr resonates with capacitors Cr, C3, Cn, and Cp. Lr causes C3, Cn, and Cp to At t = t1, the auxiliary switch is turned off and the auxiliary inductance current begins to decrease. discharge and charges Cr. Because of the existence of Cr, the auxiliary switch Sr reaches zero voltage The auxiliary inductance Lr resonates with capacitors Cr, C3, Cn, and Cp. Lr causes C3, Cn, and Cp to and turns oﬀ. At t = t2, the voltage of the three main switches Sn,Sp, and Sbp and the parallel capacitors discharge and charges Cr. Because of the existence of Cr, the auxiliary switch Sr reaches zero voltage Cn, Cp, and C3 drops to zero and the resonance stops, and this mode ends. and turns off. At t = t2, the voltage of the three main switches Sn, Sp, and Sbp and the parallel capacitors Cn, Cp, and C3 drops to zero and the resonance stops, and this mode ends. 3.3.3. Mode 3: (t2–t3)

At t = t2,Sn and Sp parallel diodes start to turn on. After that, Dn and Dp diodes begin to enter the reverse recovery stage. The auxiliary inductance current continues to decrease with the relation depicted below: di V Lr = o (5) dt − Lr Energies 2020, 13, 5130 9 of 15

The duration of this mode is very short, which is the reverse recovery time of Dn and Dp diodes on the bridge arm.

3.3.4. Mode 4: (t3–t4)

At t = t3, when the Dn and Dp diodes are completely turned oﬀ, the auxiliary resonant inductance current is zero. Thereafter, the auxiliary resonant inductor Lr and capacitors C1, C3, C5, and Cr begin to resonate again. The voltages of C1, C3, and C5 begin to rise and the voltages of Cr start to decrease. At t = t4, the voltage of C1, C3, and C5 rises to Vo + VCc and auxiliary switch Sr has a voltage of zero. Sr is parallel to the diode clamp, causing resonance stop.

3.3.5. Mode 5: (t4–t5)

At t = t4, the current of the auxiliary inductor reaches the maximum negative polarity and begins increasing in polarity. The current of the auxiliary inductor rises linearly with the rate of change given by di V Lr = Cc (6) dt Lr

3.3.6. Mode 6: (t5–t6)

At t = t5, the main switch Sp is turned oﬀ, the input boost inductor charges Cp and discharges C1. Because of the existence of capacitor Cp,Sp achieves zero-voltage turn-oﬀ.

3.3.7. Mode 7: (t6–t7)

At t = t6, when Dp is turned on, the auxiliary resonant inductor Lr voltage is clamped on capacitor voltage VCc, and the auxiliary inductor current rate of change is as follows

di V Lr = Cc (7) dt Lr

3.3.8. Mode 8: (t7–t8)

At t = t7, the main switch Sn is turned oﬀ, the input boost inductor charges Cn and discharges C5. Because of the existence of the capacitor Cn,Sn achieves zero-voltage turn-oﬀ. At t = t8,Dn is turned on and then the entire process repeats from Mode 1.

4. Experimental Veriﬁcations In order to verify the validity of the above analysis of the soft switch working process, computer simulation and actual circuit platform experiments are conducted.

4.1. Computer Simulation Veriﬁcation Based on the design described, a simulation model was built. The phase voltage in the three-phase input was 110 V, the switching frequency was 10, kHz and the output load was 12.25 kW with an output of 350 V and a load of 10 Ω. Auxiliary circuit parameters include: resonant inductance Lr = 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. The simulation waveforms of ZVS on the main and auxiliary switches are shown in Figure 10. Energies 2020,, 13,, xx FORFOR PEERPEER REVIEWREVIEW 10 of 16

50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. The simulation waveforms 50Energies uH, 2020switch, 13, parallel 5130 capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. The simulation waveforms10 of 15 of ZVS on the main and auxiliary switches are shown in Figure 10.

Figure 10. ZVSZVS on on main and auxiliary switches.

As shown above in Figure 10,Sr is the auxiliary switch driving signal, Sn and Sp are the two main As shown above in Figure 10, Srr isis thethe auxiliaryauxiliary switchswitch drivingdriving signal,signal, SSnn andand SSpp areare thethe twotwo mainmain control switches on the bridge arm, Vdc link is the voltage on the bridge arm and Vsr is the voltage control switches on the bridge arm, Vdcdc linklink isis thethe voltagevoltage onon thethe bridgebridge armarm andand Vsrsr isis thethe voltagevoltage onon on the auxiliary switch. It can be seen from the figure that when the auxiliary switch is turned off, thethe auxiliaryauxiliary switch.switch. ItIt cancan bebe seenseen fromfrom thethe figurefigure thatthat whenwhen thethe auxiliaryauxiliary switchswitch isis turnedturned off,off, thethe the voltage on the bridge arm drops rapidly to zero. Then, due to the reverse recovery of the diode, voltage on the bridge arm drops rapidly to zero. Then, due to the reverse recovery of the diode, the the voltage on the bridge arm remains zero. During the period, the main switches achieve zero-voltage voltage on the bridge arm remains zero. During the period, the main switches achieve zero-voltage turn-on. At the end of the diode reverse recovery commutation, the voltage on the bridge arm begins turn-on.turn-on. AtAt thethe endend ofof thethe diodediode reversereverse recoveryrecovery commutation,commutation, thethe voltagevoltage onon thethe bridgebridge armarm beginsbegins to rise and the voltage on the auxiliary switch begins to drop to zero. At this time, the auxiliary toto riserise andand thethe voltagevoltage onon thethe auxiliaryauxiliary switchswitch beginsbegins toto dropdrop toto zero.zero. AtAt thisthis time,time, thethe auxiliaryauxiliary achieves zero-voltage turn-on. Finally, the zero-voltage turn-on of all switches is realized. Because the achieves zero-voltage turn-on. Finally, the zero-voltage turn-on of all switches is realized. Because capacitors are connected in parallel with the switch, the purpose of zero-voltage turn-off of all switches thethe capacitorscapacitors areare connectedconnected inin parallelparallel withwith thethe swswitch,itch, thethe purposepurpose ofof zero-vzero-voltage turn-off of all is ensured, and finally all switches are in soft switch operation. switches is ensured, and finally all switchesitches areare inin softsoft switchswitch operation.operation. The operation of the auxiliary circuit is shown in Figure 11. The operation of the auxiliary circuit is shown in Figure 11.

Figure 11. InductanceInductanceInductance currentcurrent andand clampingclamping capacitancecapacitance voltage voltage of of auxiliary auxiliary circuit. circuit.

Figure 11 shows that VCc is the clamping capacitor voltage and iLr is the resonant inductance Figure 11 shows that VCc isis thethe clampingclamping capacitorcapacitor voltagevoltage andand iiLrLr isis thethe resonantresonant inductanceinductance current. It can be seen that the resonant inductance current is a periodic saw-tooth wave, while the current. It can be seen that the resonant inductance current is a periodic saw-tooth wave, while the clamping capacitor voltage is almost unchanged in a period. The simulation is consistent with the clamping capacitor voltage is almost unchanged in a period. The simulation is consistent with the results from the previous analysis, further illustrating the accuracy of the constructed analysis. results from the previous analysis, further illustrating the accuracy of the constructed analysis. The input phase currents and phase voltages are shown in Figure 12. The input phase currents and phase voltages are shown in Figure 12. From Figure 12 The input current follows the change of the input voltage, thus realizing the purpose of power factor correction. Energies 2020, 13, x FOR PEER REVIEW 11 of 16

Energies 2020, 13, 5130 11 of 15 Energies 2020, 13, x FOR PEER REVIEW 11 of 16

Figure 12. Input phase current and phase voltage.

From Figure 12 The input current follows the change of the input voltage, thus realizing the purpose of power factor correction. Figure 12. Input phase current and phase voltage. Figure 12. Input phase current and phase voltage. 4.2. Verification Veriﬁcation of E Experimentalxperimental Platform From Figure 12 The input current follows the change of the input voltage, thus realizing the The experimental platform of 2.5 KW is shown in Figure 1313.. purpose of power factor correction.

4.2. Verification of Experimental Platform The experimental platform of 2.5 KW is shown in Figure 13.

Figure 13. Experimental platform.

The main circuit parameters are: input phase voltage Vi = 110 V, output DC voltage Vo = 350 V, The main circuit parameters are: input phase voltage Vi = 110 V, output DC voltage Vo = 350 V, input AC inductance L = 0.5 mH, switching frequency = 15 kHz, and load resistance R = 50 Ω. input AC inductance L = 0.5 mH, switching frequency = 15 kHz, and load resistance R = 50 Ω. Auxiliary circuit parameters: resonant inductance Lr = 50 uH, switch parallel capacitor C = 10 nF, Auxiliary circuit parameters: resonantFigure inductance 13. Experimental Lr = 50 platform. uH, switch parallel capacitor C = 10 nF, and and clamp capacitor Cc = 480 uF. clamp capacitor Cc = 480 uF. Set the two important time parameters tsd to 2.5 us and ts to 10 us. The resonant inductance TheSet mainthe two circuit important parameters time are:parameters input phase tsd to voltage 2.5 us Vandi = 110 ts to V, 10 output us. The DC resonant voltage Vinductanceo = 350 V, Energiescurrent 2020 and, 13 bridge, x FOR PEER arm REVIEW voltage are shown in Figure 14, which are basically consistent with12 of the 16 inputcurrent AC and inductance bridge arm L = voltage0.5 mH, are switching shown infrequency Figure 14, = 15which kHz, are and basically load resistance consistent R =with 50 Ωthe. simulation results. Auxiliarysimulation circuit results. parameters: resonant inductance Lr = 50 uH, switch parallel capacitor C = 10 nF, and clamp capacitor Cc = 480 uF. Set the two important time parameters tsd to 2.5 us and ts to 10 us. The resonant inductance current and bridge arm voltage are shown in Figure 14, which are basically consistent with the simulation results.

Figure 14. The voltage on the bridge arm and resonant inductance current. Figure 14. The voltage on the bridge arm and resonant inductance current.

In order to further explain whether the main switch and auxiliary switch are turned on at zero voltage, the voltage waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15.

10us Sr ts 2.5us Vdc_link 200V/div tsd Sn 2.5us 10us

Sp Time(us) 2us/div Ts 67us（15KHz）

Figure 15. Main switch turned on at zero voltage.

It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch are turned on to realize zero-voltage turn-on. Because of the existence of parallel capacitors, the switches can reach zero-voltage turn-off. Figure 16 shows the input one of three phase volt and current.

Figure 16. Input one of three phase volt and current.

The discontinuity of the current in Figure 16 is the transition point of the working region. Because of the limited channel of oscilloscope, only one phase voltage and current waveforms are given here. It can be seen that the input current follows the change of the input voltage, thus realizing the purpose of power factor correction.

EnergiesEnergies 2020 2020, ,13 13, ,x x FOR FOR PEER PEER REVIEW REVIEW 1212 of of 16 16

Energies 2020, 13, 5130FigureFigure 14. 14. The The voltage voltage on on the the bridge bridge arm arm an andd resonant resonant inductance inductance current. current. 12 of 15

InIn order order to to further further explain explain whether whether the the main main swit switchch and and auxiliary auxiliary switch switch are are turned turned on on at at zero zero voltage,voltage,In the orderthe voltage voltage to further waveforms waveforms explain on on whether the the bridge bridge the arm mainarm ar ar switchee expanded, expanded, and auxiliary and and two two switch time time parameters parameters are turned are onare set, atset, zero as as shownshownvoltage, in in theFigure Figure voltage 15. 15. waveforms on the bridge arm are expanded, and two time parameters are set, as shown in Figure 15.

10us10us Sr ts Sr ts 2.5us Vdc_linkVdc_link 2.5us 200V/div tsd 200V/div tsd Sn Sn 2.5us2.5us 10us10us

Sp Sp Time(us) 2us/div Ts 67us（15KHz） Time(us) 2us/div Ts 67us（15KHz） Figure 15. Main switch turned on at zero voltage. FigureFigure 15. 15. Main Main switch switch turned turned on on at at zero zero voltage. voltage. It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch are It can be seen that when the voltages are resonated to zero, the main switch and auxiliary switch turnedIt can on be to seen realize that zero-voltage when the voltages turn-on. are Because resona ofted the to existencezero, the main of parallel switch capacitors, and auxiliary the switches switch are turned on to realize zero-voltage turn-on. Because of the existence of parallel capacitors, the arecan turned reach zero-voltageon to realize turn-o zero-voltageﬀ. turn-on. Because of the existence of parallel capacitors, the switches can reach zero-voltage turn-off. switchesFigure can 16reach shows zero-voltage the input turn-off. one of three phase volt and current. FigureFigure 16 16 shows shows the the input input one one of of three three phase phase volt volt and and current. current.

FigureFigureFigure 16. 16. 16. Input InputInput one one one of of of three three three phase phase phase volt volt volt and and and current. current. current.

The discontinuity of the current in Figure 16 is the transition point of the working region. Because of TheThe discontinuitydiscontinuity ofof thethe currentcurrent inin FigureFigure 1616 isis thethe transitiontransition pointpoint ofof thethe workingworking region.region. the limited channel of oscilloscope, only one phase voltage and current waveforms are given here. BecauseBecause of of the the limited limited channel channel of of oscilloscope, oscilloscope, only only one one phase phase voltage voltage and and current current waveforms waveforms are are ItEnergies can be 2020 seen, 13 that, x FOR the PEER input REVIEW current follows the change of the input voltage, thus realizing the purpose13 of 16 givengiven here. here. It It can can be be seen seen that that the the input input current current foll followsows the the change change of of the the input input voltage, voltage, thus thus realizing realizing of power factor correction. thethe purpose purposeThe efficiency of of power power curvesfactor factor correction. ofcorrection. hard-switching and soft-switching three-phase PFC calculated from The eﬃciency curves of hard-switching and soft-switching three-phase PFC calculated from input input and output power are shown in the Figure 17. It can be seen that the converter under soft- and output power are shown in the Figure 17. It can be seen that the converter under soft-switching switching condition has higher efficiency. condition has higher eﬃciency. / % /

FigureFigure 17. 17.Converter Converter eefficiencyﬃciency curve.curve.

5. Discussion The compound clamp ZVS three-phase VSR circuit mentioned in reference [19–21], achieves ZVS in all switches, including auxiliary switches. The auxiliary circuit is simple and the additional system has a low extra loss. However, the ZVSSVM controller must be implemented by intelligent chips such as DSP, which is complex and difficult to popularize. The governing equation of the one cycle controller, which is derived based on the input current following the change of input voltage, determines the ability of the system to control the power factor close to 1 [22–28]. This paper adjusts and improves the original one cycle control strategy, by adding the driving signal of an auxiliary switch, which can complete the ZVS control of the compound clamp ZVS three-phase VSR circuit. Although only two switches on the main bridge arm are controlled, the conducting form of the third switch is replaced by the diode conducting in parallel with that switch. The improved one cycle control proposed in this paper share many similarities with the ZVSSVM control strategy in reference [19–21]. The major difference between the two systems stems from the use of ordinary circuits in the proposed technique to avoid complex computation used by the intelligent chip in ZVSSVM control strategy which needs to sample the voltage and current sensor signals and carry out multiple multiplications nonlinear operations to obtain the driving switch signals. There is a certain delay time in the process of data sample and calculation. The nonlinear multiplication operation brings calculation errors, and its anti-interference ability is not good enough. Due to the avoidance of complex calculation of the intelligent chip, the proposed system has better performance on real-time applications and stability. Formula (2) indicates that the input impedance has become a factor in the signal Vm rather than an estimated parameter. When the load changes, the input impedance also changes at the same time, then quickly reflects the signal Vm, and duty cycle adjustment is immediately started within the current control cycle. Therefore, different from traditional converter, the control system proposed in this paper has adaptive capability for input and output impedance. The proposed control algorithm is similar to the flat top SVM modulation method, so it can work at higher switching frequencies. In the denominator of the formula for calculating the pulse width of the flat-top SVM, there is a DC link voltage value factor, and the voltage pulsation of the dc link has a great disturbance to the PWM duty ratio, thus affecting the output voltage. Meanwhile, the duty cycle proposed in this paper is only related to the average input and output current after the equivalent transformation of Equation (3), which is also the reason why it is adaptive to the load. This controller requires synchronous switching between the interval signal and the drive signal. Otherwise, the input currents will have a large current pulse overshoot, which may destroy the switches under high power output. In this paper, the drive signals (Sn and Sp) are switched

Energies 2020, 13, 5130 13 of 15

5. Discussion The compound clamp ZVS three-phase VSR circuit mentioned in reference [19–21], achieves ZVS in all switches, including auxiliary switches. The auxiliary circuit is simple and the additional system has a low extra loss. However, the ZVSSVM controller must be implemented by intelligent chips such as DSP, which is complex and difficult to popularize. The governing equation of the one cycle controller, which is derived based on the input current following the change of input voltage, determines the ability of the system to control the power factor close to 1 [22–28]. This paper adjusts and improves the original one cycle control strategy, by adding the driving signal of an auxiliary switch, which can complete the ZVS control of the compound clamp ZVS three-phase VSR circuit. Although only two switches on the main bridge arm are controlled, the conducting form of the third switch is replaced by the diode conducting in parallel with that switch. The improved one cycle control proposed in this paper share many similarities with the ZVSSVM control strategy in reference [19–21]. The major difference between the two systems stems from the use of ordinary circuits in the proposed technique to avoid complex computation used by the intelligent chip in ZVSSVM control strategy which needs to sample the voltage and current sensor signals and carry out multiple multiplications nonlinear operations to obtain the driving switch signals. There is a certain delay time in the process of data sample and calculation. The nonlinear multiplication operation brings calculation errors, and its anti-interference ability is not good enough. Due to the avoidance of complex calculation of the intelligent chip, the proposed system has better performance on real-time applications and stability. Formula (2) indicates that the input impedance has become a factor in the signal Vm rather than an estimated parameter. When the load changes, the input impedance also changes at the same time, then quickly reflects the signal Vm, and duty cycle adjustment is immediately started within the current control cycle. Therefore, different from traditional converter, the control system proposed in this paper has adaptive capability for input and output impedance. The proposed control algorithm is similar to the flat top SVM modulation method, so it can work at higher switching frequencies. In the denominator of the formula for calculating the pulse width of the flat-top SVM, there is a DC link voltage value factor, and the voltage pulsation of the dc link has a great disturbance to the PWM duty ratio, thus affecting the output voltage. Meanwhile, the duty cycle proposed in this paper is only related to the average input and output current after the equivalent transformation of Equation (3), which is also the reason why it is adaptive to the load. This controller requires synchronous switching between the interval signal and the drive signal. Otherwise, the input currents will have a large current pulse overshoot, which may destroy the switches under high power output. In this paper, the drive signals (Sn and Sp) are switched synchronously by the clock signal trigging, such that the input current waveform will not have large disturbance, as shown in Figure 16. In addition, the optimization design of relevant resonance parameters of this method can only be adjusted empirically, and there is no strict theoretical basis, which is the arrangement of the next research work.

6. Conclusions An improved one-cycle control method combined with a compound active clamp ZVS three-phase rectiﬁer circuit topology is proposed in this paper, which can achieve six main switches and one auxiliary switch working in zero-voltage. The validity of the theoretical analysis is veriﬁed by computer simulation and an actual 2.5 kW experimental platform. The one cycle controller with low cost is very simple, only needs an integrator with reset and other accompanying logic circuit, and is adaptive to the change of load with fast response and less overshoot. Compared with the traditional space vector modulation (SVPWM) control method, one-cycle control is simpler to construct, easier to debug, and the system is more stable and reliable with lower costs to implement. Energies 2020, 13, 5130 14 of 15

Author Contributions: Q.Z. and Q.D. designed, debugged the system, built some parts of hardware, and performed the experiment; Q.Z. is also mainly responsible for the analysis, experiment, and preparing the paper; Q.D. supervised the design and analysis. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported by CAS Strategic forerunner Science and Technology Special funds (Category A) under grant XDA14050102, by R&D Center of Precursor Technology and Equipment for Deep Resources Exploration. Institute of Geology and Geophysics, Innovation Academy for Earth Science, CAS. Conﬂicts of Interest: The authors declare no conﬂict of interest.

Abbreviations

EMI Electromagnetic Interference PWM Pulse Width Modulation CCM Continuous Current Mode SPWM Sinusoidal Pulse Width Modulation SVM Space Vector Modulation ZVSSVM Zero Voltage Switch Space Vector Modulation ZVS Zero Voltage Switching ZCS Zero Current Switching DSP Digital Signal Processor VSR Voltage Source Rectiﬁer PFC Power Factor Correction ARCPL Auxiliary Resonant Commutated Pole Link ARDCL Auxiliary Resonant DC Link ZCT Zero-Current Transition OOC One Cycle Control

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