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Microprocessor lectures Addressing Mode 10th lecture

Addressing Mode Lecture objectives: at the end of this lecture the student will able to: 1- Understand the essential of instruction. 2- Define the addressing modes 3- Determine the types of addressing mode. 4- Know the addressing mode for any instruction.

1- Opcode Instruction Format: 1-1 Instruction definition: The instruction is an simple part of a program which is recognized by the computer and causes it to perform an operation. The set of instructions to which the 8085A CPU will respond is permanently fixed in the design of the chip. The 8085A implements a group of instructions that move data between registers, between registers and memory, and between registers and I/O ports. It also has arithmetic and logic instruction, conditional and unconditional branch instruction, and machine control instructions. The CPU recognizes these instructions only when they are coded in binary form. 1-2 instruction coding: Each instruction in 8085A has a 8- code called opcode which it is designed depending on the group of the instruction as below: some of abbreviations S S S or Register Name Rp. Symble R.P. D D D 1 1 1 A 0 0 B- 0 0 0 B 0 1 D-E 0 0 1 C 1 0 H-L 0 1 0 D 1 1 SP 0 1 1 E 1 0 0 H 1 0 1 L 1 1 0 M

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Microprocessor lectures Addressing Mode 10th lecture 1-2-1 Data Transfer Instructions:

1. MOV r1, r2 0 1 D D D S S S

2. MVI r, data 0 0 D D D 1 1 0

3. LXI rp, data 0 0 R P 0 0 0 1

4. LDA addr 0 0 1 1 1 0 1 0

5. STA addr 0 0 1 1 0 0 1 0 6. LHLD addr 0 0 1 0 1 0 1 0 7. SHLD addr 0 0 1 1 1 0 1 0 8. LDAX rp 0 0 R P 1 0 1 0 9. STAX rp 0 0 R P 0 0 1 0

10. XCHG 1 1 1 0 1 0 1 1 1-2-1 Arithmetic Instructions:

1. ADD r 1 0 0 0 0 S S S

2. ADC r 1 0 0 0 1 S S S

3. ADI data 1 1 0 0 0 1 1 0 4. ACI data 1 1 0 0 1 1 1 0

5. SUB r 1 0 0 1 0 S S S 6. SBB r 1 0 0 1 1 S S S 7. SUI data 1 1 0 1 0 1 1 0

8. SBI data 1 1 0 1 1 1 1 0

9. INR r 0 0 D D D 1 0 0

10. DCR r 1 0 D D D 1 0 1

11. INX rp 0 0 R P 0 0 1 1 12. DCX rp 0 0 R P 1 0 1 1 13. DAD rp 0 0 R P 1 0 0 1 14. DAA 0 0 1 0 0 1 1 1

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Microprocessor lectures Addressing Mode 10th lecture 1-3-1 Logic Instructions:

1. ANA r 1 0 1 0 0 S S S

2. XRA r 1 0 1 0 1 S S S

3. ORA r 1 0 1 1 0 S S S 4. ANI data 1 1 1 0 0 1 1 0 5. XRI data 1 1 1 0 1 1 1 0 6. ORI data 1 1 1 1 0 1 1 0

7. CMP r 1 0 1 1 1 S S S 8. CPI data 1 1 1 1 1 1 1 0 9. RLC 0 0 0 0 0 1 1 1

10. RRC 0 0 0 0 1 1 1 1

11. RAL 0 0 0 1 0 1 1 1

12. RAR 0 0 0 1 1 1 1 1 13. CMA 0 0 1 0 1 1 1 1 14. CMC 0 0 1 1 1 1 1 1 0 0 1 1 0 1 1 1 15. STC

1-4-1 Branch Instructions:

C C C CONDITION 0 0 0 NZ--(Z=0) 0 0 1 Z--(Z=1) 0 1 0 NC--(CY=0) 0 1 1 C--(CY=1) 1 0 0 PO--(P=0) 1 0 1 PE--(P=1) 1 1 0 P--(S=0) 1 1 1 M--(S=1)

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Microprocessor lectures Addressing Mode 10th lecture

1. JMP addr 1 1 0 0 0 0 1 1

2. J conditional 1 1 C C C 0 1 0

3. CALL addr 1 1 0 0 1 1 0 1

4. C conditional 1 1 C C C 1 0 0

5. RET 1 1 0 0 1 0 0 1

6. R conditional 1 1 C C C 0 0 0

7. RST n 1 1 N N N 1 1 1

8. PCHL 1 1 1 0 1 0 0 1

1-4-1 Stack, I/O, and machine Control Instructions:

* 1. PUSH rp 1 1 R P 0 1 0 1

2. POP rp 1 1 R P 0 0 0 1

3. XTHL 1 1 1 0 0 0 1 1

4. SPHL 1 1 1 1 1 0 0 1

5. IN port 1 1 0 1 1 0 1 1 6. OUT port 1 1 0 1 0 0 1 1 7. EI 1 1 1 1 1 0 1 1

8. DI 1 1 1 1 0 0 1 1

9. HLT 0 1 1 1 0 1 1 0

* The SP is replaced with PSW

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Microprocessor lectures Addressing Mode 10th lecture 2. Addressing Modes: 2.1 Definition of addressing mode: It is the different ways that used by microprocessor to access data. In each instruction, programmer has to specify 3 things:  Operation to be performed.  Address of source of data.  Address of destination of result. 2.2 Types of addressing modes: 2.2.1 Implied addressing mode: in this addressing mode, the operand is implied by instruction function, for example: STC CMA. 2.2.2 Register Addressing Mode: if the operand of the instruction is specify by register or by register pair, this means the addressing mode of this instruction is Register Addressing Mode. For example: PCHL MOV A,B. 2.2.3 Immediate Addressing Mode: in this addressing mode, the operand is 8-bit or 16-bit numbers written with instruction directly where used as data, for example: MVI D,45 LXI H,3645 ADI ,23. 2.2.4 Direct Addressing Mode: in direct addressing mode, the operand is 16-bit number is written in instruction directly where is used as address to memory location, for example: LDA 2000 JNC3400. 2.2.5 Register Indirect Addressing Mode: in this addressing mode, the operand is register pair written in instruction where the contents of this register pair used as address to memory location, for example: ADD M LDAX D 2.2.6 Combined Addressing Mode: some instructions is used combination of above mentioned addressing mode. for example: CALL 3000 instruction combines direct addressing mode (where the operand is found in instruction as address to memory location which represent the beginning of subroutine) and register indirect addressing mode (where the address of memory location that loaded with code of instruction that following the CALL instruction will saved in stack memory and the address of stack memory taken from register SP).

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