Nzenwata Uchenna J et al., GJAI, 2019; 1:5 INTRODUCTION This paper discusses the original purposes of the transputer technology, how they have been The word transputer is a derivative name from the addressed over the intervening past years, the Transistor Computer. The transputer was architectural designs and network. It also conceived of as a building block for electronic emphasizes the factors that promoted the effacing systems comprising a processor, memory and a of transputers and the Restoration movement of communication system. Large systems were to be transputer. constructed from collections of transputers, each running a program and communicating with other The study was carried out by performing in-depth transputers (Quora, n.d). study on transputer literatures. The Inmos transputer was a British-designed, THE TRANSPUTER TECHNOLOGY DRIFT novel parallel microprocessor architecture from Si according to the early1980s. The transputer was unique in that (Fox, Williams, and Messina, 2014), the each processor had a built-in simple operating transputer has drawn much attention among system, memory and four high speed (20 Mbit/s researchers and design engineers, due its novel full duplex) bi-directional serial links. The architectural features and excellent performance. transputer is essentially a computer system on a (Sheen, Allen, Ripke, and Woo, 1998), stated that chip. The links on the transputer allow connection the Inmos transputer device range, which started to up to four other transputers or peripherals such with the T414 in 1983, was continued with a as video graphics, floppy and hard disc drives, series: the 16-bit T212, T222 and T225. The 32 bit Ethernet networking and standard RS-232 serial line was extended with the T425, which ran with a ports (Jaros, Ohlidal and Dvorak, 2005). faster processor clock, more internal memory and The rationale behind the design of the transputer also improved the instruction set and debug came from the point-to-point connection architecture. The T800, announced around 1987, architecture of the Modular-One computer and the included a formally verified IEEE conformant work of Tony Hoare (of QuickSort fame) on Floating Point Unit (FPU) (quite rare for the period) Communication between Sequential Processes. and was developed soon after the release of the His seminal paper led to the design of the T414. Transputer and the parallel programming It was followed by the T801 and T805, introducing language Occam by David May. Starting in early among other things the improved software debug 1981 David May designed the Transputer and the also seen on the T425. The M212 was an early novel Occam language and compiler. It was not trial of an Application Specific Standard Part until 1985 that the first prototype Transputers (ASSP): an MFM disk interface controller version came off the production line at the Inmos foundry of the T212 (Sheen, et al., 1998). at Newport, Gwent (Borger and Stark, 2012). The T9000, intended as the next in the line, was Inmos was sold to Thorn EMI under the privatizing announced with support for a significantly Thatcher government in the mid-80s, and later to extended instruction set, a hardware SGS Thomson, Transputer development implementation of virtual channels, superscalar continued, but was eventually abandoned. It's not performance and clock speeds which once again so easy to kill the Hydra-headed Transputer. The matched the competition, but for various reasons site of the original Inmos design centre in Bristol is the chip was delayed, suffered badly from silicon now owned by STMicroelectronics (May, n.d). bugs, and eventually canned years late having https://escipub.com/global-journal-of-artificial-intelligence/ 2 Nzenwata Uchenna J et al., GJAI, 2019; 1:5 reached about a quarter of its intended steadily growing, with the 80186 embedded performance (May, 2005). system version gaining a lot of popularity, helped Finally, the T400 (a 2 link T425 with reduced by the ready availability of compilers, support tools internal memory) and T450 (a T425 with extra and chips produced for the burgeoning IBM PC internal memory and enhanced instructions) market. Although the x86 range was not particularly powerful, they were quite capable of transputers. many of the tasks being asked of them. The Motorola 68000 series, having dropped By the time the T450 (later known as the ST20) significantly in price since its release and gained a was in the field, interest in the transputer range as number of specialized variants, also gained a lot a whole was waning, and having already turned design wins. Both the Intel and Motorola away from occam SGS Thompson announced processors had one significant point in their favour low price. Gained partly through volume and gave the impression it was dropping the line partly through in house fab lines, much of the entirely (May, 2005). market is very price sensitive (Hilton and Ivimey, As shown in figure 1 below, other processors were n.d). moving on too FIGURE 1: This is figure 1. The release dates of various Transputers and some of their competitors (Hilton and Ivimey, n.d). https://escipub.com/global-journal-of-artificial-intelligence/ 3 Nzenwata Uchenna J et al., GJAI, 2019; 1:5 Hitachi entered the market with its Z80 compatible those people are aware of the capabilities of the range of processors the HD64180 being a device. What is a bit sad is that what is significant advance on the ageing Z80, and have remembered best in the industry is the carried on with the SH series which was very for example its use of an successful indeed. A number of new designs odd language as well as the rather unusual emerged from Zilog themselves, but the Z8000 inclusion of fast communications links in and Z800 never caught on in a big way. preference to GPIO lines or an RS232 interface During this time, a community of academic and rather than the benefits these things provided commercial developers had grown around the (Morse, 2014). technology; user groups such as The World On the commercial front a lot of products were occam and Transputer User Group (WoTUG), and developed around the Inmos suggested TRAM The North American Transputer User Group format. This was a PCB with a base unit size (NATUG) grew and gained large followings. For slightly longer than credit card size, which could some time, the community supported several be plugged into a motherboard with connectors conferences a year averaging 250 delegates along the short sides. Designs requiring a larger each. A lot of experience was gained in the use of the very fine grained parallelism which was connectors carried mostly a number of OS Link offered by the transputer. An interesting interfaces. Bringing out address or data bus would observation was made that the programmers with have been contrary to the basic principle of the a background in hardware design fared better with transputer. According to (Furber, 2017), the the design of these highly parallel systems than design of TRAMS was well received and many did those with a traditional computer science devices were put on it, including high resolution background. This experience has undoubtedly graphics cards, RS232 and RS432 serial had its effect on the software community at large; interfaces along with the expected T4 or T8 CPU a very large number of engineers have at least plus memory. heard of the transputer, and quite a number of done by software (the operating system kernel) The transputer is a programmable device on a that gives slices of CPU time to every task that is single chip with a stunning performance. The ready to run (time slicing). But with the transputer, importance of the transputer is that it provides a however, this multi-tasking kernel and scheduler higher level of abstraction in the design of information systems, due to its inherent support microcode, which makes the transputer ideally for multiprocessing (Furber, 2017). (Bhowmick suited for multi-tasking applications (very fast and Prasad, 2017), said opined that context switching) (Laplante and Milojicic, 2016). multiprocessing is the only way to provide the high Transputers during its era saw its purposes in performance levels demanded by some present- satisfying several applications. (MATSUI, 2015) day applications at a moderate cost. Due to Identified some of the areas the transputer had limitations of a physical nature, technology cannot gained grounds: High speed multiprocessor provide sufficient increase in performance, so new systems, Workstations and workstation clusters, techniques are needed. Multiprocessing is Supercomputers, Real time processing, Scientific definitely the most important one. and mathematical applications, Digital signal The key innovation of the transputer is its inherent processing, Accelerator processors, Distributed concurrency. In all processors multi-tasking is databases, System simulation, https://escipub.com/global-journal-of-artificial-intelligence/ 4 Nzenwata Uchenna J et al., GJAI, 2019; 1:5 Telecommunications, Microprocessor Graphics processing, Image processing, Pattern applications, Industrial control, Robotics, Fault recognition, Artificial intelligence, etc. tolerant systems, Medical instrumentation, TRANSPUTER ARCHITECTURE DESIGN AND Architectural Design NETWORK The INMOS transputer is the first single-chip The transputer, manufactured by INMOS, is a microprocessor to provide a high speed single chip Very Large Scale Interface (VLSI) processor, fast inter-processor communications, device with processor, memory, and and explicit support for multiple processes and communications links. This represents a slight multiple processor systems. Transputers are deviation from microprocessor designed to be part of a multiprocessor system, so architecture. The common features of transputers the performance of an individual processor is not are: High speed integer processor with micro- especially critical. If more processing power is codes process scheduler; On-chip fast static needed, more processors can simply be added. memory; Up to four links for communication with Figure 2 below shows the block diagram of a other transputers; Internal timers; and External generic transputer.