IBM System Z10 Business Class Technical Overview

Front cover IBM System z10 Business Class Technical Overview Describes the new IBM System z10 BC server and related features Discusses server structure and design Reviews software support Marian Gasparovic Ivan Dobos Per Fremstad Wolfgang Fries Parwez Hamid Brian Hatfield Dick Jorna Fernando Nogal Karl-Erik Stenfors ibm.com/redbooks International Technical Support Organization IBM System z10 Business Class Technical Overview November 2009 SG24-7632-01 Note: Before using this information and the product it supports, read the information in “Notices” on page ix. Second Edition (November 2009) This edition applies to the initial announcement of the IBM System z10 Business Class server. © Copyright International Business Machines Corporation 2008, 2009. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . ix Trademarks . .x Preface . xi The team who wrote this book . xi Become a published author . xiii Comments welcome. xiii Chapter 1. Introducing the IBM System z10 Business Class . 1 1.1 Wanted: an infrastructure (r)evolution. 2 1.2 System z10 BC highlights . 7 1.3 z10 BC model structure. 8 1.4 System functions and features . 10 1.4.1 Processor . 11 1.4.2 CPC drawer . 12 1.4.3 I/O connectivity . 12 1.4.4 Cryptography . 14 1.4.5 Parallel Sysplex support . 16 1.4.6 Reliability, availability, and serviceability. 17 1.5 The performance advantage . 18 1.6 Operating systems and software. 18 Chapter 2. Hardware components . 21 2.1 Frame and drawers . 22 2.2 Drawer concept . 25 2.3 The single-chip module . 26 2.4 The PU and SC chips . 27 2.4.1 PU chip . 27 2.4.2 SC chip . 29 2.5 Memory . 30 2.5.1 Memory configurations . 30 2.5.2 Plan-ahead memory . 33 2.6 Connectivity. 34 2.6.1 Types of fanouts . 34 2.6.2 Redundant I/O interconnect . 35 2.7 Model configurations . 36 2.7.1 Upgrades . 37 2.7.2 Concurrent PU conversions . 37 2.7.3 Model capacity identifier . 37 2.7.4 Capacity on Demand upgrades . 39 2.8 Summary of the z10 BC . 40 Chapter 3. System design . 43 3.1 CPC Drawer . 44 3.2 Processing unit . 47 3.3 Processing unit functions . 50 3.3.1 Central processors . 51 3.3.2 Integrated Facility for Linux. 51 3.3.3 Internal Coupling Facility. 52 © Copyright IBM Corp. 2008, 2009. All rights reserved. iii 3.3.4 System z10 Application Assist Processor. 53 3.3.5 System z10 Integrated Information Processor . 56 3.3.6 zAAP on zIIP capability. 58 3.3.7 System Assist Processors. 58 3.3.8 Reserved processors . 59 3.3.9 Processing unit characterization . 59 3.3.10 Transparent CP, IFL, ICF, zAAP, zIIP, and SAP sparing . 60 3.4 Memory design . 60 3.4.1 Central storage . 61 3.4.2 Expanded storage. 61 3.4.3 Hardware system area . 62 3.5 Logical partitioning . 62 3.6 Intelligent Resource Director. 67 3.7 Clustering technology . 69 Chapter 4. I/O system structure. 73 4.1 Introduction . 74 4.1.1 InfiniBand advantages . 74 4.1.2 Data, signalling, and link rates . 75 4.2 I/O system overview . 75 4.3 I/O drawer . 77 4.4 Fanouts . 80.

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