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Bipolar Junction Transistor BIPOLAR JUNCTION TRANSISTORS Bipolar junction transistor BIPOLAR JUNCTION TRANSISTORS EE314 First - BJTs The transistor was probably the most important invention of the 20th Century, and the story behind the invention is one of clashing egos and top secret research. Reference: Bell Labs Museum B. G. Streetman & S. Banerjee ‘Solid State Electronic Devices’, Prentice Hall 1999. Point-Contact Transistor – first transistor ever made First Bipolar Junction Transistors W. Shockley invented the p-n junction transistor The physically relevant region is moved to the bulk of the material force – voltage/current water flow – current - amplification Understanding of BJT Basic models of BJT npn transistor Diode Diode pnp transistor Diode Diode Basic models of BJT BJTs – Basic Configurations Fluid Flow Analogy Difference between FET (field effect transistor) and BJT Technology of BJTs pnp BJT npn BJT BJTs – Practical Aspects Heat sink BJTs – Testing BJTs – Testing RECALL P-N JUNCTION P N N P W+ - W+ - Vappl > 0 Vappl < 0 Forward bias, + on P, - on N Reverse bias, + on N, - on P (Shrink W, Vbi) (Expand W, Vbi) Allow holes to jump over barrier Remove holes and electrons away into N region as minority carriers from depletion region I I V V BIPOLAR JUNCTION TRANSISTORS: BASICS + - I IC E - + IB IE = IB + IC ………(KCL) VEC = VEB + VBC ……… (KVL) ECE 663 BJT CONFIGURATIONS GAIN CONFIG ECE 663 BIPOLAR JUNCTION TRANSISTORS: BASICS Bias Mode E-B Junction C-B Junction Saturation Forward Forward Active Forward Reverse Inverted Reverse Forward Cutoff Reverse Reverse ECE 663 BJT FABRICATION ECE 663 PNP TRANSISTOR AMPLIFIER ACTION IN (small) OUT (large) Clearly this works in common emitter configuration ECE 663 COMMON BASE DC CURRENT GAIN - PNP Common Base – Active Bias mode: IC = aDCIE + ICB0 ICp = aTIEp aDC = aTg = aTgIE IC = aTgIE + ICn ECE 663 COMMON EMITTER DC CURRENT GAIN - PNP Common Emitter – Active Bias mode: IE = bDCIB + ICE0 bDC = a /(1- IC = aDCIE + ICB0 DC a aDC) = DC(IC + IB) + GAIN !! ICB0 IC IB IC = aDCIB + ICB0 1-aDC IE COMMON EMITTER DC CURRENT GAIN - PNP gaT bdc 1 gaT Thin base will make aT 1 Highly doped P region will make g 1 Metal-Oxide-Semiconductor Field Effect Transistors Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor Which will be the type that we will study in this course. Metal-Semiconductor Field Effect Transistor MESFET Junction Field Effect Transistor JFET High Electron Mobility Transistor or Modulation Doped Field Effect Transistor HEMT or MODFET Fast Reverse/Fast Recovery Epitaxial Diode FREDFET DNA Field Effect Transistor The conduction path is through a strand of DNA Field Effect Transistors The conductivity (or resistivity) of the path between two contacts, the source and the drain, is altered by the voltage applied to the gate. Device is also known as a voltage controlled resistor. Types of MOSFETS n-channel p-channel Enhancement Mode Enhancement Mode (nMOSFET) (pMOSFET) n-channel p-channel Depletion Mode Depletion Mode (nMOSFET) (pMOSFET) Cross-Sectional View of n channel planar Enhancement Mode Transistor p channel Enhancement Mode Transistor n channel Depletion Mode Transistor p channel Depletion Mode Transistor Symbols for n channel Enhancement Mode MOSFET VGS ≥ 0V, VDS ≥ 0V VTN is positive Symbols for p channel Enhancement Mode MOSFET VGS ≤ 0V, VDS ≤ 0V VTP is negative Symbols for n channel Depletion Mode MOSFET Symbols for p channel Depletion Mode MOSFET PSpice MOSFET Symbols The IRF150 is an nMOS and the IRF9140 is a pMOS. Both are enhancement mode transistors. The body terminal is connected to the source terminal on the FET. “M” is used to denote that the device is a MOSFET. MOS Capacitor MOS Capacitor Under Bias: Electric Field and Charge Parallel plate capacitor Accumulation Positive gate bias Electrons attracted to gate Negative gate bias: Holes attracted to gate Depletion Inversion MOS Capacitor: p-type semiconductor Accumulation Depletion Inversion Threshold Voltage The gate voltage that causes the concentration of electrons immediately under the gate oxide is equal to the concentration of holes is called the threshold voltage. • Enhancement mode FETs NMOS VG = VTN • When enough electrons have been attracted to the oxide-semiconductor interface to create a path for current to flow between the source and drain. PMOS VG = VTP • When holes have been attracted to the oxide-semiconductor interface to create a path for current to flow between the source and drain. • Depletion mode FETs NMOS VG = VTN • When holes have been attracted to the oxide-semiconductor interface to stop current from flowing between the source and drain. PMOS VG = VTP • When electrons have been attracted to the oxide-semiconductor interface to stop current from flowing between the source and drain. Capacitance http://ecee.colorado.edu/~bart/book/ " In Accumulation Region, C COX COX A " ox ox COX TOX TOX MOSFETs Enhancement mode Depletion mode Also known as Normally Off Also known as Normally On transistors. transistors. A voltage must be applied to A voltage must be applied to the gate of the transistor, at the gate of the transistor, at least equal to the threshold least equal to the threshold voltage, to create a voltage, to destroy a conduction path between the conduction path between the source and the drain of the source and the drain of the transistor before current can transistor to prevent current flow between the source and from flowing between the drain. source and drain. Before electron inversion layer is formed After electron inversion layer is formed Family of ID Versus VDS Curves: Enhancement-Mode nMOSFET Triode/ Nonsaturation VDS < VGS – VTN VDS > VGS – VTN Pinch-off/Saturation Cut-off VGS < VTN Family of iD Versus vDS Curves: Depletion-Mode nMOSFET Assuming that VTN < -1V For this discussion I am going to emphasize the operation and applications of n channel enhancement mode FETs Piecewise Model Cut-off Region VGS < VTN VTN is positive ID = 0 mA Piecewise Model Nonsaturation/Triode Region VGS > VTN VDS < VGS – VTN ID ≤ 0 mA VTN is positive Piecewise Model Saturation/Pinch-off Region VGS > VTN VDS > VGS – VTN ID ≤ 0 mA VTN is positive Summary of I-V Relationships Region NMOS VDS < VDS(sat) ' W 1 2 I k (V V )V V D n GS TN DS DS Nonsaturation/ L 2 Triode VDS RDSon I D VDS > VDS(sat) ' Saturation/ kn W 2 ID [VGS VTN ] Pinch-off 2 L Transition between triode V (sat) = V - V and pinch-off DS GS TN Enhancement Mode VTN > 0 V, ID ≥ 0 mA, ID = IS, IG = 0 mA To increase the drain current ID at a particular VDS and VGS, should you Questionsuse a MOSFET with a larger or smaller W/L ratio? Compare the operation of two FETs, where MOS #1 has a smaller VTN than MOS #2. Sketch the differences on a graph of ID-VDS. The microelectronics industry is working to decrease the channel length L. If W is held constant, how will: the capacitance between the gate and the channel change? the time it takes for an electron to move from the source to the drain be altered? the value of VTN change? this modify RDSon for a particular set of VDS and VGS? The microelectronics industry is also working to decrease the thickness of the gate oxide TOX and is researching high and low dielectrics to replace silicon dioxide as the gate dielectric? If TOX decreases, how will the capacitance between the gate and channel change? Should a low or high dielectric be used to increase the capacitance? PN- DIODE Theory of p-n junction p-n junction as diode p-n diode currents Volt-amp characteristics Diode resistance Temperature effect of p-n junction Transition and diffusion capacitance of p-n diode Diode switching times When a p-type semiconductor material is suitably joined to n-type semiconductor the contact surface is called a p-n junction. P N + + Depletion region The p-n junction is also called as semiconductor diode . The left side material is a p-type semiconductor having –ve acceptor ions and +vely charged holes. The right side material is n-type semiconductor having +ve donor ions and free electrons Suppose the two pieces are suitably treated to form pn junction, then there is a tendency for the free electrons from n-type to diffuse over to the p-side and holes from p-type to the n-side . This process is called diffusion The left side material is a p-type semiconductor having –ve acceptor ions and +vely charged holes. The right side material is n-type semiconductor having +ve donor ions and free electrons. As the free electrons move across the junction from n-type to p-type, +ve donor ions are uncovered. Hence a +ve charge is built on the n-side of the junction. At the same time, the free electrons cross the junction and uncover the –ve acceptor ions by filling in the holes. Therefore a net –ve charge is established on p-side of the junction. When a sufficient number of donor and acceptor ions is uncovered further diffusion is prevented. Thus a barrier is set up against further movement of charge carriers. This is called potential barrier or junction barrier Vo. The potential barrier is of the order of 0.1 to 0.3V. Note: outside this barrier on each side of the junction, the material is still neutral. Only inside the barrier, there is a +ve charge on n- side and –ve charge on p-side. This region is called depletion layer. Diode current equation The current in a diode is given by the diode current equation I = I0 ( e V/ηVT –1) Where, I------ diode current I0------ reverse saturation current V------ diode voltage η------- semiconductor constant =1 for Ge, 2 for Si.
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