Technical and Applications Literature
BR101/D REV 27 Technical and Applications Literature Selector Guide and Cross References Effective Date 2nd Half 1997 .® MOTOROLA Semiconductor Products Sector ® MOTOROLA Technical and Applications Literature Selector Guide and Cross References ALExiS, Buffalo, Bullet-Proof, BurstRAM, CDA, CMTL, Ceff-PGA, Customer Defined Array, DECAL, Designerfs, DIMMIC, DSPRAM, ECLinPS, ECLinPS LITE, ECL300, E-FETs, EpiBase, Epicap, FIRsT, GEL-PAK, GEMFET, GlobalOptoisolator, GreenLine, HDC, HDTMOS, H4C Series, H4C Plus, HYPERformance, ICePAK, L2TMOS, MAACPAC, MCML, MDTL, MECL, MECL 10K, MECL 10H, MECL III, MEGAHERTZ, MCCS, Media Engine, Memorist, MHTL, MicroCool, MicroSIMM, MiniMOS, MONOMAX, MOSAIC I, MOSAIC II, MOSAIC III, MOSAIC IV, MOSAIC V, MOSFET, Mosorb, MRTL, MTIL, Multi-Pak, MUSCLE, Mustang, IlSIMM, OACS, OnCE, PHACT, Predix, PowerBase, POWER OPTO, POWERTAP, PRISMCard, QUIL, Rail-To-Rail, SCANSWITCH, SENSEFET, Senseon, SLEEPMODE, SMALLBLOCK, SMARTDISCRETES, SMARTMOS, SMARTswitch, SORF, Surmetic, SWITCHMODE, Symmetric Superscalar, TestPAS, Thermopad, Thermopad II, Thermowatt, TMOS V, Unibloc, UNIT/PAK, VeComP, X-clucer, Z-Switch and ZIP R TRIM are trademarks of Motorola, Inc. C-QUAM, MOSAIC and TMOS are registered trademarks of Motorola, Inc. Apollo is a registered trademark of Hewlett Packard Inc. AutoLogic, NetEd, QuickSim II, QuickPath and Falcon Framework are trademarks of Mentor Graphics Corp. Concept, Gate Ensemble, Verilog-XL, Veritime and Dracula are trademarks of Cadence Design Systems, Inc. Daisy is a trademark of Daisy Systems Corporation. DDCMP and V AX are trademarks of Digital Equipment Corporation. Design Compiler, HDL Compiler, Test Compiler and DesignWave are trademarks of Synopsys, Inc. Echelon, LON, LonWorks and Neuron are registered trademarks of Echelon Corporation. ETHERNET is a trademark of Xerox Corporation. FACT and FAST are trademarks of National Semiconductor Corporation.
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