The Commodore PET Revealed

THE PET'· REVEALED '---A NICK HAMPSHIRE PUBLICATION ----' THE PETTM REVEALED A NICK HAMPSHIRE PUBLICATION First Edition October 1979 Second Edition January 1980 The programs presented in this book have been inc1uded for their instructional value, they have been checked out with care, however, they are not warrented for any purpose. While evry precaution has been taken in the preparation of this book, the publisher assumes no responsibility for any errors or omissions. Neither is any liability assumed for damages or other costs resulting from the use of the information contained herein. No patent liability is assumed for the information contained herein nor do the publishers assume any liability for infringement of patents or other rights of third parties resulting from use of that information. No licence is granted by the equipment manufacturers under any patent or patent rights and manufacturers reserve the right to change circuitry and software at any time without notice. Readers are refered to current manufacturers data for exact specifications. COPYRIGHT 1980 COMPUTABITS LTD. World rights reserved. No part of this publication may be copied, transmitted or stored in a retrieval system or reproduced in any way including but not limited tOi photocopy, photography, magnetic or other recording, without prior written permission from the publishers, with the exception of material entered and executed on a computer system for the readers own use. Published by: Computabits Ltd, P.O.Box 13, Yeovil, Somerset, England. PET is a Trademark of Commodore Ltd FORWARD This book is a collection of discoveries about the PET, how and why it works, and how to use these facts to write better programs and perform more interesting functions. This is the second edition covering both old and new ROM machines, if in doubt as to which ROMs are in your machine then PEEK(50003), in old ROMs this is 0, in new ROMs 1. Although the majority of these facts have never been oficially published by Commodore 1 would like to thank Commodore U.K. for their assistance in providing much of the information contained in "PET Revealed". Especially Nick Green and Mark Clark of Commodore who were helpfull in providing that information and also in proof reading the manuscript. 1 would also like to thank Commodore for their permission to publish the circuit diagrams. The discovery of page zero lo.cations and ROM subroutines is principally the work of Jim Butterfield while the Trace programs are the work of Brett Butler, my thanks to them both. 1 would also like to thank Mark Witkowski for providing some of the other programs and also proof reading the manuscript. It may interest you to know that this book was typeset using a PET system running Commodore's word processor interfaced to a daisywheel printer Nick Hampshire. CONTENTS SECTION l.....The PET System Hardware. pl Basic elements - CPU - Memory - Input and Output - Video circuit - System memory map. SECTION 2.....The 6502 Microprocessor. pl? An overall view - The accumulator and arithmetic unit Processor status register and flags - Branching and Jumps - Addressing modes - The Index register - The Stack register - Interrupts - Data modify instructions Machine code on the PET Hand assembllng programs. SECTION 3.....The PET operatin~ System. p43 Routines from PET Basic - Variable memory map - Basic tokens Program storage format - Overlays - Data storage Numeric and string variables - Arrays Garbage collection - Adding commands to Basic - Trace. SECTION 4.....The User Port. p83 User port connections -Video output circuit - Parallel user port - The 6522 VIA - User port memory map Programming the user port - Handshaking on the 6522 SeriaI 1/0 - 1/0 port expansion - Communication between processors - KIM to PET data handshaking - Summary of 6522 registers. SECTION 5.....The IEEE port and the 6520. P 119 The 6520 and its registers The PET keyboard Modifying keyboard functions - Cassette unit - Merge IEEE port - IEEE connections - IEEE signaIs - IEEE commands IEEE to RS232 conversion IEEE bus handshaking The video display Double density plotting. APPENDIX. A. PET circuit diagrams. B. Coding form. C. 6502 instruction set. D. Hex-decimal conversion tables. E. Table of PET codes. PET SYSTEM HARDWARE 1 Any computer system large or small, consists of just four basic elements or building blocks. These are 1) Central Processing Unit, 2) Storage or Memory, 3) Input and, 4)Output. The Basic Elements. The Central Processing Unit or CPU as it is commonly known, can loosly be regarded by analogy to a human being as the "brain" of the computer. It is inside the CPU that instructions are processed and the arithmetic done. The functioning of other parts of the computer are also controlled by the CPU. The computer stores the instructions which it has been given and the data on which these instructions operate in memory. This memory can be divided into two general categories, main memory and auxiliary backup storage. AlI the instructions and data required by the machine to perform its current task are stored in main memory. Auxiliary memory provides a permanent storage for sets of data or instructions which may be required by the computer at a later date. Auxiliary storage in the PET consists either of a cassette deck or a floppy disk unit. In the cassette deck the data and programs are stored on magnetic tape, in the floppy disk drive on a magnetic disk. Using these devices the contents of the auxiliary storage can be brought back into main memory as the need arises. The input allows one to put instructions or information data into the computer's main memory. This is most commonly done through a typewriter like keyboard. However. inputs can come from other sources besides a keyboard, it could come from the closing of a switch,from a piece of test equipment or even from another computer. The input is aiso used when information and instructions are transfered from auxiliary memory to main memory. The output is used by the computer to display the results of its computation. This can be on one of several devices,a video screen,a printer, or to output 1 the contents of main memory into auxiliary memory. As with input,the output can be to a single device such as a light, to a piece of equipment which the computer is controlling or to another computer. These then are the basic elements of any computer system and Fig 1 shows how they are connected together and how they interact with the human user. We will now consider in more detail how these four basic elements are implemented on the PET. The CPU. The principle component of the CPU circuitry in the PET is the 6502 microprocessor. The internaI functioning of this device will be looked at in more detail in chapter 2. For the moment consider this 40 pin integrated circuit as a "black box", since aIl we are interested in are the inputs and outputs. These can be divided into four distinct groups, there are eight data lines, 16 address lines, 10 control lines and 3 power supply lines, the remaining three IC pins are not connected and have no function, a block diagram of the 6502 is shown in Fig 2. Each of these groups forms what is known as a "bus" which can be defined as being a set of paraI leI paths used to transfer binary information between the devices in a system. The "A DD RE SS BUS" is used to carry the address generated by the microprocessor to the address inputs of the memory and input/output 0/0) devices. The address bus on the PET is unidirectional since the 6502 is the only component for aIl the system, except the video circuitry, capable of generating addresses. Since there are 16 address lines the processor can access, i.e. Read or Write into up to a total of 2 16 or 65,536 words of memory, 1/0 registers etc. If you look at the circuit diagram for the CPU section of the PET you will notice that the address lines AO to A15 are divided into two groups. The bottom twelve lines AO to AlI go to a unidirectional buffer the purpose of which is to increase the power available on each address line. The top four address lines however go to a demultiplexer, this decodes the binary number present on these four address lines, and gives an output on one of the sixteen output lines corresponding to that number. The function of this is to divide the memory area into sixteen blocks each of 4096 bytes of memory, each of which can be selected by means of one of the output lines from the demultiplexer. Why the designers have done this will become obvious when we look at the memory circuitry. The "DA TA BUS" consists of eight bidirectional data lines. During a "WRITE" operation these lines transfer data from the processor to the memory location selected by the address lines. During a "READ" operation data is 2 Blank ! 1 Sync Interrupt ! 1 ~ IEEE port Video Video Display RAM ROM RAM 1/0 <:= Circuits User port Circuit K:> Cassette <:> decks f '\ t At AT ( t L IL IL 1 ~ r-- Data bus f-- r-- Address bus R/W Interrupt Fig 1.1 PET System Design. Clock 1-- Generator Microprocessor Vs s 1 40 RES RDY 2 39 \2l2 (out) \2ll(out) 3 38 S.O IRQ 4 37 ~O (i n) ~ç 5 36 N.C NMI 6 35 N.C SYNC 7 34 R/W Vcc 8 33 DO AD 9 32 Dl Al 10 31 D2 A2 1 1 30 D3 A3 12 29 D4 A4 13 28 D5 A5 14 27 D6 A6 15 26 D7 A7 16 25 A15 A8 17 24 A14 A9 18 23 A13 AI0 19 22 A12 A Il 20 21 Vss Fig 1.2 6502 Pinout 3 transfered from memory to the processor along the same lines.

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