System for Preventing the Use of an Unauthorized External Memory

Europaisches Patentamt European Patent Office J) Publication number: 0 378 385 Dffice europeen des brevets

© Priority: 10.01.89 JP 4452/89 © Applicant: NINTENDO CO. LIMITED 20.04.89 JP 101028/89 60, Fukuine Kamitakamatsu-cho Higashiyama-ku Kyoto(JP) © Date of publication of application: 18.07.90 Bulletin 90/29 © Inventor: Okada, Satoru c/o Nintendo Co. Ltd. 60 Fukuine © Designated Contracting States: Kamitakamatsu-cho AT BE CH DE DK ES FR GB IT LI NL SE Higashiyama-ku, Kyoto(JP)

© A hand-held electronic game machine (10) includes a computer (22) accommodated in a case (12) and a liquid crystal display (LCD) panel (14) provided at an upper portion of a front surface of the case. When an external memory (16) is inserted to a receiving port (68) -formed on a rear surface of the case at a portion opposite to the LCD panel, a first character data being set in advance in the computer (22) is compared with a second character data stored in a predetermined area of the external memory (16). Prior to such comparison, the computer displays the characters represented by the second character data on the LCD panel. If the first and second character data are coincident with each other, the computer (22) can access to the external ^memory (16). During the progression of the game in ^accordance with a game program of the external If) memory, the game character can be moved by OOoperating a direction designating key (18) provided ^at the left side in a portion below the LCD panel (14) CO of the front surface of the case, and the action J^J manner of the game character can be determined by operating an action key (70) provided at the right ©side in the portion below the LCD panel. A start key ^(72) and select key (74) are arranged between the indirection designating key (18) and the action key (70).

Xerox Copy Centre 1 EP 0 378 385 A2 2

SYSTEM FOR PREVENTING THE USE OF AN UNAUTHORIZED EXTERNAL MEMORY

FIELD OF THE INVENTION and a cartridge memory. Such data is compared and, if there is a match, the proprietor data is simply displayed and thereafter a program stored The present invention generally relates to a in the cartridge memory may be executed. system for preventing the use of an unauthorized 5 A third method is disclosed in Japanese Patent external memory unit with a predetermined infor- Publication No. 18074/1984 published on April 25, mation processing system. More specifically, the 1984. In this method, copy preventing information present invention relates to a system for preventing such as a trademark is stored in a plurality of an unauthorized, removable external memory unit semiconductor memories and, when a printed cir- storing a game program or the like from being w cuit board in which a program is copied is used, used in a unique hand-held videographics informa- the copy preventing information is displayed on a tion processing system. CRT, thereby subjecting the copier to a possible claim of trademark infringement. Clearly, this third method is not effective where the copier deletes or BACKGROUND AND SUMMARY OF THE INVEN- 75 changes the copy preventing information to thereby TION avoid any issue regarding the infringement of a trademark right. The first and second methods are similar to As evidenced by Japanese Utility Model No. each other in that they both permit the use of a 57989/1986 laid-open on April 18, 1986, games 20 floppy disk or a cartridge on the condition that first using a liquid crystal display are known. In this and second identifying data are coincident. How- game, a game cartridge, attachable to a main ever, the first method does not expressly teach that body, incorporates a game program and an operat- the password is displayed. Thus, the first method ing system program to be executed by a central does not teach displaying information relating to processing unit within the body. The main body 25 the proprietor of the copyright as done in the also includes a liquid crystal display ("LCD") sys- second method. tem. In the second method, in the case where the The present invention provides unique method proprietor data in the main unit memory and the and apparatus for thwarting the use of unauthorized proprietor data in the cartridge memory are not game cartridges in such a system. In this fashion, 30 coincident, the cartridge cannot be used. However, unauthorized game cartridges which contain copied since no proprietor data is displayed in this case, programs or low quality programs may be pre- an operator or user will not be informed as why the cluded from being used in such a system. Addi- cartridge cannot be used. Furthermore, if the re- tionally, unauthorized low quality game cartridges sults of the comparison indicate that the proprietor which may damage the main body over time (e.g., 35 data matches, no further checks are made to insure the connectors) are precluded from being used in that the cartridge is authorized. the system. Therefore, a principal object of the present Prior methods have heretofore been used for invention is to provide an authentication system for preventing unauthorized or copied programs from an external memory unit, in which it is possible to being executed by an information processing ap- 40 more effectively prevent the use of unauthorized paratus. One such system is disclosed in the Japa- external memory units in a predetermined informa- nese Patent Publication No. 17849/1972 published tion processing system, such as a hand-held elec- on October 18, 1972. In this system, a first method tronic video game system. is disclosed wherein a first password is assigned to The present invention is directed to a system a specific information processing system to distin- 45 for preventing the unauthorized use of an external guish it from other information processing systems. memory unit which is used in an information pro- The first password is compared with a second cessing system comprising an external memory password which is assigned to a floppy disk having unit having an external memory which is a program stored therein. The floppy disk is per- attachably/detachably connected to an information mitted to be used only when both passwords are so processing apparatus capable of displaying a pre- identical. determined image on a display means in accor- A second method is disclosed in U.S. Patent dance with a program stored in the external mem- No. 4,462,076 issued on July 24, 1984. In this ory when the external memory unit is loaded into method, data indicative of the proprietor of a copy- the information processing apparatus. The informa- right are respectively stored in a main memory unit tion processing apparatus includes an information

2 ;P 0 378 385 A2

)rocessing means capable of accessing a pre- apparatus is constructed as a nana-neia electronic Jetermined maximum address space; an internal game machine which is intended to be operated nemory having a first memory area which has a while the machine is sandwiched by the player's irst memory space relatively smaller than the hands. Such a hand-held electronic game machine naximum address space and stores first character 5 includes a hand-held case; a first operation switch lata for preventing the unauthorized use of the disposed at a position where it can be operated by external memory unit and an authenticity determin- the thumb of the left hand on a front surface of the ng program data for determining the authenticity of case; a second operation switch disposed at a he external memory unit based upon the first position where it can be operated by the thumb of ;haracter data; and a memory selecting means for •o the right hand on the front surface of the case; and changing or selecting one of the internal memory a third operation switch provided in a region where and the external memory. The external memory of an imaginary loci of the thumbs of the left hand he external memory unit includes a second mem- and right hand intersect with each other on the jry area having a memory space corresponding to front surface of the case. tie first memory space and a third memory area '5 A direction designating switch (specifically, a laving a relatively larger second memory space. In cross-key switch) which is utilized for designating a i portion of the third memory area of the external moving direction of a game character is arranged nemory, second character data is stored which as the above described first operation switch, and las a predetermined relationship with respect to an action key (specifically, a push-button switch) :he first character data stored in the internal mem- 10 for designating one of various kinds of action or Dry. Additionally, a program for displaying an im- motion of the game character. For example, the age in accordance with a predetermined purpose depression of such a push-button switch may [e.g., an interactive game) is stored in at least the cause a game character to jump, use a weapon, -emaining memory area of the third memory area. throw a ball or the like. These first and second When the external memory unit is loaded to the ?5 operation switches are usually operated during the information processing apparatus, the memory se- game. The first and second operation switches are lecting means sets the first memory space as the arranged at positions where they can be easily address space which the information processing operated during game play. means can access. Thereafter, the information pro- The above-described third operation switch, cessing means determines whether the first char- 30 may, for example, be a start switch for designating acter data and the second character data have the the start of the game and/or a select switch for predetermined relationship by executing the au- selecting a mode of operation of the game. Such a thenticity determining program data stored in the third operation switch is arranged in a region where internal memory. If the first and second character the imaginary loci of the thumbs of the both hands data have the predetermined relationship, the 35 intersect each other. Therefore, the third operation memory selecting means selects the second mem- switch is disposed to be readily operated by the ory space as the address space which the informa- thumb of either hand. Thus, the third switch may tion processing means can access to allow the be operated during game play without requiring the information processing means to have access to user to change the position of the hands during the the external memory. 40 game. As indicated above, when the external memory These and other objects, features, aspects and unit is loaded to the information processing appara- advantages of the present invention will become tus, the memory selecting means selects the first more apparent from the following detailed descrip- memory space as the address space which the tion of the embodiments of the present invention information processing means can access. 45 when taken in conjunction with the accompanying Thereafter, prior to any comparison operation, drawings. the second character data stored in the external memory is displayed on the display means. The authenticity determining program stored in the in- BRIEF DESCRIPTION OF THE DRAWINGS ternal memory is then executed. At this time, the 50 first and second character data are compared with each other in accordance with the authenticity de- FIGURE 1 is a perspective view showing an in termining program and, when it is determined that exemplary exterior housing of a game machine both character data have the predetermined rela- accordance with an exemplary embodiment of the tionship, the memory selecting means selects the 55 present invention; external memory as a memory to which the in- FIGURE 2 is an illustrative view showing a formation processing means can have access. cross-section along a line ll-ll in Figure 3; In one embodiment, the information processing FIGURE 3 is an illustrative view showing an

3 ) ■P 0 378 385 A2 irrangement of switches or keys such as a start (not shown) formed at an edge of a printed circuit witch, select switch, and so on in the Figure 1 board of the external ROM cartridge 16 is inserted smbodiment; and connected to the connector 20. Thus, the ex- FIGURE 4 is a block diagram showing the ternal ROM cartridge 16 can be electronic components of the Figure 1 embodi- 5 attachably/detachably connected to the game ma- nent: chine 10. An external ROM 16a (Figure 5) is incor- FrGURE 5 is a block diagram showing a porated in the external ROM cartridge 16. A game najor portion of Figure 4 in further detail; program is stored in the external ROM 16a. When FIGURE 6 is a circuit diagram showing an the external ROM cartridge 16 is loaded in the sxemplary memory selecting circuit such as shown o game machine 10, the game program is executed generally in Figure 5; such that an image is displayed on the LCD panel FIGURES 7(A) through 7(D) are a memory 14 and music for the game is generated at speaker nap showing address spaces to which CPU core 1 1 or through ear phones connected at jack 69. ;an access; A six-pin connector 65 is also provided in the FIGURES 8(A) and 8(B) are illustrative views o A cross-key switch 18, which is used when a FIGURE 10 is a flowchart showing a se- game character being displayed on the LCD panel quence of operations for comparing first character 14 is to be moved, is provided on the front or data with second character data; upper surface of the case 1 2 at a left side portion FIGURE 11 is a flowchart showing a se- below the LCD panel 14, as shown in Figures 1 quence of operations in an inhibiting process when 25 and 3. The cross-key switch 18 has four direction a first character data and a second character data designating portions and, by depressing any one of are inconsistent with each other; the same, it is possible to move the game char- FIGURE 12 illustrates a key-matrix for de- acter upward or downward or leftward or rightward. tecting a key or switch input; In addition, as shown in Figures 1 and 3, two push- FIGURE 13 is an exemplary character RAM 30 button switches 70a and 70b are provided on the memory map; front or upper surface of the case 12 at a right side FIGURE 14 is an exemplary VRAM memory portion below the LCD panel 14. These push-button map; and switches 70a and 70b are operated when it is FIGURES 15(A) through 15(L) are exemplary necessary to control the game character being embodiments of various addressable registers as- 35 displayed on the LCD panel 14 to perform various sociated with the LCD controller. predetermined actions. For example, when the push-button switch 70a is depressed, the displayed DETAILED DESCRIPTION OF THE DRAWINGS character may appear to jump, or when the push- button switch 70b is depressed, the character may 40 appear to throw a stone, or a ball, or launch various Figure 1 is a perspective view showing the other objects. Thus, the cross-key switch 18 is exterior housing of an exemplary hand-held liquid disposed to be operated by the thumb of the left crystal game machine in accordance with an exem- hand, which sandwiches the case 12 in cooperation plary embodiment of the present invention. This with the right hand, and the push-button switches hand-held liquid crystal game machine (hereinafter 45 70a and 70b are disposed to be operated by the referred to as "game machine") 10 includes a case thumb of the right hand. 12 which is provided with an LCD panel 14 includ- Furthermore, a start switch 72 and a select ing dot display segments being arranged in accor- switch 74 are provided on the front or upper sur- dance with a dot-matrix system on a front or upper face of the case 12 of the game machine 10. As surface thereof. so seen from Figure 3, the start switch 72 and the On a rear or lower surface of the case 12, an select switch 74 are arranged in a region 78 below insertion port 68 (which is more clearly shown in the cross-key switch 18 and the push-button Figure 2) is formed at a portion opposite to the switches 70a and 70b. In this region, imaginary loci LCD panel 14. An external ROM cartridge 16 is 76L and 76R of the thumbs of both hands intersect pluggably inserted in the insertion port 68. More 55 each other. Therefore, these switches 72 and 74 specifically, a 32-pin connector 20 is provided in are centrally disposed so as to be operated by the the insertion port 68. By inserting the external ROM thumbs of any one of the left hand and the right cartridge 16 into the insertion port 68, a connector hand (while the left hand and the right hand hold

4 7 EP 0 378 385 A2 3 the case 12 of the game machine 10). In other left/right), a variety of bit control operations (e.g., words, the switches 72 and 74 may be operated setting a specified bit in a specified register), con- without significantly changing the positioning of the ditional and unconditional branch operations, sub- hands. The select switch 74 is used, for example, routine call and return operations and a variety of to select the mode of operation of the game being 5 program control operations (e.g., start, stop, no displayed through the use of a menu screen. In this operation, etc.). regard, the select switch 74 may be used to select Turning back to Figure 4, a key-matrix for one of a number of levels of game play. In addi- detecting a key input from cross-key switch 18 is tion, a function for selecting a "weapon" usable by connected to the CPU core 24 via a port 27. An a game character can be assigned to the select 70 exemplary key-matrix is shown in Figure 12. Lines switch 74. P10-P13 in Figure 12 corresponds to the four in- The start switch 72 is operated to start the puts to port 27 and lines P14 and P15 correspond game as selected. Therefore, it is not typically to the two output lines emanating from port 27. The necessary to operate the start switch 72 and the four inputs P10-P13 are coupled to a predeter- select switch 74 during the game. However, since a 75 mined bias voltage Vdd. The presence or absence pause (PAUSE) function is also assigned to the of a signal on lines P10-P15 is registered in a CPU start switch 72, the start switch 72 may be de- addressable port register (not shown). As will be pressed when it is desired for the game to be readily apparent to those skilled in the art, the state temporarily stopped. To start the game after such a of the port register may be used to determine the pause, the start switch 72 must be depressed so control function desired by the game player. In this again. Furthermore, it is possible to make the start fashion, the depression of cross-key switch 18 may switch 72 and the select switch 74 possess many be detected by the CPU thereby resulting in char- other functions. acter motion in the right, left, up or down direc- The case 12 is additionally provided with on/off tions. Also, the depression of control switches 70a, switch 1, battery power level light 13, contrast 25 70b, 72 or 74 may be detected and input to CPU adjustment 50, and volume adjustment 66. core 24 via port 27 for implementation of the ap- With reference to Figure 4, the above de- propriate control functions. Still further depression scribed external ROM cartridge 16 is connected to of the control switches shown in Figure 12 can be a CPU 22 housed in the case 12 by a 32-pin used to cause the transfer of data among game connector 20. 30 machines by way of 6-pin connector 65, a cable The CPU 22 includes a CPU core 24, which and a conventional serial register transfer port, un- may, by way of example only, be implemented der control of CPU core 24 serial transfer controller with a commercially available microprocessor such 21, interrupt controller 31, and external ROM car- as a Z80. The CPU core 24 is connected to the 32- tridge 16. Such transfer of data is for the purpose pin connector 20 via timing unit 25a and control 35 of providing simultaneous multiple player competi- bus 26a, address buffer 25b and address bus 26b tion in accordance with particular game programs and data buffer 25c and data bus 26c as well as a stored in external cartridge 16. working RAM or scratchpad memory 23. Therefore, The CPU core 24 is also coupled to an internal when the external ROM cartridge 16 is loaded in RAM 28 and an internal ROM 30. The internal the game machine 10, the CPU core 24 is con- 40 ROM 30 can be accessed by the CPU core 24 only nected to the external ROM cartridge 1 6. when the internal ROM 30 is selected by a mem- As shown in further detail in Figure 5, the ory selecting circuit 32 as is explained in detail above described CPU core 24 includes registers A, below. Clock pulses are supplied by oscillator cir- F, B, C, D, E, H and L each of which is a register cuit 24b in response to crystal generator 24a. of 8 bits, except for program counter PC and stack 45 Clock pulse divider 24c provides one or more pointer SP which are 16 bit registers. The register pulse rates under control of timer 24d. A is an accumulator and the register F is a flag Now, with reference to Figures 7A-7D, an ex- register. By using 4 bits of the 8 bits of the register emplary CPU core address space and the nature of F, it is possible to indicate F1 (carry), F2 (half the data stored in internal memory 30 and the carry), F3 (negative), or F4 (zero flag). The regis- so external memory cartridge 16 will be described in ters B and C, D and E, and H and L may be detail. As shown in Figures 7A and 7B, the internal combined and used as a register of 16 bits. The ROM 30 has a first memory area which is des- CPU 22 preferably has an associated instruction ignated by the addresses "OOOOH-OOFFH" which set permitting a variety of 8 and 16 bit transfers corresponds to a first relatively small address between registers or register pairs, a variety of 8 55 space. The "H" indicates that these addresses are and/or 16 bit arithmetic operations (e.g., ADD, SUB, represented as a hexadecimal number. In the first AND/OR, INC. DEC, etc.), a variety of rotate/shift memory area, first character data for displaying, for operations (e.g., rotate specified register contents example, a trademark "Nintendo", and an external

5 3 EP 0 378 385 A2 10 memory authenticity determining program shown (e.g., 2 bits identifying 1 of 4 gradations of shaded by a flowchart of Figure 9 are stored. color) data. The LCD display register controls the The external ROM cartridge 16 includes the nature of the display, and the status register in- 3xternal ROM 16a. As shown in Figures 7C and dicates the current status of the LCD controller. 7D, the memory space of the external ROM 1 6a is 5 Every dot of the background display data is avail- divided into a second memory area which is des- able by changing the data of the horizontal vertical ignated by the addresses "OOOOH-OOFFH" scroll registers. The LY and LYC registers indicate (which correspond identically to the addresses de- and control the vertical line of the display to which fining the above-described first address space) and data is presently being transferred by way of the a third memory area (second address space) which 10 display drivers. The X and Y window position regis- is designated by the addresses "0100H-7FFFH". ters control that portion or window of the LCD In an authorized external memory cartridge, in a display area in which the OBJ character as well as region starting at the address "0100H" in the third the BG character data appears. Further details re- memory area, second character data (which is the garding these registers and their functions may be same as the first character data) is stored. A game 75 found in Figures 15(A) through 15(L). program is stored in the remaining region of the The LCD control 38 converts display related third memory area. Preferably, in a few bytes after data output from the CPU core 24 into an LCD the second character data storing region, auxiliary drive signal which is output from the display RAM data such as a code identifying a manufacturer, the 42. More specifically, the display data from the name of the game, the cartridge type, the memory 20 CPU core 24 designates addresses of the char- size, etc., are stored. Additionally, complement acter RAM and the VRAM (video RAM) such that a data relating to the auxiliary data (e.g., the com- character, (or object) signal and a background sig- plement of the sum of such data) is also stored. nal are output from the character RAM and the The 'complement data is used during step S17 VRAM. Respective LDC drive signals are com- described below in conjunction with Figure 9. In 25 posed by the LCD controller 38. addition, in the case where the required capacity of The LCD drive signals are applied to an LCD a game program is large, the second memory area common driver 46 and an LCD segment driver 48 ("OOOOH-OOFFH") of the external ROM 16a may through an LCD drive signal buffer 44. Therefore, be used to store such a program data for the by means of the LCD common driver 46 and the game. 30 LCD segment driver 48, an image in accordance Returning to Figure 4, the CPU core 24 outputs with the display related data from the CPU core 24 display data to an LCD controller 38 via a line can be displayed on the LCD panel 14. More buffer 36 under the control of a DMA controller 34. specifically, the LCD panel may, for example, de- The LCD controller 38 is connected to a display fine a 144x160 matrix of pixels or dots, each having RAM 42 via an LCD display RAM interface 40 and 35 a corresponding unique "intersecting" common control, address and data busses. Although not electrode/segment electrode combination. The LCD shown, the display RAM 42 includes a character common driver 46, which drives the lines con- RAM and VRAM of the nature generally shown in nected to the common electrodes, may for exam- Figure 7. Detailed exemplary memory maps of the ple, be a Sharp LH 5076 F. The LCD segment character RAM and the VRAM memory areas are 40 driver 48, may for example be a Sharp LH 5077 F. found Figures 13 and 14, respectively. The exem- These display drivers receive data from the LCD plary map of the VRAM as illustrated in Figure 14 drive signal buffer 44, which receives data indi- includes 1024 blocks (32 x 32) of character code rectly from the CPU via the display RAM 42, the representing background display data. Although LCD RAM interface 40 and the LCD controller 38. only 360 (18 x 20) of the 1024 blocks are displayed 45 In addition, there is an intensity level control 50 on the LCD screen at any particular time, the which is connected to an LCD buffer amplifier 52 selected area to be displayed can be changed by such that the intensity of the LCD panel 14 can be changing the data in the vertical and horizontal adjusted by operating the intensity level control. scroll registers (SCY and SCX) of the LCD control- In addition, as shown in Figure 5, a chip select ler 38. so signal CS1 or CS2 is output from the memory The LCD controller 38 operates under the con- selecting circuit 32. A reset signal from a reset trol of CPU 22 via various addressable circuit 55 is applied to the CPU core 24 and the control/status registers which are located in the memory selecting circuit 32. The reset signal is CPU address space as shown generally in Figure output when a power switch (not shown) of the 7. These registers include an LCD display register, 55 game machine 10 is turned on, and therefore, the LCD controller status register, horizontal and verti- CPU core 24 and the memory selecting circuit 32 cal scroll registers, LCDC vertical line identification are initially reset at that time. Then, a read signal register, and moving object and background palette RD and write signal WR are output from the CPU

6 1 EP 0 378 385 A2 12 core 24, which are suitably input to the external "0100H" or greater but not above "7Fr-r-H". ROM cartridge 16, internal RAM 28, internal ROM Therefore, in the state where the chip select signal 30 and the memory selecting circuit 32. In addition, CS1 is output, the memory space which is repre- as will be described further below an address de- sented by oblique lines rising rightward in Figure 7- code signal is given to the memory selecting circuit 5 (B) may be accessed by the CPU core 24 and thus 32 via an address decoder 33. it becomes possible to read the first character data As shown in Figure 6, the memory selecting from the internal ROM 30. When the chip select circuit 32 includes an RS flip-flop 57. A set input S signal CS2 is output, a memory space which is of the RS flip-flop 57 receives an output of an AND represented by oblique lines lowering rightward in gate 59 which receives three inputs including a w Figure 7(C) may be accessed by the CPU core 24 signal DO, the write signal WR and a detecting and thus it is possible to read the second character signal, i.e., indicated the decoding of the address data which is stored after the address "0100H" in data "FFOOH"". The signal DO is the least signifi- the external ROM cartridge 1 6. cant bit of the data is stored in location "FFOOH". On the other hand, in the case of memory The decoded signal of the address data "FFOOH" w changing or selecting, if the write signal WR is is output from the address decoder 33 when an output from the CPU core 24 and "1 " is stored in output of an AND gate (not shown) which detects the data bit DO in the address FFOOH", the output that all bits A0-A7 of the address data are "0", that from the AND gate 59 becomes "1" and thus RS is, the least significant two digits in the hex- flip-flop 59 is set. Therefore, the non-inverted out- adecimal representation are "00" and an output of 20 put Q becomes "0", AND gate 63 is disabled, if the an AND gate (not shown) which detects that all bits address data exceeds "OOFFH" and if so the chip A8- A15 of the address data are "1", that is, the select signal CS1 becomes "0" and the chip select most significant two digits in the hexadecimal re- signal CS2 from the AND gate 67 becomes "1 ". presentation are "FF" are both output. The reset However, if the address data exceeds "8000H", the input R of the RS flip-flop 57 is coupled to the 25 chip select signal CS2 becomes "0". Therefore, at reset signal RES from the reset circuit 55 (Figure times before or after the memory chips are 4). Then, the non-inverted output Q of the RS flip- changed or selected by the memory selecting cir- flop 57 is applied to one input of an AND gate 63 cuit 32, the memory for the CPU core 24 is con- through an inverter 61 and to one input of an OR structed as shown by the oblique lines in Figure 7. gate 65. A decoded signal indicating address data 30 That is, when the chip select signal CS2 is output, "OOOOH" - OOFFH" is applied to the other input it is possible to execute the program data stored in of the AND gate 63. A decoded signal which cor- the addresses "0100H" -7FFFH" of the external responds to the few bytes (wherein the second ROM cartridges 16. character data is stored) starting at the address In addition, the character RAM, VRAM, various data "0100H" is applied to the other input of the 35 control and status registers and internal RAM, are OR gate 65. The decoded signal of the address always accessible to the CPU core 24 since the data "OOOOH - OOFFH" is the inversion of the chip select signals CS1 and CS2 are not required bits A8-A15 of the address data being OR'ed. The to access these location. decoded signal of the addresses from the address Next with reference to Figure 8-11, the opera- data "0100H" to the address corresponding to the 40 tion of the external memory unit authentication number of bytes storing the second character data technique in accordance with an exemplary em- is the bits A8 - A14 of the address data which are bodiment of the present invention will be de- OR'ed. Then, an output of the OR gate 65 is used scribed. as an input to an AND gate 67 together with a As reflected by steps S1, S3, S5, and S7 of decoded signal of the address "-7FFFH" which is 45 Figure 9, the system is initialized. More specifi- the inversion of the bit A15 of the address data. cally, in the step S1, a predetermined value is set The outputs of the two AND gates 63 and 67 in the stack pointer register SP (Figure 5) of the become the aforementioned chip select signals CPU core 24 and, in the step S3, the memory area CS1 and CS2, respectively. designated by the addresses "8000H -9FFFH", that In operation, when the power switch (not so is, the display RAM 42 is cleared. Then, in the step shown) is turned on, the reset signal is output from S5, the various registers utilized by sound circuits the reset circuit 55 and therefore, the RS flip-flop 541-544, 56, 58, 60, 62, 64 and 66 are initially set. 57 is reset. Therefore, the non-inverted output Q Additionally, in step S7, BG (background) pallet becomes "0". At this time, if the address data from data is loaded in a pallet register (not shown) the CPU core 24 is before "OOFFH", the chip 55 included in the LCD controller 38 by the CPU core select signal CS1 is output from the AND gate 63. in accordance with program data stored in the The chip select signal CS2 from the AND gate 67 internal ROM 30. The pallet data defines 2 bits of is output as "1" when the address data is gradation data to be associated with the character

7 13 EP 0 378 385 A2 14 data to enable 4 different gradations of shaded ing process in the step S21 is entered. color data to be output to the LCD. When the comparison of the first and second In the following step S9, when the address data character data in the step S15 is terminated, as "0100H -" is output by the CPU core 24 in accor- previously noted, a checking operation is executed dance with the program data stored in the internal 5 in step S17 based upon the complement data of ROM 30, the chip select signal CS2 is output by the auxiliary data stored in external ROM 16a, such the above described memory selecting circuit 32. as the ROM size or the like, the code of a manu- In response thereto, the second character data is facturer, the name of the game, the nature of the read from the external ROM cartridge 16 and is cartridge memory (ROM only, or ROM plus RAM), transferred to the character RAM area included in jo et cetera. In this regard, all the auxiliary data may, the display RAM 42. At this time, preferably, in for example, be summed, and the complement of order to create a display which can be easily seen such a sum computed and stored as a complement with fewer character data, the second character number. Then, if the comparison between calcu- data is transferred while being processed to en- lated complement number and the stored com- large the character, for example, twice in length 75 plement number results in a mismatch, the inhibit- and breadth on the LCD panel 14. Then, in order to ing process of the step S21 is entered. display a desired character at a predetermined In the case where the first and second char- coordinate position, in step S11 the character code acter data become coincident with each other and of the desired character is applied to the VRAM the complement data are also coincident in the area of the display RAM 42 such that the display 20 comparison processes in the step S15 and S17, position thereof corresponds to a predetermined the CPU core 24 in step S19 outputs the write position in the VRAM. Then, in the step S13, the signal WR- In response, as previously described second character read from the external ROM car- with reference to Figure 6 and Figure 7, the RS tridge 16 is displayed on the LCD panel 14 for a flip-flop 57 of the memory selecting circuit 32 is set predetermined time period while the same is scrol- 25 and thus the chip select signal CS2 is output. led. For example, the character "Nintendo" repre- Therefore, after step S19, the game program data sentative of the registered trademark as shown in stored in the addresses "0100H - 8000H" of the Fig. 8(A) can be enlarged twice in length and external ROM cartridge 16 can be read and ex- breadth and displayed as shown in Fig. 8(B). Since ecuted. Thereafter, the internal ROM 30 is not such an enlargement process is readily implement- 30 selected and, therefore, it is not possible to access ed by controlling the character RAM, a detailed the same by way of CPU core 24. description thereof will be omitted here. Although In the following step 20, a game processing enlargement processing is preferred, if desired the operation in accordance with the program data of character data as shown in Figure 8(A) may be the external ROM 16a is started. More specifically, displayed as it is without enlargement processing. 35 the CPU core 24, in accordance with the program Next, in the step S1 5, after the character data data stored in the third memory area of the exter- has been displayed the first character data nal ROM 16a, transfers a background character "Nintendo" which is stored in the predetermined data (dot data) to the character RAM area included area of the internal ROM 30 and the second char- in the display RAM 42. At the same time, the BG acter data "Nintendo" are compared with each 40 pallet data and the character code, which des- other. More specifically, in the step S151 of Figure ignates the background character to be displayed 10, the starting address of the first character data and its display position on the LCD panel 14, are of the internal ROM 30 is set in the register group transferred to the VRAM area. Furthermore, the HL of the CPU core 24. In step S152, the starting CPU core 24 reads the character codes of the address of the second character data of the exter- 45 object character to be displayed on a single nal ROM cartridge 16 is set in the register group screen, the display coordinate data and the at- DE of the CPU core 24. Then, as shown in the step tribute data from the third memory area of the S153, it is determined whether the character data external ROM 16a and applies them to the LCD which are designated by the address data loaded controller 38 through the DMA controller 34 and the in the two register groups HL and DE are wholly or so line buffer 36. In response thereto, the LCD control- completely coincident with each other or not. If the ler 38 executes a process for displaying the image both character data are coincident with each other, in which the background character and object char- in the steps S154 and S155, the address data in acters are combined with each other on the LCD respective register groups HL and DE are incre- panel 14. More specifically, the composite data in mented and thereafter, the same comparison op- 55 which the character data of the objects of one line eration is repeated until the value of the register and the background character data stored in the group HL becomes "the end address +1" in the VRAM area are combined and are temporarily step S156. Then, if there is not a match, an inhibit- stored in the LCD drive signal buffer 44 by the LCD

8 15 EP 0 378 385 A2 16 controller 38. Then the LCD controller 38 sequen- each other. However, alternatively, a check need tially applies the dot data to the drivers corre- only be made to determine whether the first and sponding to the dot positions in a direction of line, second character data have a predetermined rela- i.e., row selecting data to the LCD segment driver tionship. 48 and the data for sequentially selecting the col- 5 Furthermore, in the inhibiting process routine umns of the respective lines to the LCD common as shown in Figure 11, as described the flashing of driver 46. The dots where both the row and column the LCD panel is repeated. However, if desired, a are selected are driven for a short time period. In sentence warning that the external ROM cartridge other words, data representative of whether or not being attached at that time cannot be used in this the respective dots of the object characters and the w game machine may be displayed. background character are to be driven to display While the invention has been described in con- are applied to the LCD segment driver 48 and the nection with what is presently considered to be the common driver 46 by the LCD controller 38, where- most practical and preferred embodiment, it is to by the composite image can be displayed on the be understood that the invention is not to be limited LCD panel 14. By repeating such operations in a 75 to the disclosed embodiment, but on the contrary, high speed, sequential manner, the driven dots are is intended to cover various modifications and "displayed" by the density or contrast being dif- equivalent arrangements included within the spirit ferent from that of other dots. Moreover, in accor- and scope of the appended claims. dance with a selected combination of driven dots, an arbitrary character can be displayed on the LCD 20 panel 14. Claims In addition, preferably, if inconsistency is detected in either one of the two comparison steps 1. An authentication system for preventing an S15 and S17, the CPU core 24 executes the inhib- unauthorized external memory unit from being iting process of the step S21 . More specifically, as 25 used in an information processing system which shown in Fig. 11, in the steps S211 and S212, the utilizes a pluggable external memory unit, said CPU 24 writes "white" and "black" in the BG information processing system being capable of palette, and the LCD panel 14 is driven for a displaying a predetermined image by a display predetermined time period that is controlled by a means in accordance with a program stored in said timer as indicated by steps S213 and S214. In 30 external memory unit when the external memory other words, in this embodiment, if the first and unit is attached thereto, said authentication system second character data are not coincident with each comprising: other, the LCD panel 14 is wholly turned on or off an information processing means in said informa- or flashed, whereby the operator or user is notified tion processing system capable of accessing a that the external ROM cartridge which is loaded at 35 predetermined maximum address space, an inter- that time is not an authorized one. nal memory having a first memory area corre- At this time, since the second character data of sponding to a first memory space, relatively small- the external ROM 16a in the external ROM car- er than said maximum address space, and storing tridge 16 has been displayed in the previous step first character data and an authenticity determining S9, the operator or user will know the reason is that 40 program for determining the authenticity of said the external ROM cartridge is an unauthorized car- external memory unit based upon said first char- tridge. acter data, and memory selecting means for select- In addition, as seen from Figure 11, the inhibiting any one of said internal memory and said ing process routine cannot return to the main rou- external memory; tine of Figure 9, the memory bank changing step 45 said external memory unit having an external mem- done in the step S19 is inhibited thereafter, and ory including a second memory area having a thus, the unauthorized external ROM cartridge can memory space corresponding to said first memory not be used. space and a third memory area having a relatively In addition, in the above described embodi- larger second memory space; ment, a trademark such as "Nintendo" is displayed so said external memory including means for storing as the second character data. In the case of an second character data having a predetermined re- external ROM cartridge which is copied such that lationship with respect to said first character data the both character data are coincident with each stored in said internal memory, said second char- other, the manufacturer's trademark will have been acter data being stored in a portion of said third used in an unauthorized manner. 55 memory area of said external memory, said pro- In addition, in the above described embodi- gram for displaying an image in accordance with a ment, it was determined whether or not the first predetermined purpose of use being stored in at and second character data is wholly coincident with least the remaining memory area of said third

9 17 EP 0 378 385 A2 18 memory area of said external memory; playing a predetermined image in accordance with said memory selecting means including means for a program stored in the external memory unit when selecting said first memory space such that said the external memory is attached thereto, compris- information processing means can access the said ing: internal memory when the said external memory 5 said information processing system includes inter- unit is loaded to said information processing ap- nal memory means for storing first character data; paratus- said external memory unit including external mem- said information processing means including ory means for second character data; means for determining whether said first character first means for reading said first character data data and said second character data have said w from said internal memory means; predetermined relationship based upon said au- second means for reading said second character thenticity determining program data stored in said data from said external memory unit when said internal memory; and external memory unit is loaded to said information said memory selecting means including means re- processing apparatus; sponsive to said means for determining for select- 75 display means for displaying an image; ing said second memory space such that said means for controlling said display means to display information processing means can access said ex- character(s) data in accordance with the second ternal memory when said first character data and character data which is read from said external said second character data having said predeter- memory unit by said second means for reading; mined relationship. 20 determining means for determining whether said 2. A system in accordance with claim 1, first character data read by said first means for wherein said information processing means in- reading and said second character data read by cludes a display controlling means for displaying said second means for reading have a predeter- said second character data stored in said external mined relationship or not; memory prior to said determination as to whether 25 allowing means for allowing said information pro- said first character data and said second character cessing apparatus to access to said external mem- data have said predetermined relationship. ory unit when it is determined that said first char- 3. A system in accordance with claim 2, said acter data and said second character data have display controlling means including enlargement said predetermined relationship; and processing means for displaying said second char- 30 inhibiting means for inhibiting said information pro- acter data in an enlarged fashion. cessing apparatus from accessing said external 4. A system in accordance with claim 3, memory unit when it is determined that said first wherein said display controlling means includes character data and said second character data do scrolling means for scrolling said second character not have said predetermined relationship. data on said displaying means. 35 9. A system according to claim 7, wherein said 5. A system in accordance with claim 2, display means is operable to display characters) in wherein said display controlling means includes accordance with the second character data which scrolling means for scrolling said second character is read from said external memory unit by said data on said displaying means. second means for reading prior to when it is deter- 6. A system in accordance with claim 1 , 40 mined whether said predetermined relationship ex- wherein said first character data and said second ists. character data are identical, and wherein if said 10. A system for preventing an unauthorized information processing means determines that said external memory unit from being used in a hand- first character data and said second character data held game machine which utilizes a pluggable ex- are not coincident, said information processing 45 ternal memory unit including external memory means inhibits said memory selecting means from means for storing game programs said system selecting said second memory space such that comprising: said information processing means cannot access main game processing means for executing said said external memory. game program; 7. A system according to claim 1 , wherein said so internal memory means coupled to said main game information processing system is a hand-held video processing means for storing first character data; game system. a pluggable external memory unit including exter- 8. A system for preventing an unauthorized nal memory means for storing said game program, external memory unit from being used in an in- second character data and auxiliary data; formation processing system including an external 55 said main game processing means including: memory unit being attachable or detachable to or first means for comparing said first character data from said information processing system, said in- with said second character data and for generating formation processing system being capable of dis- a first signal if a predetermined relationship exists

10 19 EP 0 378 385 A2 20 between said first character data and said second character data; means responsive to said first signal for performing a predetermined calculation using said auxiliary data; 5 second means for comparing the results of said predetermined calculation with a prestored value; and means for enabling game program to be executed if said first signal is generated and if said predeter- w mined value has a predetermined relationship with said prestored value. 11. A system according to claim 10, further including display means for displaying said second character data. 75 12. A system according to claim 11, further including means for vertically scrolling said second character data across said display means. 13. A system according to claim 11, further including means for processing said second char- 20 acter data to permit an enlarged display of said second character data. 14. A system according to claim 10, further including means for transferring said second character data from said external memory means to a 25 character memory means, means for processing said second character data, means for writing said processed second character data to a video memory means; and means for displaying said processed second character data. 30 15. A system according to claim 10, wherein said means for enabling includes memory bank switching means responsive to said second means for comparing to operatively couple said main game processing means to said external memory 35 unit. 16. A system according to claim 10, wherein said predetermined calculation involves taking the complement of the sum of at least a portion of said auxiliary data. 40 17. A system according to claim 10, wherein said auxiliary data includes data indicative of the manufacturer and the name of the game. 18. A system according to claim 10, wherein said auxiliary data includes data indicative of the 45 cartridge type and the memory characteristics, 19. A system according to claim 10, wherein said first means for comparing including; means for setting the starting addresses of the first character data and the second character data in registers 50 associated with said main game processing means and means for incrementing said addresses.

~~11 EP 0 378 385 A2 EP 0 378 385 A2~~

~~BRIGHTNESS ADJUSTMENT~~

~~PROGRAM CARTRIDGE~~

~~24 d~~

~~FIG. 4 EP 0 378 385 A2~~

~~FIG. 5~~

~~iVcc~~

~~55 CPU CORE RESET PC S P A F B C -*-RD D E H L~~

~~33 24~~

~~3 ADDRESS DECODER WR LJ2 MEMORY TCSI SELECTING r~ics2 y. CIRCUIT~~

~~BUS EP 0 378 385 A2~~

~~32 OOOOH-OOFFH V~~

~~DO> >CS1~~

~~FFOOH~~

~~>CS2~~

~~FIG. 6 -OIOOH -7FFFH~~

~~FIG. 8~~

~~(A)~~

(B) □ /////, ///*

~~^ i ^ i i i EP 0 378 385 A2~~

~~f START )~~

~~SET STACK LSI~~

~~CLR DISR RAM hS2 (8O00H-9FFFH)~~

~~INITIALLY SET L S5 SOUND CIRCUITS~~

~~NO SET BG S7 PALETTE~~

~~COMPARE SI7 COMPLEMENT TRANSFER hS9 DATA CHARACTER DATA FROM EXTERNAL ROM TO CHAR. RAM~~

~~JL SI! NO APPLY THE CHARACTER DATA TO VRAM SI9~~

~~CHANGE MEMORY SO AS TO SI3 ENABLE SCROLL BG EXTERNAL ROM~~

~~COMPARE START CHARACTERS OPERATION IN ACCORDANCE WITH EXTERNAL ROM(FROM 01QOH)~~

~~S2I FIG. 9 EP 0 378 385 A2~~

~~FIG. 10~~

~~Q START )~~

~~SET A STARTING ADDRESS OF FIRST -S151 CHARACTER DATA IN REGISTER GROUP H L~~

~~SET A STARTING ADDRESS OF SECOND *KS152 CHARACTER DATA IN REGISTER GROUP DE~~

~~S153~~

~~S21a~~

~~HL*-HL+ 1 -S154~~

~~DE— DC + 1 1^-S155~~

~~S156~~

~~FIG. 11~~

~~( $TART )~~

~~WRITE "WHITE" IN PALETTE -}^S211~~

~~TIMER S213~~

~~WRITE "BLACK" IN PALETTE ^fx.S212~~

~~TIMER J\-S214 EP 0 378 385 A2~~

~~FIG. 12~~

~~VDD P14 P15~~

~~70a P10~~

~~70b P11~~

~~SELECT (72) P12~~

~~START (74) P13~~

~~FIG. 14 BACKGROUND (BG) DISPLAY~~

~~■256 DOTS — (32- BLOCKS) *2 160 DOTS ■ (20- BLOCKS)~~

~~7/dO/ 01 02 i ! 19 20 30 31 LuL...... ! j 32 | i | ! 51 52 62 63~~

~~144 DOTS 64 j ! • ! 83 84 94 95 (18-BLOCKS) i ! ! ! ! ! 126 127 : i 544 545 546 | j 563 564 ■ 1 576 577 578~~

~~256 DOTS 608 609 610 (32-BLOCKS)~~

~~992 993 994 1022 1023~~

~~Bit 76-10 OBJ display area, when *1 LCD display area, when X»08H and Y«10H are set. SCX-0 and SCY»0 are set. *2 BG area EP 0 378 385 A2~~

~~FIG. 13 CHARACTER RAM~~

~~OBJ 8x8 CHARACTER ADDRESS BG 8x8 1 DOT DATA 8000 - I CODE 7 GRADATION (LOWER) 6 5 4 3 2 0 M 00 8000 GRADATION (UPPER) OBJ 800 1 4K-BYTE ... eeooH 8002 OBJ - 00 | W/, 1~~

~~8FFFH '-LU- 4K-BYTE 0 1 80 10 I OBJ-01 L97FFH~~

~~OBJ/BG COMMON AREA~~

~~80 8800 OBJ -80 BG -80 8 1 88 10 OBJ- 81 BG -81~~

~~OBJ. BG COMMON AREA F t 8FE0 OBJ- FE BG - FE FF 8FF0 OBJ-FF 8 F FF BG - FF 00 9000 BG -00 900F~~

~~7F 97F0 BG -7F 97FF EP 0 378 385 A2~~

~~FIG. 15A LCD DISPLAY REGISTER~~

~~HHWL AUUNtSS LCDC FF40 7 6 5 4 3 2 1 o| R/W LCD CONTROL~~

BG DISPLAY 0:OFF 1:ON OBJ DISPLAY 0:OFF 1:0N OBJ CONSTRUCTION 0:8x8 1:8x16 BG SCREEN DISPLAY DATA SELECT 0:9800H-9BFFH 1:9C00H-9FFFH BG CHARACTER DATA SELECT 0:8800H-97FFH 1:8000H-8FFFH SAME AREA AS OBJ WHEN"l" IS SELECTED WINDOW DISPLAY 0:0FF 1:0N WINDOW SCREEN DISPLAY DATA SELECT 0:9800H-9BFFH 1:9C00H-9FFFH LCD CON! ROL OPERATION 0:STOP COMPLETELY(NO PICTURE ON SCREEN) 1.-OPERATION

NMMt AUUKtSS STAT FF41 \ 6 5 4 3 2 1 R/V.' LCDC STATUS 0|' ' ^ I ' i ' i ' i ' i ' i ' i /10DE FLAG 00: ENTIRE DISPLAY RAM CAN BE ACCESSED 01:DURING V- BLANK 10:DURING SEARCHING OAM -RAM 11 : DURING TRANSFERING DATA TO LCD DRIVER lOINCIDENCE FLAG 0:LYC* LCDC LY 1:LYC9* LCDC LY MTERRUPT SELECTION BY LCDC STATUS MOQE-00 SELECT MOOE-01 SELECT 0:NON SELECTION MODE- 10 SELECT 1 SELECTION YC= LY COINCIDENCE (SELECTABLE) :P 0 378 385 A2

~~FIG. 15C~~

~~NAME ADDRESS BIT R/W SCROLL-Y SCY FF42 7 6 5 4 j 3 2 1 0 J OO-FF~~

~~FIG. 15D NAME ADDRESS BIT . 1 j- R/W SCROLL -X SCX FF43 7 6 5 4 3 2 1 j 0 j 00~FF~~

~~FIG. 15E~~

~~NAME ADDRESS BIT . LY FF44 7 6 5 4 3 j 2 1 J o| LCDC Y- COORDINATE~~

~~FIG. 15F NAME ADDRESS BIT ... LYC FF45 7 6 5 4 j 3 J 2 j 1 J 0 j R/W LY COMPARE~~

~~FIG. 15G~~

~~NAME ADDRESS BIT | BGP FF47 7 6 5 4 3 2 1 0| W BG PALETTE. DATA~~

~~DATA FOR DOT DATA- 00 DATA FOR DOT DATA-01 DATA FOR DOT DATA- 10 DATA FOR DOT DATA- 11~~

FIG. 15H NAME ADDRESS BIT OBPO FF48 7 6 5 4 3 2 1 0 W OBJ PALETTE DATA (O) (IN CASE OF OAM PALETTE SELECT FLAG-O) u u - DATA FOR DOT DATA- 00 - DATA FOR DOT DATA-01 - DATA FOR DOT DATA- 10 - DATA FOR DOT DATA- 1 1 EP 0 378 385 A2

~~FIG. 151~~

~~NAME ADDRESS BIT 0BP1 FF49 7 6 5 4 3 2 1 0 W OBJ PALETTE DATA (1) (IN CASE OF OAM PALETTE SELECT FLAG-1) hi DATA FOR DOT DATA- 00 DATA FOR DOT DATA-01 DATA FOR DOT DATA- 10 DATA FOR DOT DATA- 1 1~~

~~FIG. 15 J~~

~~NAME ADDRESS BIT WY FF4A 7 6 5 4 3 2 1 0 R/W WINDOW Y- POSITION 0 = WY = 143~~

~~FIG.15K NAME ADDRESS BIT WX FF4B 7 6 5 4 3 2 1 0| R/W WINDOW X- POSITION 7 = WX = 166~~

~~WX 159 0 LCD DISPLAY AREA~~

~~WY WINDOW DISPLAY AREA FIG.15L~~

~~143~~