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Memory & Storage Challenges and Solutions Memory & Storage Challenges and Solutions G S A 2 0 1 9 Jinman Han Senior Vice President, Memory Product Planning & Application Engineering Legal Disclaimer This presentation is intended to provide information concerning SSD and memory industry. We do our best to make sure that information presented is accurate and fully up-to-date. However, the presentation may be subject to technical inaccuracies, information that is not up-to-date or typographical errors. As a consequence, Samsung does not in any way guarantee the accuracy or completeness of information provided on this presentation. The information in this presentation or accompanying oral statements may include forward-looking statements. These forward-looking statements include all matters that are not historical facts, statements regarding the Samsung Electronics' intentions, beliefs or current expectations concerning, among other things, market prospects, growth, strategies, and the industry in which Samsung operates. By their nature, forward- looking statements involve risks and uncertainties, because they relate to events and depend on circumstances that may or may not occur in the future. Samsung cautions you that forward looking statements are not guarantees of future performance and that the actual developments of Samsung, the market, or industry in which Samsung operates may differ materially from those made or suggested by the forward-looking statements contained in this presentation or in the accompanying oral statements. In addition, even if the information contained herein or the oral statements are shown to be accurate, those developments may not be indicative developments in future periods. Abstract Memory-centric system innovation is the overarching theme of modern semiconductor technology and is one of the crucial driving forces of the future IT world. As one of the foundational elements of the future IT industry, modern memory and storage technology remains critically important. Various new technologies based on DRAM and NAND have been developed for future application, while the limitation of the trade-off between performance and cost metrics has driven attention to the search for optimal solution. Therefore, A deep understanding of the memory industry and memory technology is crucial for accelerating the new data centric world. In this talk, current memory and storage challenges and solution are addressed. Various cutting-edge memory and storage technology and their implications are also investigated. General Trend Industry Change Memory Change Big Changes on Industry Smart Factory Smart Auto Bigger Home data Process time & energy ↑ Memory Processor-centric Memory-centric Big Changes on Memory One size can’t fit all Memory Hierarchy change 1) One size can’t fit all (# of applications) Auto Smart Factory Health Smart Home ………...…….. .. …... …..… ………… Various Memory Requirements 5G Reliability Thermal AI High Performance Thin Package Low Cost TB GB High Capacity Low Power Auto Datacenter Diversification on DRAM HBM HBM2 LPDDR5 LPDDR GDDR6 GDDR DDR High Capacity DDR4 DIMM PC Era Mobile Era Datacenter Era AI Era DRAM Solutions HBM2 GDDR6 8H stack HBM2 over 1TB/s system memory bandwidth 18Gbps Highest speed Compact & Power efficient package 864GB/s system memory bandwidth LPDDR5 DDR4 over 50GB/s bandwidth 256GB max density 40% lower power (compare with LPDDR4X) Align with High capacity requirement Diversification on Storage SATA SSD PC Era Datacenter Era AI Era Storage Solutions Z-SSD eUFS Z-NAND based solution 24Gbps Performance <100us latency in storage system Low Power consumption for mobile QLC SSD 3D NAND High Capacity solution Outstanding Performance as Read-Intensive warm data storage with 120+ vertical stacking 2) Memory Hierarchy Change GB] Cost [$/ Performance Cost Cost DRAM SCM “Attack of the Killer ㎲” NAND Luiz Barroso et.al. HDD SCM: Storage Class Memory ㎲ Performance New Memory Solutions as Gap Filler Traditional Hierarchy New Hierachy Small # of Huge # of SW based Software Hardware Technology Collaboration (/each component) (in system level) New Memory Solution : Z-SSD PERFORMANCE Z-SSD™ Read Latency Read QoS–99.999% For Data Analytics & Artificial Intelligence (4KB Random, FIO) (Mixed Random) Samsung Z-NAND 5.5x 100x Lower Lower New CONTROLLER Fast High < 15 us Response Bandwidth < 300us TLC based Z-SSDTM TLC based Z-SSDTM Measured by Samsung Many Challenges Ahead Performance Power Reliability Blocksize Customized Form Factor Solution DRAM Challenges Performance Power Reliability Ever-Increasing Memory Performance 700 Require more memory B/W 600 - Number of channel ↑ System memory - Per pin speed ↑ requirement 500 400 BW gap 300 Performance (GB/s) Performance 200 Memory BW 100 0 `11 `15 `20 `25 (year) DRAM Capacity Increase within Power Budget ② Additional enablers - New technology - Arch. optimization Power (w) Power ① Traditional enablers - Voltage down - Process scaling Limit by industry rack infrastructure for 1U/2U (15W) 64GB 128GB 256GB 512GB 768GB 64GB 128GB 256GB 512GB 768GB DDR3 DDR4 DDR4 DDR5 DDR5 (4GbxQDP) (8Gbx4H) (16Gbx4H) (16Gbx8H) (24Gbx8H) [email protected] [email protected] [email protected] [email protected] [email protected] Continuous Scaling with better RAS Solution Cell Capacitance 1 O/H with Redundancy cell Chip sizeO/H Chip Most effective way to achieve DRAM reliability target O/H with On-die ECC 0 30xnm 2xnm process 1xnm process and later NAND Challenges Blocksize Power What will happen? ~500 V-Stack Up # of Stacked WLs # of Stacked ~100 2019 2025 Block Size Increase 1 Block How to manage a Huge Block? 400 ~10x 1 Block 200 1x Block Size 0 20192018 20252025+ Power Consumption Increase How to reduce the impact of ~5x # of WLs? ~2x 1x Power derived from # of WLs ↑ 2019 2025 Storage Solution Challenges Performance Customized Next Scalibility Solution Form Factor Scalability on Performance over Capacity 32ch CTRL ?? External Bandwidth = Internal Bandwidth Industry 16ch requires Performance Scalability Hetero-Media High-Speed NAND SSD 8ch NAND Capacity 16TB 32TB 64TB 128TB @’16 @’18 Platform Architecture for Customized Solutions Workload Read-Intensive Read/Write Mixed Write-Intensive Pattern Sequential 100% Mixed Random 100% Applications DWPD 0.1 0.3 0.5 1 3 5 10 dependent Power Energy-Oriented Performance-Oriented Requirements Feature SR-IOV IOD ZNS Customized Features ∙∙∙ S/W Feat. Security Z-NAND MLC/TLC QLC Ch Module-1 Ch Module-2 Power Switch Buffer Next Form Factors of SSD Performance Tier Caching Tier NF1 E1.S HHHL : Extendability limit HHHL E1.L U.2 ? U.2 : Connector SI limit E3 Capacity Tier M.2 Booting M.2 : Power limit Open Standard Semiconductor sales exceed DDR2 DDR3 DDR4 NVDIMM-P DDR5 $200b SATA PCIe NVMe PCIe PCIe $100b 1.0 2.0 1.1 5.0 $1b 4.0 PCIe SATA SATA PCIe NVMe NVMe NVMe 1.0 2.0 3.0 3.0 1.0 1.2 1.3 ‘66 ‘94 1999 ‘00 2003 2004 2005 2007 2008 2010 2012 2013 2014 2016 2017 2018 2019 UTRAM RDRAM OneNAND OneDRAM PCM S/W Defined Turbo Hybrid Memory FlashDIMM DIMM Memory EDRAM Low Latency DRAM DDR-T Key Summary • Diversifying workloads and requirements require multiple memory/storage solutions • To bring about hierarchical changes, ecosystems must get ready • If we think about 5 years ahead, technical challenges loom large • Open standards are critical, but there’re too many de-facto standards “We will find a way, we always have…“ – Interstellar, 2014 - .
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