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Non Equlibrium Green Functions NEGF Quantum Transport, Nanowires, Ballistic Effects Etc

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Non Equlibrium Green Functions NEGF Quantum Transport, Nanowires, Ballistic Effects Etc Network for Computational Nanotechnology (NCN) Non Equlibrium Green Functions NEGF quantum transport, nanowires, ballistic effects etc. Gerhard Klimeck Network for Computational Nanotechnology (NCN) Purdue University November 2, 2014 Intel technology roadmap Today: Non-planar 3D devices have better gate control! Intel 22nm finFET 22nm = 176 atoms 8nm = 64 atoms http://www.goldstandardsimulations.com/index.php/news/blog_search/simulation-analysis-of-the-intel-22nm-finfet/ http://www.chipworks.com/media/wpmu/uploads/blogs.dir/2/files/2012/08/Intel22nmPMOSfin.jpg Today: Non-planar 3D devices have better gate control! Intel 22nm finFET 22nm = 176 atoms 8nm = 64 atoms http://www.goldstandardsimulations.com/index.php/news/blog_search/simulation-analysis-of-the-intel-22nm-finfet/ http://www.chipworks.com/media/wpmu/uploads/blogs.dir/2/files/2012/08/Intel22nmPMOSfin.jpg Roadmap of finite atoms Atomistic Modeling => NEMO nm Node 22 14 10 7 5 Node atoms 176 122 80 56 40 Critical atoms 64 44(?) 29(?) 20(?) 14(?) Electrons 160-190 64-80 30-38 18-23 11-15 Roadmap of finite atoms nm Node 22 14 10 7 5 Node atoms 176 122 80 56 40 Critical atoms 64 44(?) 29(?) 20(?) 14(?) Electrons 160-190 64-80 30-38 18-23 11-15 Quantum dot research nm Node 22 14 10 7 5 Node atoms 176 122 80 56 40 Critical atoms 64 44(?) 29(?) 20(?) 14(?) Electrons 160-190 64-80 30-38 18-23 11-15 Roadmap of finite electrons nm Node 22 14 10 7 5 Node atoms 176 122 80 56 40 Critical atoms 64 44(?) 29(?) 20(?) 14(?) Electrons 160-190 64-80 30-38 18-23 11-15 Single electron effects in today’s transistors (2008) z Single atom transistors (2012) The Physical Limit of Moore’s Law Challenges ahead on the road of ever cheaper transistors 20m 20m 19m Number of 16m 28nm 20nm 16nm transistors / $ 11.2m 40nm The Economic 7.3m End of Moore’s Law? 65nm 4.4m 2.6m 90nm 130nm Transistor size 180nm 2002 2004 2006 2008 2010 2012 2014 2015 http://www.economist.com/news/21589080-golden-rule-microchips-appears-be-coming-end-no-moore The International Technology Roadmap for Semiconductors (ITRS) ITRS Quick facts ITRS Groups • Worldwide joint effort since 1998 • 16 chapters • Ensures cost-effective • Process integration and advancements in ICs Device and Structures (PIDS) • More than 1000 engineers/ • System and drivers scientists worldwide • Lithography • Most successful roadmap • Test • Packaging, ITRS identifies technological challenges for the semiconductor industry over the next 15 years Gerhard Klimeck ITRS has predicted successfully future technology trends 1000 2011 ITRS Technology Trends 1000 Pitch 0.7x every 65nm 100 2 years 45nm Gate Pitch (nm) 32nm 112.5 nm 100 - 1995 2000 2005 2010 Moore’s Law Nanometers 10 ITRS MPU/ASIC Metal 1 ½ Pitch (nm) [historical trailing at -2yr cycle; extended to 2013 then 3yr cycle] Transistor Gate Technology ITRS MPU Printed Gate Length (GLpr) (nm) Power performance Management [3- yr cycle from 2011] Enabled by “Equivalent Scaling” ITRS MPU Physical Gate Length (nm) [begin 3.8- yr cycle from 2009] Year of Production 1 1995 2000 2005 2010 2015 2020 2025 2030 Year of Production Adopted from Alan Allan (www.itrs.net) Gerhard Klimeck Current ITRS predictions contradict latest experimental observations => Problem! ITRS projects ITRS projection rising ON current with smaller devices Experiment Experimental results indicate decreasing ON current ITRS projections point in opposite direction than experimental observations why? Gerhard Klimeck ITRS MASTAR • MASTAR: Model for Assessment of cmoS Technologies And Roadmaps (Skotnicki et al.) » Analytical drift-diffusion model. • Basic assumptions » Short channel effects are controlled through reducing oxide thickness. reducing junction depth (bulk), body thickness (SOI/DG). increasing doping concentration in the channel. » On-current is improved in the future nodes through Mobility/velocity increase due to strain technology and ballistic transport. • Shortcomings/Challenges » No 2D electrostatics included. » Lumped element assumption. » Limited quantum effects included (no tunneling) Gerhard Klimeck MASTAR compact model used by ITRS not suitable anymore for ultra-scaled devices Non-atomistic MASTAR model does not match experiments Recent Device MASTAR SS, DIBL, OUT IN IN MASTAR: Analytical ION, SS, DIBL, SCE Lg, EOT, Tsi, Models Experiment VDD, εox , Drawbacks • No electrostatics calculation • Dependent on fitting parameters • Fails for ultra-scaled devices Current MASTAR model lacks important physics inaccurate predictions Gerhard Klimeck NEMO predicts ITRS trends in line with experimental observations Atomistic modeling using NEMO yields correct device trends NEMO Geometry dependent MASTAR enables properties ITRS-2011 atomistic Short Channel Effects NEMO modeling ITRS-2013 of S/D Tunneling Experiment Modern ultra-scaled devices necessitate atomistic modeling tools Gerhard Klimeck Quantization and Anisotropy Need a full band – atomistic model (beyond m* or k•p) [010] (d) (b) (c) kx kx Cut through Cut through the the ellipsoid 3nm kx line (x-y plane) Small Device (L) => largeGerhard k= Klimeckπ /L => large anisotropy Band Projection in [100] Quantum Wells (concrete example for Si:P case, but generic for Si QW) • 3D2D Si [100] quantum well - +&-, ! ,(' ) , # % + 0$ ,(**+) .+**/ Gerhard Klimeck Band Projection in [100] Quantum Wells => [010] wire (concrete example for Si:P case, but generic for Si nanowires) • 3D2D1D projection of Si [100] nanowire Si:P [100] Wire ( 1 4 &!(' ) '#"$ & , '!'& &#$ '#%%&$ *&%%+ & Gerhard Klimeck Band Projection in [100] Quantum Wells => [110] wire (concrete example for Si:P case, but generic for Si nanowires) • 3D2D1D projection of Si [100] nanowire Si:P [110] Wire ( 2 2 &!(' '#"$ ' ' + '!'& &#$ '#%%&$ )&&%* & Gerhard Klimeck Band Projection in [010] and [110] Si Quantum Wires (concrete example for Si:P case, but generic for Si nanowires) [100] [110] Effective Mass variesGerhard Klimeck with Geometry! Quantum Confinement varies band structure and DOS Gerhard Klimeck Quantum Confinement varies band structure and DOS Geometry dependent properties 60% Previously unconsidered Trade-Offs 33% => Details matter! Gerhard Klimeck Short channel effects degrade device performance Short channel effects Gate Source • Short channel effects • DIBL • S/D Tunneling Drain Drain • Shortening the channel increases control of drain on top-of-the- barrier • DIBL and Sub threshold Slope (SS) increases with scaling DIBL and SS increase with scaling Gerhard Klimeck Gate Scaling Increases Tunneling Currents S/D tunneling Gerhard Klimeck S/D tunneling increases SS and is scaling dependent S/D tunneling • Cause: carrier passing through S/D tunneling thin potential barrier increases SS, degrades device performance and • Tunneling depends on increases with Potential barrier width scaling Carrier effective mass • Tunneling is f(m*, LG) LG ↓ Tunneling ratio ↑ Body thinning reduce m* Tunneling ratio ↑ • Gate has to control the tunneling and thermionic current LG ↓ SS ↑ Vth ↑ ION ↓ Gerhard Klimeck Summary: NEMO results for ITRS projections Analytical model only NEMO atomistic model MASTAR ITRS projection ITRS-2011 Experiment NEMO ITRS-2013 Experiment ITRS problem shows growing relevance of atomistic modeling Gerhard Klimeck DG UTB benchmark DG 2020 and DG 2028 UTBs have been benchmarked Parameter DG HP 2028 DG HP 2020 LG 5.1 nm 10.6 nm Leff (0.8*LG) 4.1 nm 8.5 nm Tsi (0.4*Leff) 1.64 nm 3.4 nm Lead length 10 nm 10 nm 2E20/cm3 in leads, 1.47E20/cm3 in leads, Doping 1E15/cm3 in channel 1E15/cm3 in channel EOT 0.41 nm (k=20.66) 0.59 nm (k=15.25) Vdd 0.64 V 0.75 V Gerhard Klimeck DG HP 2020 - Results OFF ON Tunneling ratio @OFF state: 58% Parameter NEMO5 OMEN Relative Difference SS (mV/dec) 82.54 81.81 0.8 % ION (µA/µm) 2826.5 2927.8 3.4 % DIBL (mV/V) 108 102 5.8 % Gerhard Klimeck DG HP 2028 - Results OFF ON OFF Tunneling ratio NEMO5: 97.27% OMEN: 97.68% Parameter NEMO5 OMEN Relative Difference SS (mV/dec) 102.74 98.12 4.7 % ION (µA/µm) 1798.2 1788.2 0.56 % DIBL (mV/V) 147 125 17.6 % Gerhard Klimeck Modeling of modern semiconductor devices requires atomic-scale resolution Intel roadmap Atomistic model of finFET device 22nm = 176 atoms Intel 22nm finFET 8nm = 64 atoms Non-planar 3D devices have better control! Gerhard Klimeck NEMO models realistic devices with atomistic resolution Computational Nanoelectronics NEMO can model • Quantum Dots • Nanowires • MOSFET • Impurities • Many more 18 years development: Texas Instruments, NASA JPL, Purdue Gerhard Klimeck NEMO5 offers user-friendly GUI interface 2 3D geometric 1 representation 3 Crystal 2 visualization 1 Hierarchical 3 structure Gerhard Klimeck Quantum transport is far from equilibrium Dimensions Macroscopic Atomic Diffuse Ballistic Quantum Regime Transport Drift / Diffusion Boltzmann Transport Non-equilibrium Green functions UNIFIED MODEL Σs SILICON D μ1 H μ2 INSULATOR VG V D VG V D Σ1 Σ2 I Gerhard Klimeck Journey through nanoelectronics tools: NEMO and OMEN Tool Name NEMO-1D Transport Yes Dim. 1D Atoms ~1000 [100] Crystal Cubic, ZB Strain - Multiphysics - Parallel 3 levels Computing 23, 000 cores Impact 4 top pubs cites: 545,157,128,82 Patents:2 Gerhard Klimeck 36 Journey through nanoelectronics tools: NEMO and OMEN Tool Name NEMO-1D NEMO-3D Transport Yes Yes Dim. 1D any Atoms ~1000 50 million [100] [100] Crystal Cubic, ZB Cubic, ZB Strain - VFF Multiphysics - - Parallel 3 levels 1 level Computing 23,
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