United States Patent 15 3,700,872 May [45] Oct

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United States Patent 15 3,700,872 May [45] Oct United States Patent 15 3,700,872 May [45] Oct. 24, 1972 54 RADX CONVERSON CRCUTS Primary Examiner - Maynard R. Wilbur Assistant Examiner- Leo H. Boudreau (72) Inventor: Frederick T. May, Austin,Tex. Attorney-Hanifin and Clark and D. Kendall Cooper (73) Assignee: International Business Corporation, Armonk, N.Y. 57) ABSTRACT 22 Filed: Aug. 22, 1969 Data conversion circuits with optimized common hardware convert numbers expressed in a first radix C (21) Appl. No.: 852,272 to other radices n1, m2, etc., with the mode of opera Related U.S. Application Data tion being controlled to establish a radix C to radix ml conversion in one mode, a radix C to radix n2 conver 63 Continuation-in-part of Ser. No. 517,764, Dec. sion in another mode, etc., on a selective basis, as 30, 1965, abandoned. desired. In a first embodiment, numbers represented in a binary (base 2) radix Care converted to a base 10 52 U.S. Ct.............. 235/155,340/347 DD, 235/165 (n1) or base 12(m2) representation. In a second em 51 int. Cl.............................................. HO3k 13/24 bodiment, numbers stored in a ternary (base 3) radix 58 Field of Search......... 340/347 DD; 235/155, 165 C representation are converted to a base 12 (n1) or base 10 (m2) representation. The circuits are 56 References Cited predicated upon recognition of the fact that a number UNITED STATES PATENTS represented in a first radix can be converted readily to a second radix using shared hardware if the following 2,620,974 12/1952 Waltat.................... 23.5/155 X equation is satisfied: 2,831,179 4/1958 Wright et al........... 23.5/155 X 2,928,600 3/1960 Fleming.......... 340/347 DDX n =C (PC-1) 3,120,723 12/1961 Goertzel et al............ 23.5/155 3,026,035 3/1962 Couleur..................... 23.5/155 as CX 3,032,266 5/1962 Couleur..................... 23.5/155 In the equation, in represents the divisor, that is, the 3,082,950 3/1963 Hogan....................... 23.5/155 base or radix to which the existing data is to be con 3,151,238 9/1964 Symons..................... 23.5/155 verted. C represents the radix or base of the original 3,257,547 6/1966 Bernstein................... 255/155 data. The factors P and n are positive integers used in the equation for convenience. If any set of values for P and n satisfy the equation for n in the specified base C OTHER PUBLICATIONS of the dividend, then division by m can be imple Grabbe et al., Handbook of Automation, Computa mented. The determination that the equation is tion, and Control, Vol. 2, 1959; pp. 2-14-2-18. satisfied for any original source data is first made in order to develop the circuits appropriate for convert ing the source data to other radices. 10 Claims, 34 Drawing Figures FIRS CYCLE: GENERATE UNIS DGIT" N BASE 10 OR ASE 2 FRC BASE 2 DATA BASE 12 Lists ().9.2CT AO 4 2 MEMORY WRE READ TIME NARY ACCULATOR B AMPLFER 8ASE 10 BASE 2 CARRY SORRow 8 4 PATENTEDOCT 24 1972 3,7OO,872 SHEET O OF 14 ASE t FIG. T2 FIRST CYCLE : is GENERATE UNITS DIGIT" - 4 N BASE 10 OR is BASE 2 FROM BASE 2 DATA BASE 12 III 2 Ys 2 its,F A it lit LArchesA (AB942A, Z / ADD 8 2 MEMORY i. READ TIME BINARY AMPLIFER E. accuxur ORROW 8 4 2 7 F.G. O. 23 BASE 10 8 + VOLTAGE INVENTOR FREDERICK T. MAY a 2/6d.-4 6744 ATTORNEY. PATENTEDOCT 24 1972 3.7OO,872 SHEET O2 OF 14 SECOND CYCLE: FIG. 3 SUBTRACT UNITS DIGIT FROM BASE 2 DATA DELAY ONE READ/WRITE 8 4 2 8 4 2 SUBTRACT SUBTRAHENO READ TIME CARRY A CCUMULATOR ORROW 8 4. SENSE AMPFER MEMORY BINARY WRITE AMPFER THIRD CYCLE: SHIFT RIGHT in POSITIONS n FOR O - (2) (5) n = 2 FOR 12 - (2) (3) PATENTEDOCT24 1972 3.7OO,872 SHEET O3 OF 14 FIG.5 8 4 2 8 4 2 A CCUMULATOR DIVISOR 3 SENSE AMPFERA DELAY ONE MEMORY READ-1 WRITE BINARY AMPLFER o WRITE FOURTH CYCLE : DVDE BY 5 (FOR O) OR BY 3 (FOR 2) USING SUBTRACTION PATENTEDOCT 24 1972 3,7OO,872 SHEET O OF 14 FIRST CYCLE: "Y: GENERATE ". UNTS DCT IN BASE 10 OR 2 65 " - Til FROM BASE 3 DATA 49 to BASEO a".50 His D TO T o BASES2S2 O 37 5-ti BASE 12. 32 + VOLTAGE BASE 2 68 Liters A. 6 3 2 AD 9 S 3 2 S READLIME LATCHES (BS to A CCUMULATOR BASE 12 RIT AMPLIFER C WRITE it in IGNORE 3t it. MEMORY BASE 3 DATA WRITE AMPLIFER CLOCK PATENTEDOCT24 1972 3,7OO,872 SHEET OS OF 14 SECOND CYCLE : 70FIG.9 LATCHES SUBTRACT "UNITS DIGIT "FRON T -- BASE 3 DATA A6 7 du-9 A3 OR A2 74 73 D-93 ORE A TO a-94 3. T A9 69 89 | 6 3 2 9 6 3 2 MINUEND SUBTRAHEND READ TIME, ACCUMULATOR BORROW 96 3 LATCHESS DELAY ONE READ READ 1 WRITE AMPFER MEMORY BASE 3 DATA WRITE(i. AMPLIFER 8 WRITE 90 DELAY ONE READ1WRITE FIG.O THIRD CYCLE: READ SHIFT RIGHT r POSITIONS AMPFER POSITION FOR m = 2 NO POSITIONS FOR m = 0 MEMORY BASE 3 DATA AMPLFER PATENTEDOCT 24 1972 3.7OO,872 SHEET OS OF 14. CLOCK FIG. 6 3 2 6 3 2 SUBTRACT READ TIME A CCUMULATOR BORROW 9 6 3 2 DELAY ONE READ 1 WRITE AMPLIFER DELAY ONE READ1 WRITE MEMORY BASE 3 DATA WRITE AMPFER FOURTH CYCLE: DIVIDE BY X (X - 10 FOR BASE 10 4 FOR BASE 12) USING SUBTRACTION PATENTEDOCT 24 1972 3.7OO,872 SHEET O7 OF 14 02 F.G. 3 105 (NEGATIVE GOING PULSE) SYNC FIG. 44 GATE X ON GATE X: OFF L J SYNC PATENTEDOCT24 1972 3, 7 OO,872 SHEET 08 OF 14 F.G. 5 READ (writt READ WRITE 08 OSCAOR F.G. 6 T4 REPEATING SAME LOGIC T5 (UP Tn- ) OR (DOWN Tn) USED TO GATE Tn 6 PATENTEDOCT24 1972 3,7OO,872 SIEET 10 OF 14. CD FIG. 19 CORRECTIVER CD S8 S4 S2 S4 A8 A4 A2 A D2 BINARY i Six OR FOUR 5. ACCUMULATOR 4 2 8 4 2 - ACCUMULATOR CARRY/BORROW 8 4 2 3. C D8 D4 D2 Of Cn- O ICn-l. An 35 PATENTEDOCT24 1972 3.7OO,872 SHEET 11 OF 14 " st" BIT A CCUMULATOR 20 ty F. G. 23 BT A CCUMULATOR 2 ACCUMULATOR 22 "8th" BT A CCUMULATOR 2 3 30 PATENTEDOCT24 1972 3,7OO,872 SHEET 12 OF 14 FIG. 24 F.G. 25 EIGHT OR Six, CD S3(2) 3C) S(2) S1(1) A9 (1) A3(2) 3() A(2) A() SciuroR D3 | f | | | | | SUB. 6 3 2 9 6 3 2 CARRY/BORROW 9 3. to C D9 D6 O3 D2 D1 PATENTEDOCT 24 1972 3,7OO.872 SHEET 13 OF 14 (521ADD Bn () {53 St. "BT" ACCUMULATOR S3 () A3 () 2nd. "BT" ACCUMULATOR ACCUMULATOR 32 PATENTEDOCT 24 1972 3, 7 OO,872 SEIEET 14 OF 14 BASEBt (2) 10 a K2 K2 83K2 (1) . ) K3 K3 B3(2) KS K3 -O I K6 3,700,872 1 2 RADIX CONVERSION CRCUITS Also, another object of the invention is to provide This is a continuation-in-part of copending applica radix conversion circuits that operate in a rapid and ef tion Ser. No. 517,764, filed Dec. 30, 1965, now aban ficient manner. doned. In order to accomplish these and other objects of the Data is usually stored in computers in binary (base invention, circuits are provided for converting a 2), binary coded decimal (base 10), or some variation number represented in a first radix to a second radix or of these number systems, such as biquinary. As is well to a third radix, in a selective manner, with hardware known, the radix of any number system represents the that is commonly shared and predicated upon predeter number of digit symbols that are used to express nu mined relationships of the radices. meric values. Besides the radices or bases 2 and 10, 10 In general, data is stored in a memory in a first radix other radices prove useful under certain circumstances. C, supplied to the converting circuits in a serial fashion A base 12 radix is useful to represent shillings, for ex on an ordinal by ordinal basis for the development of a ample. Pounds are represented in a radix 20, as another remainder or units digit, a subsequent subtraction of example. An original numerical value of pence stored the units digit from the original number, and a division in base 2 (binary) thus may be converted to pence, 15 of the result using subtraction techniques. Facilities are shillings, and pounds by successive conversion provided for temporarily storing the developed processes involving a first conversion from binary base remainder in order to supply the same for print out or 2 to base 12 followed by a conversion of the base 12 for further conversion manipulation. The remainder is data to base 20. Other radices that have been used in 20 stored in the new radix, but with the principles of the data processing environments, though to a limited ex present invention, it is also processed in a simple tent, include the ternary (base 3), octonary (base 8) manner in the old radix. The accumulator, therefore, is and hexadecimal (base 16). adapted for arithmetic processing of both the old and Conversion of data represented in a first radix to a new radices, as required during the conversion process.
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