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Memristive Computing TURUN YLIOPISTON JULKAISUJA ANNALES UNIVERSITATIS TURKUENSIS SARJA - SER. A I OSA - TOM. 446 ASTRONOMICA - CHEMICA - PHYSICA - MATHEMATICA Memristive Computing by Eero Lehtonen TURUN YLIOPISTO UNIVERSITY OF TURKU Turku 2012 From the Business and Innovation Development (BID) unit, and the Department of Information Technology University of Turku, Finland Supervisors Adjunct Professor Mika Laiho Business and Innovation Development (BID) University of Turku FIN-20014 University of Turku Finland Dr. Tech. Jussi Poikonen Department of Communications and Networking Aalto University FIN-00076 Aalto University Finland Dr. Tech. Jarkko Paavola Business and Innovation Development (BID) University of Turku FIN-20014 University of Turku Finland Reviewers Assistant Professor Dmitri Strukov Electrical and Computer Engineering Department University of California, Santa Barbara Harold Frank Hall, Rm 5153 Santa Barbara, CA 93106-9560, USA Dr. Tech. Lauri Koskinen Department of Micro- and Nanosciences Aalto University Rm ECDL I307B PL 13000, 00076 Aalto, Finland Opponent Dr. Ricardo Carmona Gal´an Instituto de Microelectr´onica de Sevilla CSIC-Universidad de Sevilla Avda. Am´erico Vespucio s/n 41092 Sevilla, Spain ISBN 978-951-29-5148-2 (PRINT) ISBN 978-951-29-5147-5 (PDF) ISSN 0082-7002 Painosalama Oy - Turku, Finland 2012 Abstract Memristive computing refers to the utilization of the memristor, the fourth fundamental passive circuit element, in computational tasks. The existence of the memristor was theoretically predicted in 1971 by Leon O. Chua, but experimentally validated only in 2008 by HP Labs. A memristor is essentially a nonvolatile nanoscale programmable resistor — indeed, memory resistor — whose resistance, or memristance to be precise, is changed by applying a voltage across, or current through, the device. Memristive computing is a new area of research, and many of its fun- damental questions still remain open. For example, it is yet unclear which applications would benefit the most from the inherent nonlinear dynamics of memristors. In any case, these dynamics should be exploited to allow memristors to perform computation in a natural way instead of attempt- ing to emulate existing technologies such as CMOS logic. Examples of such methods of computation presented in this thesis are memristive stateful logic operations, memristive multiplication based on the translinear principle, and the exploitation of nonlinear dynamics to construct chaotic memristive cir- cuits. This thesis considers memristive computing at various levels of abstrac- tion. The first part of the thesis analyses the physical properties and the current-voltage behaviour of a single device. The middle part presents mem- ristor programming methods, and describes microcircuits for logic and ana- log operations. The final chapters discuss memristive computing in large- scale applications. In particular, cellular neural networks, and associative memory architectures are proposed as applications that significantly benefit from memristive implementation. The work presents several new results on memristor modeling and programming, memristive logic, analog arithmetic operations on memristors, and applications of memristors. The main conclusion of this thesis is that memristive computing will be advantageous in large-scale, highly parallel mixed-mode processing ar- chitectures. This can be justified by the following two arguments. First, since processing can be performed directly within memristive memory ar- chitectures, the required circuitry, processing time, and possibly also power consumption can be reduced compared to a conventional CMOS implemen- tation. Second, intrachip communication can be naturally implemented by a memristive crossbar structure. i Acknowledgements The research leading to this thesis was funded by University of Turku and the Graduate school in Electronics, Telecommunications and Automation (GETA). Further financial support was provided by the Nokia foundation, the Finnish foundation for technology promotion (Tekniikan Edist¨amiss¨a¨ati¨o, TES), and the Fulbright foundation. Several people have had a major impact on the completion of this work. First of all I want to thank doctor Mika Laiho for supervising this work. His guidance and active participation in the research leading to this thesis have been invaluable. I wish to thank doctor Jussi Poikonen also for supervision, co-authoring of several papers, and of all the help I received when refining the draft of this thesis. I am grateful to doctor Jarkko Paavola for super- vising my research work, and especially for the guidance he gave me in the beginning of my graduate studies. I wish to thank professor Ari Paasio, the director of BID Technology, for providing the excellent working conditions for my research work. My grat- itude goes also to my friends and colleagues Tero Hurnanen, Jari Tissari, and doctor Tero Jokela for the great atmosphere we have in our work place. I wish to express my gratitude for many people who have had a positive impact to my work at University of Turku, especially Mikko Jalonen, Peter Virta, professor Valery Ipatov, professor Juhani Karhum¨aki, doctor Alexey Dudkov, doctor Ilpo Lahti, and professor Jouni Isoaho. I wish to thank pro- fessor Wei Lu for co-authoring two joint publications, and professor Jennifer Hasler for many useful advice I have received during our collaboration. Also, I wish to thank the pre-examiners of this thesis, professor Dmitri Strukov and doctor Lauri Koskinen, for their insightful comments and prompt re- views. I had a privilege to visit the Redwood Center for Theoretical Neu- roscience at University of California, Berkeley, during the academic year 2011/2012. I wish to thank professor Bruno Olshausen for the invitation and the excellent working conditions, and doctor Pentti Kanerva for his guidance and friendship, and for introducing me to the fascinating field of cognitive computing. Finally I want to thank my family, my parents Jouko and Pirkko, and my sister Anna for the example, love, and guidance they have given to me throughout all my life. I thank my beloved Iina for all her love and support, and Kaapo, just for being who he is. ii Contents List of Symbols vii 1 Introduction 1 1.1 Motivation ............................ 1 1.2 Organizationofthethesis . 3 2 Memristor Fundamentals 7 2.1 Fundamentalnotions. .. .. .. .. .. .. 7 2.1.1 Circuitvariables ..................... 7 2.1.2 Functional relations . 8 2.2 Memristor............................. 8 2.2.1 Chua’s 1971 memristor . 8 2.2.2 Memristivesystem . .. .. .. .. .. 9 2.2.3 Memristor......................... 10 3 Thin-Film Memristor 15 3.1 Foundations of thin-film memristors . 15 3.1.1 Static electron transport . 16 3.1.2 Ionicdrift......................... 17 3.2 TiO2 basedmemristor ...................... 18 3.3 Other memristor implementations . 19 3.3.1 Analogmemristor . 19 3.3.2 M/a-Si/p-Si -memristor . 21 3.3.3 Rectifyingmemristor. 21 3.4 Generic model of an analog thin-film memristor . 22 3.4.1 AgenericSPICEmodel . 26 4 Memristor Programming 29 4.1 Switching behavior of a memristor . 29 4.1.1 Switching time and energy . 30 4.1.2 Threshold voltage . 32 4.2 Programmingmethods. 34 4.2.1 Relativemethods. 35 iii 4.2.2 Absolutemethods . 36 5 Analog Arithmetic Operations 43 5.1 Copyingthestateofamemristor . 43 5.1.1 Self-terminating copying of the current of a memristor 44 5.1.2 Cyclical copying of the current of a memristor . 45 5.2 Addition of currents of memristors . 46 5.2.1 Representing signed numbers . 47 5.3 Multiplication of states of memristors . 49 5.4 Memristive arithmetic unit . 50 5.5 Remarks on implementation . 51 6 Memristive Implication Logic 53 6.1 Memristive stateful logic . 54 6.1.1 Material implication . 55 6.1.2 Other stateful logic operations . 57 6.1.3 Computational sequence . 58 6.2 Synthesis with 2–depth NAND form . 59 6.2.1 Complementary NAND–method . 61 6.3 Minimizing the number of auxiliary memristors . 62 6.3.1 Synthesis with a single auxiliary memristor . 62 6.4 Multi-input implication logic . 64 6.4.1 Reducingthedisjunctiveform. 67 6.4.2 NAND–ORmethod ................... 69 6.5 Summaryofthesynthesismethods . 70 6.5.1 Worst-case algorithmic complexities . 70 6.6 Limitations and improvements . 71 6.7 Converse nonimplication . 73 7 Memristive Crossbars 75 7.1 Memristivecrossbar . .. .. .. .. .. .. 75 7.2 Interfacing memristive crossbars with CMOS circuitry . 76 7.2.1 Demultiplexers . 77 7.2.2 CMOL-type architectures . 78 7.2.3 Addressing in a CMOL-type architecture . 81 7.2.4 Segmented nanowires . 82 7.2.5 Vertical stacking of memristive crossbars . 84 7.3 Accessing and programming memristors within a crossbar . 84 7.3.1 Half-select problem and sneak paths . 86 7.3.2 Writing to and reading from a memristive crossbar . 87 7.3.3 Nanowireresistance . 88 iv 8 Memristor Applications 91 8.1 Digitalmemory.......................... 91 8.2 Reconfigurable logic circuits . 92 8.3 Parallel stateful logic . 92 8.3.1 Column-wise operations . 93 8.3.2 Row-wiseoperations . 94 8.3.3 Example: Parallelized synthesis of a Boolean function 95 8.4 Chaoticcircuits.......................... 96 8.4.1 Memristive Chua’s oscillator . 97 8.4.2 Memristive logistic map . 98 8.5 Neuromorphichardware . 101 8.6 Cellular Neural Networks . 103 8.6.1 Standard memristive CNN . 105 8.6.2 Memristive binary CNN . 110 8.6.3 CNN Universal Machine: computing with waves . 112 9 Memristive Associative Memories 119 9.1 Definitions and architectures . 120 9.1.1 Associative memory . 120 9.1.2 Data representation . 121 9.1.3 Unary and distributed architectures . 121 9.1.4 Capacities of associative memories . 122 9.1.5 Literature review of memristive associative memories . 123 9.2 Memristive autoassociative CAM . 124 9.2.1 Autoassociative CAM . 124 9.2.2 Implementation of a memristive ACAM . 125 9.2.3 Simulation of the ACAM cell . 129 9.3 Sparse distributed memory architectures . 129 9.3.1 Memristive Willshaw memory . 131 9.3.2 Structure and operation of a Sparse Distributed Memory132 9.3.3 Implementation of a memristive SDM . 134 9.3.4 Simulations and error analysis .
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