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Integration and Analysis of a 24.3Mhz FM Transmitter/Receiver System

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Integration and Analysis of a 24.3Mhz FM Transmitter/Receiver System Integration and Analysis of a 24.3MHz FM Transmitter/Receiver System Alex Tung Lab Partner: Michael Wiemer EE133: Prof. Bob Dutton Final Project Write-up TABLE OF CONTENTS ABSTRACT 3 INTRODUCTION 3 CIRCUIT DESIGN THEORY 3 DISCUSSION/RESULTS 5 CONCLUSION 9 APPENDIX A-1: POWER AMPLIFIER 11 APPENDIX A-2: LOW-NOISE AMPLIFIER 13 APPENDIX A-3: 4.5V REFERENCE 15 APPENDIX A-4: AUDIO INPUT 16 APPENDIX B: FORMAL LAB WRITE-UP REFERENCES 17 2 ABSTRACT tery power supplies. The transmitter consumes 360mW of DC power and transmits a 2.75dBm We designed and built an FM transmitter / re- signal. ceiver system to operate at 24.3MHz and 9V bat- at an output power of 2.7dBm. The receiver has a 1. Audio Input and Amplification clear minimum detectable signal of –90dBm and a The audio input and amplification circuitry con- maximum receivable distance of 5/8 miles when sists of a microphone and non-inverting amplifier, used in conjunction with a 20dBm transmitter. which produces a nominal 100 V/V voltage gain at its output. The input level of the microphone can be adjusted using a potentiometer so as to mini- INTRODUCTION mize distortion of loud signals. The output DC level of the circuit is also adjustable, so that the Optimal performance of an FM transmitter / re- VCO maybe set to the correct free-running fre- ceiver system depends on a number of factors, in- quency (see Appendix A-4). cluding solid design and a precise implementation of each component block of the system. Designing 2. Voltage-Controlled Oscillator and tuning the transmitter and receiver to function The voltage-controlled oscillator performs the fre- well with one another also presents a key chal- quency modulation of an intermediate frequency lenge. In addition, implementation of filters and with the input audio signal by converting the volt- low-noise amplifiers helps to reduce the degrada- age input to a frequency output. The output DC tion of system performance due to outside noise level from the audio amplifier sets the free- sources while also improving maximum receiv- running frequency of the VCO, and an applied in- able distance. This paper will discuss the design put signal produces a frequency-varied output that and implementation of a 24.3 MHz transmit / re- corresponds to the input voltage fluctuations. We ceive system in terms of expected performance, used the LM566 VCO to implement this oscillator measured performance, and improvements made. in our transmitter. With a DC input level of 7.5V, the free-running frequency of the oscillator can be adjusted to the needed 300kHz with a variable ca- CIRCUIT DESIGN THEORY pacitor in its timing regulation circuitry. For fur- ther discussion of the VCO, see Appendix B-2. We designed the transmitter and receiver to oper- ate at a frequency of 24.3 MHz with an intermedi- Figure 1: Transmitter Circuit Blocks ate frequency (IF) of 300 kHz. Each of the two system components consists of a number of circuit blocks, which perform various functions within the system. We discuss each of these blocks sub- sequently. I. The Transmitter The transmitter uses an input audio signal to modulate an intermediate frequency, mixes the 3. Mixer signal to a higher transmit frequency, and outputs The SA602 Analog Multiplier serves as the mixer the modulated signal from an antenna. The fol- for this system. The mixer takes as input the lowing blocks combine to achieve these functions: 300kHz IF signal and upconverts it by multiplying an audio input and amplifier, a voltage-controlled it with a 24MHz carrier signal from a local oscil- oscillator, a mixer, a local oscillator, and a power lator. This multiplication produces an output sig- amplifier (See Figure 1). nal at the carrier frequency of 24MHz and two sideband signals at 24.3MHz and 23.7MHz. In 3 theory, one would like to suppress the excess In order to reduce the amount of distortion caused 24MHz carrier and 23.7MHz negative sideband by harmonic signals, we designed the LNA with a signals, as they do not transmit the desired infor- series LC input filter centered at 24.3MHz with a mation. Performing this single-sideband transmis- 10MHz bandwidth. sion requires more complicated techniques than are within the scope of this project. 2. Low-Noise Amplifier In order to maximize receivable distance, the re- 4. Local Oscillator ceiver end of the system includes an input amplifi- The SA602 contains the added functionality of an cation stage in the form of a single-transistor low- on-chip local oscillator, the frequency of which noise amplifier. This stage amplifies the power of can be set using a crystal and capacitive divider. the incoming signal while minimizing distortion at We used this oscillator output as the carrier signal its output. The LNA consists of a bipolar transistor for our mixer, setting the oscillation frequency with resistive feedback and an inductive load. The with a 24MHz crystal. The ease of this imple- output of the amplifier consists of an LC match mentation makes construction of a separate, dis- which transforms the actual load impedance crete oscillator (e.g. Colpitts or Weinbridge) un- (1.5kΩ) of the mixer to the load desired for the necessary. specified amount of power gain (See Appendix A-2). The input impedance should ideally match 5. Power Amplifier the impedance of the input source through some Once the input signal is upconverted to the desired LC transformation network (i.e. it should be transmission frequency, it must be amplified to matched with the impedance of the antenna, if that achieve maximum transmittable distance. We de- impedance is known.) signed the power amplifier to deliver 100mW of RF power to the load, which is the antenna. We used a two-transistor cascode configuration to Figure 2: Receiver System Blocks construct a class A amplifier, placing an LC match on the output to allow resonant transformation to a 50ohm load impedance (See Appendix A-1). The input to the amplifier comes from the SA602 mixer through a coupling capacitor. Although the class A design of the amplifier causes it to con- sume a great deal of DC power, the cascode im- plementation allows appreciable RF power gain while minimizing the effects of the Miller capaci- 3. Mixer tance of the input transistor on the amplifier fre- We implemented the mixer on the receiver board quency response. with the same SA602 analog multiplier chip as we used on the transmitter board. This mixer multi- II. The Receiver plies the 24.3MHz input signal from the LNA with The receiver end of the system captures the trans- a 24MHz local oscillator signal and outputs the mitted signal through an antenna and amplifies original modulated 300kHz IF signal. that signal so that it may be downconverted to IF, filtered, and demodulated to the original signal. 4. Crystal Oscillator The following components together perform this We used a 24MHz packaged crystal oscillator to functionality: an input filter, low-noise amplifier, provide the local oscillator signal on the receiver mixer, IF amplifier and filter, phase-locked loop, side of the circuit. This provides a simple and reli- and an audio speaker. able input to the mixer at the correct frequency and large amplitude. 1. Input Filter 5. Intermediate Frequency Amplifier and Filter 4 In order to minimize the amount of noise and dis- I. Transmitter tortion in our system output as well as maximize The following is a discussion of the performance the receivable distance of our circuit, we designed of each of the blocks within the transmitter circuit. an intermediate frequency amplifier and filter stage. The IF amplifier consists of a non-inverting 1. Audio Input and Amplification amplifier with nominal gain of 100V/V, a four- The audio amplifier circuit provides sufficient sig- pole passive Butterworth bandpass filter, and an- nal gain while allowing for adjustment to large other non-inverting amplifier with adjustable gain input signals. We were able to adjust the potenti- < 100. We designed the filter to have a –3dB ometer at the input to the op-amp to accommodate bandwidth of 100kHz and matched the source im- a comfortable speaking distance from the micro- pedance and output load to an arbitrary 50ohm phone. The circuit consumes 36mW of DC power impedance (this value helps ease testing with and has a gain of 20.7 dB at 1kHz. We found the 50ohm test equipment inputs). The input to the frequency response to be less than ideal, however, first amplifier includes a 1.5kohm match to the as the output peaks at 4.63kHz, and from meas- mixer output. For further discussion of the IF am- urements made on the spectrum analyzer the –3dB plifier, see Appendix B-3. bandwidth is 2.75kHz to 8.5kHz. Since the audio range is defined from 20Hz to 20kHz and most 6. Phase-Locked Loop vocal signals fall under 1kHz, this is not the opti- In order to demodulate the IF signal down to the mal bandwidth for the desired input signals. Be- original audio signal, we include a phase-locked cause the frequency response of this circuit is loop at the output of the IF amplifier. Imple- largely determined by the response of the op-amp, mented with the LM565, the PLL “locks” onto the which conceivably has a more than adequate slew frequency variations in the FM signal by provid- rate, it is uncertain as to why the circuit would ing feedback to an internal VCO and outputs a yield such an undesirable response. It is possible voltage corresponding to those frequencies (i.e. that measurements were made without properly the original audio signal).
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