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Motorola 68000 Family Simulators in Education

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Motorola 68000 Family Simulators in Education Session 3D2 QtorQ~aTM6$QQ~ Family Simulators in Susan A. Mengel and James M. Conrad INTRODUCTION cuit design. Currently, the Computer Systems Engineering De- Implementations of microprocessors are becoming partment offers a course where a digital circuit is more and more complex and difficult to understand for designed with the Motorola 68000 microprocessor the student beginning to learn how to design computer (CSEG/ELEG 4983 Computer Hardware Design). In hardware and to program in assembly language. Cer- order to enhance the laboratory exercises for the stu- tainly, simple microprocessors exist and may be used dents and to allow them to experiment with more than to ease student learning toward more complex micro- one microprocessor, a simulator is under development processor designs. Still, microprocessors are tiny black which will allow the student to choose among the mi- boxes that cannot be fully explored without the aid of croprocessors in the 68000 family (giving the student a computer that could magnify its inner workings. the opportunity to increase the level of complexity in In like manner, the design of computer hardware is be- the microprocessor) and to place them into digital cir- coming more and more complex. For example, digital cuit designs. The student can get an idea of what circuit design involves a high level of detail and work to he/she wants before using the computer aided design make sure all of the pins on a chip are connected cor- package to complete the design of the circuit. rectly and the connections do not interfere with each other (crosstalk). DEBUGGERS To help the student understand microprocessors, the As mentioned before, debuggers will not allow a stu- student can write and run assembly language prc- dent to see how a microprocessor interacts with other grams, and view the microprocessor’s registers along chips on a digital circuit when a rogram is being ex- with external memory through the use of a debugger. ecuted. The features a debuggerp2, 91, however, may The student can get a clear idea of how the micro- have for assembly language debugging include: set- processor goes about executing a program, but cannot ting a process’ starting point; setting breakpoints; ex- view the inner detail of executing each instruction. amining variables; starting, restarting, and stopping a process; stepping through code; printing memory and To help the student understand digital circuit design, registers; and displaying the source code. The debug- computer-aided design packages have been developed ger may even have a graphical user interface where the at varying levels of sophistication. The student, how- source code that is being executed is displayed, the reg- ever, must deal with a large amount of detail before isters are displayed, and the stack and data portions of he/she may have the cognitive grasp of how to do the memory are shown. On the other hand, a debugger, in digital circuit design. general, will not allow the source code to be changed nor all portions of memory to be modified even if mod- The assernbler’s debugger cannot help the student with ification of the CPU registers might be allowed. digital circuit design and the circuit board design pack- age cannot help the student learn assembly. What is DIGITAL CIRCUIT DESIGN PACKAGES needed is a package to allow the student to design a dig- ital circuit with less detail, such as allowing the student Several digital circuit design packages are available for l>oconnect chips on a board without worrying about pin Computer Aided Design/Computer Aided Engineer- outs and chip location problems. To enable the student ing. These packages provide the capability to spec- to understand the chips or microprocessors he/she has ify, design, and simulate a digital design, even down connected, the package can show the student how pro- to the electrical characteristics of signal wires placed gram instructions are executed and what happens on near each other on a printed circuit board. Very often the circuit upon execution. The simulator, further, can these packages provide considerably more function and show levels of detail of the microprocessor’s inner work- require more detail than is desired in an undergraduate ings to provide the student with a higher or lower level course. For example, a course in computer organiza- view of how the microprocessor works. tion and design may be concerned with the design and simulation of a circuit, but not concerned about place- In order to facilitate the student’s understanding about ment and routing of components on a printed circuit microprocessors and digital circuit design, a graphical board. In fact, often the instructor is more concerned user interface should be employed to help the student with the “logical” connections of the design than the visualize how microprocessors work and how they may physical point-to-point connections. be connected together to form a simple or even a so- phisticated computer. A visual interface can lend con- As an example, suppose one wants to design a com- creteness to lessons on microprocessors and digital cir- puter architecture with a 68000 CPU, 32 Kbytes I € 1994 Frontiers in Education Conference E € 106 language program. The buttons on the interface are as c follows: 1 I 0 File: The user may load an assembly language pro- gram in S-record format, save the current state of the simulation, or exit the simulator. 0 Run: The user may run the assembly language program. 0 Stop: The user may stop the simulator to view the contents of memory or the registers. 0 Step: The user may step through the assembly language program one instruction at a time and examine the contents of the registers or memory. 0 Exception: The user may set exception flags or $7I schedule interrupts. To schedule interrupts, the user fills in a pop-up window of 16 interrupts with priority levels and program address locations. For Fig. 1. Detail of a Motorola 68000 and ROM. example, when an interrupt with a level above zero of memory, and a single serial communication chip is specified, that interrupt will be scheduled to oc- (like the ACIA 6850 chip). Using a package like cur when the program counter reaches the associ- PowerviewTM[7] from ViewLogicTkf, one would need ated address. to design memory and 1/0 device 'decode logic, then Memory: The user may specify the size of memory connect the correct control, address, and data pins to in Kbytes or fill a block of memory with a specified each other as shown in Figure 1. Often all that is de- sired is to identify the memory map of the devices and value. to see how they interact with each other based on the 0 Breakpoint: The user may set up to 16 break- device characteristics. points through a pop-up window. MOTOROLA SIMULATOR D:ESIGN 0 Clear: The user may clear the contents of all reg- isters. A search of the Internet was made in order to find a suitable Motorola simulator. A couple of bug-ridden 68000 simulators were found which were not useful for The main window of the interface has five control areas: expansion to the more complex 68000 family chips. Fortunately, due to one of the autlhor's former affili- 1. The registers of the Motorola 68040 microproces- ation with North Carolina State University, a 68000 sor: the A0 through A7 address, the DO through simulator, named 68KSIM[6], with an X Windows user D7 data, the User Stack Pointer (USP), and Sta- interface[5] was obtained. The simulator ran on a tus (SR) registers. DECTM workstation, but was easily modified to run on a SUN workstation. It also was used by students in 2. Sixteen registers that are used in supervisor mode. a large introductory course so it had been tested well. 3. The Program Counter and Cycle Counter regis- Upon examination of 68KSIM, it became apparent that ters. errors existed in the code and that the user interface 4. Memory - A 22x16 display of bytes with 22 ad- could be improved. The code, however, once corrected dress fields and the following buttons: page up could be used as a basis for expansion. or down one memory page (352 bytes), move up Expansion of the simulation consisted of several steps: or down one memory line (16 bytes), immediately adding addressing modes and registers, implement- display the first memory window (starting at ad- ing simulation memory and breakpoints, adding addi- dress zero), immediately display the last memory tional instructions and their routing, adding exception window, and immediately display a user specified processing, and performing testing ,and verification of starting address. code. A more complete description of how the 68040 5. The instruction cache lines (currently under devel- portion of the simulator has been implemented may be opment). found in [3]. Interface Design The main window, popup windows, buttons, menus, and text fields in the interface were designed us- The user interface for the 68040 is designed to allow ing OpenWindowsTM Developer's Guide[8] and imple- the student control over the execution of an assembly mented with XViewTM[4]. I E 1994 Frontiers in Education Conference E E 107 1000 M0VE.W #$AA,$1120 ;VARIOUS MOVE OPERATIONS 1006 M0VE.W #$05,DO 1 OOA M0VE.W $04 D1 lOOE M0VE.L &l03'4,D2 1014 LOOP M0VE.W D0,$1100 :LOOPING EXAMPLE 1018 SUB1 #1 DO lOlA BNE LObP l0lC BKPT #O lOlE MOVE16 (AO),( 10C4) .L 1024 I,SR 1026 102A 102c 102E ;SAMPLE EXCEPTION HANDLER 1032 1034 ;EXCEPTION VECTOR TABLE BEGINS io44 0000102E ;VECTOR 4: ILLEGAL INSTRUCTION Fin. 2. Example Assembly Code Fragment. a I, U U H 'I n 1aY c * 43 U x FE 41 1 m m m m M 17 TI II L! n n n s 33 II m m IO II m CO a x w n n w w 91 n 00 m w w m m a x w m m m w 0) 0) m m m m m m U x w 81 0, m w n m w m m m LO a c x n m m w n na m m w m w m CI a x n m m n wnmmmmmanaxwmmm a 01 a> W W (D m <b (0 a X W W 03 w w 9) n m w w w m m a x a m 0, *I w oa 0) m w m m CO CO U x w m m m n m m m w m m m n U x w m n m a 92 n I m w w n a x w m OJ o) w 0) 01 m I m m 0 m a x w m 0 m w &Y m m c+ - w a U a x w m OY m w 01 a m m m m m m U I w e, n m w 01 01 m M w m m a U x IJ m m I wmmw~m~~oaxwmmm n 01 m m m m m m m a x w m m m a 09 a m m m m n LL (I x n 63 m m Fig.
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