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UM2411 User manual Discovery kit with STM32H747XI MCU

Introduction The STM32H747I-DISCO Discovery kit is a complete demonstration and development platform for the STMicroelectronics Arm® Cortex®-M7 and -M4 dual-core-based STM32H747XIH6 microcontroller with four I2C, six SPIs with two multiplexed full-duplex I2S interfaces, SDIO3.0, SDIO2.0, four USARTs, four UARTs, two FD-CANs, three 16-bit ADCs, two 12-bit DACs, four SAIs, USB HS OTG and USB FS OTG, Ethernet MAC, FMC interface, MIPI DSISM host controller, Quad-SPI interface, and JTAG and ETM debugging support. The STM32H747I-DISCO Discovery kit, shown in Figure 1 and Figure 2, is used as a reference design for user application development before porting to the final product. STM32H747I-DISC1, presented in Figure 3, is the subset of STM32H747I-DISCO without the LCD display module. The full range of hardware features available on the board helps users improve application development by an evaluation of all the peripherals (USB OTG2 HS, Ethernet, microSD™ card, SAI Audio DAC stereo with audio jack input and output, MEMS digital microphone, SDRAM, Quad-SPI Flash, DCMI connector, MIPI DSISM interface, and others). ARDUINO® Uno V3 and Pmod™/STMod+ connectors provide easy connection to extension shields or daughterboards for specific applications. An STLINK-V3E is integrated into the board, as the embedded in-circuit debugger and programmer for the STM32 MCU and the USB Virtual COM port bridge.

Figure 1. STM32H747I-DISCO top view Figure 2. STM32H747I-DISCO bottom view

Figure 3. STM32H747I-DISC1 top view

Pictures are not contractual. PCB colors may differ.

January 2020 UM2411 Rev 4 1/61

www.st.com 1 Contents UM2411

Contents

1 Features ...... 6

2 Ordering information ...... 7 2.1 Product marking ...... 7 2.2 Codification ...... 8

3 Development environment ...... 8 3.1 Development toolchains ...... 8 3.2 System requirements ...... 8 3.3 Demonstration software ...... 8

4 Delivery recommendations ...... 9

5 Hardware layout and configuration ...... 10 5.1 STLINK-V3E ...... 14 5.1.1 Drivers and firmware upgrade ...... 14 5.2 Power supply ...... 14 5.2.1 Supplying the board through STLINK-V3E USB port ...... 15 5.2.2 Using STLINK-V3E along with powering through external power . . . . . 15 5.2.3 SMPS/LDO power supply ...... 16 5.3 Clock references ...... 18 5.4 Reset Source ...... 18 5.5 Audio ...... 18 5.5.1 Digital microphone ...... 19 5.6 USB OTG HS port ...... 19 5.6.1 STM32H747I-DISCO as USB device ...... 19 5.6.2 STM32H747I-DISCO as USB host ...... 20 5.7 Ethernet ...... 20 5.8 SDRAM ...... 21 5.9 Quad-SPI Flash memory ...... 21 5.10 Virtual COM port ...... 21 5.11 User LEDs ...... 21 5.12 Physical input devices ...... 21

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6 Connectors ...... 22 6.1 USB OTG HS Micro-AB connector CN1 ...... 22 6.2 STLINK-V3E USB Micro-B connector CN2 ...... 23 6.3 SPDIF input RCA connector CN3 ...... 23 6.4 STLINK-V3E MCU programming header CN4 ...... 23 6.5 ARDUINO® Uno V3 connectors CN5, CN6, CN8 and CN9 ...... 24 6.6 Ethernet RJ45 connector CN7 ...... 25 6.7 Audio blue jack (Line In) connector CN10 ...... 25 6.8 Audio green jack (Line Out) connector CN11 ...... 26 6.9 microSD card connector CN12 ...... 27 6.10 STDC14 connector CN13 ...... 28 6.11 External 5 V USB Micro-B connector CN14 ...... 29 6.12 DSI LCD connector CN15 (MIPI) ...... 29 6.13 TAG connector CN16 ...... 31 6.14 Audio connector CN17 ...... 31 6.15 Camera module connector P1 ...... 32 6.16 STMod+ connector P2 ...... 33 6.17 Pmod connector P3 ...... 34

7 Schematic diagrams ...... 35

Appendix A STM32H747I-DISCO I/O assignment ...... 51

Appendix B STMod+ GPIO sharing and multiplexing ...... 59

Revision history ...... 60

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3 List of tables UM2411

List of tables

Table 1. Ordering information ...... 7 Table 2. Codification explanation ...... 8 Table 3. Power-supply related jumper and solder bridge settings ...... 17 Table 4. Digital microphone-related jumper settings ...... 19 Table 5. Ethernet related solder bridge and resistor settings ...... 20 Table 6. USB OTG HS Micro-AB connector CN1...... 22 Table 7. USB Micro-B connector CN2 ...... 23 Table 8. SPDIF input RCA connector CN3...... 23 Table 9. STLINK-V3E MCU programming header CN4 ...... 23 Table 10. ARDUINO® Uno V3 compatible connectors ...... 24 Table 11. USB Micro-B connector CN2 ...... 25 Table 12. Audio jack connector CN11 (on board)...... 26 Table 13. microSD connector CN12 ...... 27 Table 14. STDC14 debugging connector CN13 ...... 28 Table 15. USB Micro-B connector CN14 ...... 29 Table 16. DSI LCD module connector CN15 ...... 30 Table 17. TAG connector CN16 ...... 31 Table 18. Audio connector CN17 ...... 31 Table 19. Camera module connector P1 ...... 32 Table 20. STMod+ connector P2 ...... 33 Table 21. Pmod connector P3 ...... 34 Table 22. STM32H747I-DISCO I/O assignment...... 51 Table 23. STMod+ GPIO sharing and multiplexing ...... 59 Table 24. Document revision history ...... 60

4/61 UM2411 Rev 4 UM2411 List of figures

List of figures

Figure 1. STM32H747I-DISCO top view ...... 1 Figure 2. STM32H747I-DISCO bottom view ...... 1 Figure 3. STM32H747I-DISC1 top view...... 1 Figure 4. STM32H747I-DISCO hardware block diagram...... 10 Figure 5. STM32H747I-DISCO board layout (top view)...... 11 Figure 6. STM32H747I-DISCO board layout (bottom view)...... 12 Figure 7. STM32H747I-DISCO board mechanical dimensions (top view)...... 13 Figure 8. USB OTG HS Micro-AB connector CN1...... 22 Figure 9. USB Micro-B connector CN2 ...... 23 Figure 10. Ethernet RJ45 connector CN7 (front view) ...... 25 Figure 11. Stereo headset with microphone jack CN11...... 26 Figure 12. microSD connector CN12 ...... 27 Figure 13. STDC14 debugging connector CN13 (top view)...... 28 Figure 14. USB Micro-B connector CN14 ...... 29 Figure 15. DSI LCD display connector CN15 ...... 29 Figure 16. TAG connector CN16 ...... 31 Figure 17. Camera module connector P1 (front view) ...... 32 Figure 18. STMod+ connector P2 ...... 33 Figure 19. Pmod connector P3 ...... 34 Figure 20. Overall schematics for the board ...... 36 Figure 21. STM32H747I-DISCO MCU...... 37 Figure 22. Power supply ...... 38 Figure 23. SDRAM memory device ...... 39 Figure 24. Audio codec device...... 40 Figure 25. DSI LCD and camera connector...... 41 Figure 26. Ethernet ...... 42 Figure 27. Quad-SPI Flash memory devices ...... 43 Figure 28. Physical control peripherals and microSD™ card...... 44 Figure 29. Pmod, STMod+ and audio connectors ...... 45 Figure 30. TAG debug connector...... 46 Figure 31. ARDUINO® Uno connector...... 47 Figure 32. STLINK-V3E module ...... 48 Figure 33. STLINK-V3E power ...... 49 Figure 34. USB_OTG_HS port ...... 50

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5 Features UM2411

1 Features

• STM32H747XIH6 Arm®(a) Cortex® core-based microcontroller with 2 Mbytes of Flash memory and 1 Mbyte of RAM in TFBGA240 + 25 package • 4” capacitive touch LCD display module with MIPI DSISM interface (STM32H747I-DISCO order code only) • Ethernet compliant with IEEE802.3-2002 • USB OTG HS • SAI audio codec • ST-MEMS digital microphone • 2 x 512-Mbit Quad-SPI NOR Flash memory • 256-Mbit SDRAM • 4 color user LEDs • 1 user and reset push-button • 4-direction joystick with selection button • Fanout daughterboard • Board connectors: – Camera (8-bit) – USB with Micro-AB – Ethernet RJ45 – SPDIF RCA input and output – Stereo headset jack including analog microphone input – Audio jack for external speakers – microSD™ card – TAG-Connect 10-pin footprint –Arm® Cortex® 10-pin 1.27 mm-pitch debug connector over STDC14 footprint • Board expansion connectors: – ARDUINO® Uno V3 – Pmod™ supported by Type 2A and Type 4A –STMod+ – Audio daughterboard • Flexible power-supply options:

– ST-LINK USB VBUS, USB OTG HS connector, or external sources • On-board STLINK-V3E debugger/programmer with USB re-enumeration capability: mass storage, Virtual COM port and debug port • Comprehensive free software libraries and examples available with the STM32Cube MCU Package • Support of a wide choice of integrated development environments (IDEs), including IAR™, Keil® and GCC-based IDEs

a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

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2 Ordering information

To order the STM32H747I-DISCO or STM32H747I-DISC1 Discovery kit, refer to Table 1.

Table 1. Ordering information Order code Board reference Target STM32 Differentiating feature

– MB1248 STM32H747I-DISCO STM32H747XIH6U – With LCD module – MB1166(1) STM32H747I-DISC1 – MB1248 STM32H747XIH6U – No LCD module

1. LCD extension board.

2.1 Product marking Evaluation tools marked as “ES” or “E” are not yet qualified and are therefore not ready to be used as reference design or in production. Any consequences arising from such usage will not be at STMicroelectronics’ charge. In no event will STMicroelectronics be liable for any customer usage of these engineering sample tools as reference designs or in production. ‘E’ or ‘ES’ marking examples of location: • on the targeted STM32 that is soldered on the board (for illustration of STM32 marking, refer to the section Package information in the STM32 datasheet at www.st.com). • next to the evaluation tool ordering part number, that is stuck or silkscreen printed on the board The boards feature a specific STM32 device version, which allows the operation of any bundled commercial stack/library available. This STM32 device shows a "U" marking option at the end of the standard part number and is not available for sales. In order to use the same commercial stack in his application, a developer may need to purchase a part number specific to this stack/library. The price of those part numbers includes the stack/library royalties.

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60 Development environment UM2411

2.2 Codification The meaning of the codification is explained in Table 2.

Table 2. Codification explanation STM32H7XXY-DISCZ Description Example: STM32H747I-DISCO

STM32H7 MCU series in STM32 High Performance MCUs STM32H7 Series XX MCU line in the series STM32H747 line

Flash memory size: STM32H747XI MCU with Y –I: 2 Mbytes 2 Mbytes of Flash memory Discovery kit configuration: DISCZ – DISCO: with LCD module With LCD module – DISC1: no LCD module

The order code is mentioned on a sticker placed on the top side of the board.

3 Development environment

3.1 Development toolchains • Keil® MDK-ARM(a) • IAR™ EWARM(a) • GCC-based IDEs

3.2 System requirements • Windows® OS (7, 8 and 10), Linux® 64-bit or macOS®(b) • USB Type-A to Micro-B cable

3.3 Demonstration software The demonstration software, included in the STM32Cube MCU Package corresponding to the on-board MCU, is preloaded in the STM32 Flash memory for easy demonstration of the device peripherals in standalone mode. The latest versions of the demonstration source code and associated documentation can be downloaded from the STM32H747I-DISCO page in the www.st.com web site.

a. On Windows only b. macOS® is a trademark of Apple Inc., registered in the U.S. and other countries.

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4 Delivery recommendations

Before the first use, make sure that no damage occurred to the board during shipment and no socketed components are not firmly fixed in their sockets or loose in the plastic bag. In particular, pay attention to the following component: • DSISM display MB1166 daughterboard in the CN15 connector if requested For product information related to the STM32H747XIH6 microcontroller, visit the www.st.com website.

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5 Hardware layout and configuration

The STM32H747I-DISCO Discovery kit is designed around the STM32H747XIH6 target microcontroller in TFBGA 240+25-pin package. Figure 4 illustrates the connections of the STM32H747XIH6 with the peripheral components. Figure 5 and Figure 6 show the locations of the main components on the Discovery kit.

Figure 4. STM32H747I-DISCO hardware block diagram

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Figure 5. STM32H747I-DISCO board layout (top view)

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60 Hardware layout and configuration UM2411

Figure 6. STM32H747I-DISCO board layout (bottom view)

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Figure 7 provides the mechanical dimensions of the STM32H747I-DISCO Discovery board.

Figure 7. STM32H747I-DISCO board mechanical dimensions (top view)

88mm

77.84mm 5.08mm 37.7mm 16.81mm

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5.1 STLINK-V3E The STLINK-V3E facility for the debug and programming of the STM32H747XIH6 is integrated on the STM32H747I-DISCO Discovery kit. It supports the following features: • Self-powered through a USB connector (Micro-B) • USB 2.0 high-speed compatible interface • Direct firmware update support (DFU) • SWD and serial wire viewer (SWV) communication support • Drag-and-drop Flash programming • Two color LEDs: communication and power USB connector CN2 can be used to power the STM32H747I-DISCO regardless of the STLINK-V3E facility used for debugging or programming the STM32H747XIH6. This holds also when the STLINK-V3E stand-alone tool is connected to connector CN13 or CN16 and used for debugging or programming the STM32H747XIH6. Section 5.2: Power supply provides more detail about powering the STM32H747I-DISCO. Refer to www.st.com for details about STLINK-V3E.

5.1.1 Drivers and firmware upgrade The STLINK-V3E requires drivers to be installed on Windows®. It embeds firmware that needs regular update in order to benefit from new functionality or corrections. Refer to the Overview of ST-LINK derivatives technical note (TN1235) for details.

5.2 Power supply The STM32H747I-DISCO Discovery kit is designed to be powered from a 5 V DC power source. One of the following five 5 V DC power inputs can be used, upon appropriate board configuration: • Micro-B USB receptacle CN2 of STLINK-V3E with enumeration: Up to 500 mA can be supplied to the board (JP6 jumper setting on STlk on silkscreen). Offers the enumeration feature described in Section 5.2.1. • Micro-B USB receptacle CN2 of STLINK-V3E without enumeration: Up to 500 mA can be supplied to the board directly without enumeration (JP6 jumper setting on CHgr on silkscreen). • Micro-AB USB receptacle CN1 of the USB OTG HS interface: Marked USB OTG_HS on the board (JP6 jumper setting on HS on silkscreen). Up to 500 mA can be supplied to the board in this way. • 7-12V DC power from CN8 pin8: Named VIN on silkscreen, the extension connectors for ARDUINO® Uno shields (JP6 setting on external power source on silkscreen (E5V)). • Micro-B USB receptacle CN14 for external 5V: Up to 500 mA can be supplied to the board (JP6 jumper setting on U5V on silkscreen). The LD8 green LED turns on when the voltage on the power line marked as +5V is present. All supply lines required for the operation of the components on the STM32H747I-DISCO are derived from that +5V line.

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Table 3: Power-supply related jumper and solder bridge settings describes the settings of all jumpers related to powering the STM32H747I-DISCO and extension board. VDD_MCU is STM32H747XIH6 digital supply voltage line. It can be connected to a fixed 3.3 V supply.

5.2.1 Supplying the board through STLINK-V3E USB port To power the STM32H747I-DISCO in this way, the USB host (a PC) gets connected to the Micro-B USB receptacle of the STM32H747I-DISCO via a USB cable. The connection event starts the USB enumeration procedure. In its initial phase, the host USB port current supply capability is limited to 100 mA. It is enough because only the STLINK-V3E part of the STM32H747I-DISCO draws power at that time: the U10 STMPS2151 power switch is set to the OFF position, which isolates the rest of the STM32H747I-DISCO from the power source. In the next phase of the enumeration procedure, the host PC informs the STLINK-V3E facility of its capability to supply current up to 300 mA. If the answer is positive, the STLINK- V3E sets the U10 STMPS2151 switch to the ON position to supply power to the rest of the STM32H747I-DISCO board. If the PC USB port is not capable of supplying current up to 300 mA of, CN8 pin8 (VIN) or CN14 can be used to supply the board instead. Should a short-circuit occur on the board, the STMPS2151 power switch protects the USB port of the host PC against a current demand exceeding 500 mA, In such an event, the LD9 LED lights up. The STM32H747I-DISCO board can also be supplied from a USB power source not supporting enumeration, such as a USB charger. In this particular case, jumper JP6 must be fitted with a jumper hat as shown in Table 3: Power-supply related jumper and solder bridge settings. STLINK-V3E bypasses STMPS2151 power regardless of enumeration procedure result and passes the power unconditionally to the board. The LD8 green LED turns on whenever the whole board is powered.

5.2.2 Using STLINK-V3E along with powering through external power It can happen that the board requires more than 300 mA of supply current. It cannot be supplied from the host PC connected to the STLINK-V3E USB port for debugging or programming the STM32H747XIH6. In such a case, the board can be supplied through CN8 pin8 (marked VIN on the board) or CN14. To do this, it is important to power the board before connecting it with the host PC, which requires the following sequence to be respected: 1. Set jumper JP6 in the E5V or U5V position 2. Connect the external power source to CN8 pin8 or CN14 3. Check that the green LED LD8 is turned on 4. Connect the host PC to USB connector CN2 Caution: In case the board demands more than 300 mA and the host PC is connected via USB before the board is powered from CN8 pin8 or CN14, there is a risk that the following events occur (listed in reverse severity order): 1. The host PC is capable of supplying 300 mA (the enumeration succeeds) but it features no over-current protection on its USB port. It is damaged due to over-current. 2. The host PC is capable of supplying 300 mA (the enumeration succeeds) and it has a built-in over-current protection on its USB port, limiting or shutting down the power out

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of its USB port when the excessive current demand from STM32H747I-DISCO is detected. This causes an operating failure of STM32H747I-DISCO. 3. The host PC is not capable of supplying 300 mA (the enumeration fails). The STLINK- V3E does not supply the rest of the STM32H747I-DISCO from its USB port VBUS line.

5.2.3 SMPS/LDO power supply There are two possible solutions to provide power to MCU Vcore: SMPS or LDO. Power figures in Run mode are significantly improved when Vcore logic power is supplied by the internal DC/DC converter (SMPS). The default power supply for Vcore logic is SMPS. The user need to apply some changes to switch to the LDO power supply: • SMPS mode (default): – SB2, SB11, SB19, SB46, SB48 mounted – SB1, SB12, SB49 removed • LDO mode: – SB1, SB12, SB49 mounted – SB2, SB11, SB19, SB46, SB48 removed Caution: A deadlock occurs if the board SMPS/LDO firmware PWR configuration does not match the hardware configuration: after the reset, the ST-LINK cannot connect the target anymore. The firmware PWR configuration must be set as follows in function SystemClock_Config in file main.c: • If the hardware configuration is “Direct SMPS” (default configuration): HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY); • If the hardware configuration is “LDO”: HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); If a deadlock occurs because of a mismatch between hardware and firmware PWR settings (SMPS/LDO), the user can recover the board by applying the following procedure: 1. Power off the board.

2. Connect pin BOOT0 to VDD using a wire (or short R192). This changes the BOOT0 pin to 1 instead of 0, thus changing the device boot address to boot address 1 and making the bootloader start in System memory. This avoids starting firmware in the user Flash with a wrong SMPS/LDO configuration versus the hardware board configuration. 3. Power on the board and connect using STM32CubeProgrammer (STM32CubeProg). 4. Erase the user Flash.

5. Power off the board and remove the short between BOOT0 and VDD. 6. The board is recovered and can be used normally with matching firmware PWR.

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Table 3 details jumper and solder bridge settings used for the configuration of the power supply of STM32H747I-DISCO.

Table 3. Power-supply related jumper and solder bridge settings Jumper / Solder bridge Setting Configuration

Default setting. STM32H747I-DISCO is supplied through the CN2 Micro-B USB receptacle. Depend on host PC USB port's powering capability declared in 67ON 89 +6 (9 &+JU the enumeration.

STM32H747I-DISCO is supplied through the CN14 Micro-B USB receptacle.

67ON 89 +6 (9 &+JU

STM32H747I-DISCO is supplied JP6 through the CN1 Micro-AB USB Power source selector receptacle.

67ON 89 +6 (9 &+JU

STM32H747I-DISCO is supplied through the pin 8 of CN8 (marked VIN).

67ON 89 +6 (9 &+JU

STM32H747I-DISCO is supplied through the CN2 Micro-B USB receptacle. Setting for powering the board through CN2 using USB charger. 67ON 89 +6 (9 &+JU

Default setting. SB16 SB16 ON VBAT is connected to +3V3. VBAT connection SB16 OFF VBAT is not connected to +3V3. Default setting. V (VDDUSB terminal of SB10 ON DD_USB SB10 STM32H747XIH6) is connected to V connection DD_USB VDD_MCU.

SB10 OFF VDD_USB is not connected to VDD_MCU.

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Table 3. Power-supply related jumper and solder bridge settings (continued) Jumper / Solder bridge Setting Configuration

Default setting.   VDD_MCU (VDD terminals of STM32H747XIH6) is connected to fixed +3.3 V. JP3 VDD_MCU connection   VDD_MCU (VDD terminals of STM32H747XIH6) is not connected to fixed +3.3 V

5.3 Clock references Two clock references (X2 and X3) are available on the STM32H747I-DISCO for the STM32H747XIH6 target microcontroller. The two other clock sources (X1 and X4) are for the peripherals: • 24 MHz oscillator X1, for USB OTG HS PHY and camera module (daughter board) • 25 MHz oscillator X2, for main clock generator and Ethernet PHY • 32.768 kHz crystal X3, for embedded RTC • 25 MHz oscillator X4, for STLINK-V3E only The main clock can also be generated using an internal RC oscillator. The X2 reference clock must be disconnected by removing resistor R73 when the internal RC clock is used.

5.4 Reset Source The general reset of the STM32H747I-DISCO board is active low. The reset sources are: • Reset button B1 • STDC14 connector CN13 and TAG connector CN16 (reset from debug tools) • ARDUINO® Uno shield board through connector CN8 • Embedded STLINK-V3E

5.5 Audio A WM8994 codec is connected to the SAI interface of the STM32H747XIH6. It supports the TDM feature of the SAI port. The TDM feature enables the STM32H747XIH6 to simultaneously stream two independent stereo audio channels to two separate stereo analog audio outputs. The codec communicates with the STM32H747XIH6 via the I2C4 bus, which is shared with the DSISM LCD, camera module, ARDUINO® Uno connectors, and STMod+ connector.

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The audio connections are: • The analog line input is connected to the ADC of the WM8994ECS/R through blue audio jack CN10 • The analog line output is connected to the DAC of the WM8994ECS/R via green audio jack CN11 • Two external speakers can be connected to WM8994ECS/R via JP5 for the right speaker and JP2 for the left speaker • One MP34DT05-A digital microphone is present on the STM32H747I-DISCO board The I²C-bus addresses of the WM8994 codec are 34h and 35h.

5.5.1 Digital microphone The U21 on the STM32H747I-DISCO board is STMicroelectronics MP34DT05-A MEMS digital omnidirectional microphone providing PDM (pulse density modulation) output. The microphone is supplied with a programmable clock generated directly by the STM32H747XIH6 or the codec. As an option, the microphone can be connected to U12 (Wolfson WM8994 audio codec device). In that configuration, WM8994 also supplies the PDM clock to the microphone. Regardless of microphone routing (STM32H747XIH6 MCU or WM8994 codec), the power can be supplied either by VDD or the MICBIAS1 output of the WM8994 codec device. Table 4 shows the settings of all solder bridges associated to the digital microphone on the board.

Table 4. Digital microphone-related jumper settings Solder bridge Setting Configuration

SB45, SB21 open, The PDM clock for the digital microphone is provided by SB44, SB22 closed the WM8994 codec. SB45, SB21, Default setting. SB44, SB22 SB45, SB21 closed, SB44, SB22 open The PDM clock for the digital microphone is provided by the STM32H747XIH6 MCU. SB41 closed, The power supply of the digital microphone is generated SB42 open by the WM8994 codec. SB42, SB41 SB41 open, Default setting. SB42 closed The power supply of the digital microphone is +3V3.

5.6 USB OTG HS port The STM32H747I-DISCO supports USB OTG HS (high-speed) communication via the U4 USB PHY USB3320C-EZK with the ULPI interface. USB OTG connector CN1 is of the Micro-AB type.

5.6.1 STM32H747I-DISCO as USB device The STM32H747I-DISCO board may work as USB device on CN1 in any power source configuration. If the board is supplied by an external power source from jumper JP4 set on

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U5V, the user must pay attention that the power source delivers a sufficient amount of current for the complete STM32H747I-DISCO board setup. When a USB host connection to the CN1 Micro-AB USB connector of STM32H747I-DISCO is detected, the STM32H747I-DISCO board starts behaving as a USB device. Depending on the powering capability of the USB host, the board can take power from the VBUS terminal of CN1. In the board schematics, the corresponding power voltage line is called HS. Refer to Section 5.2: Power supply on page 14 for the related jumper setting.

5.6.2 STM32H747I-DISCO as USB host When a USB device connection to the CN1 Micro-AB USB connector is detected, the STM32H747I-DISCO board starts behaving as USB host. It sources 5 V on the VBUS terminal of CN1 Micro-AB USB connector to power the USB device. For this to happen, the STM32H747XIH6 MCU sets the U2 power switch STMPS2151STR to the ON state via USB3320C. The LD7 green LED marked OTG_HS indicates that the peripheral is supplied by the board. The LD5 red LED marked HS_OC lights up if over-current is detected.

5.7 Ethernet The STM32H747I-DISCO board supports 10 Mbps / 100 Mbps Ethernet communication with the U18 LAN8742A-CZ-TR PHY from MICROCHIP and CN7 integrated RJ45 connector. The Ethernet PHY is connected to the STM32H747XIH6 MCU via the RMII interface. The 25 MHz clock for the PHY is generated by oscillator X2. The 50 MHz clock for the STM32H747XIH6 is provided by the RMII_REF_CLK of the PHY. With the default setting, the Ethernet feature is not working because of a conflict between ETH_MDC and SAI4_D1 of the MEMs digital microphone. Table 5 shows the possible settings of all solder bridges or resistor associated with the Ethernet on the board.

Table 5. Ethernet related solder bridge and resistor settings Solder bridge Setting Configuration / resistor

Default setting. SB8 open, SB21 closed STM32H747XIH6 port PC1 is connected to MEMs. digital SB8, SB21 microphone DOUT. SB8 closed, STM32H747XIH6 port PC1 is connected to Ethernet SB21 open ETH_MDC. Default setting. R87 closed, SB17 open STM32H747XIH6 port PE2 is connected to MEMs. digital SB17, R87 microphone CLK. R87 open, STM32H747XIH6 port PE2 is connected to Ethernet SB17 closed ETH_nINT.

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5.8 SDRAM The U7 8M x 32bit SDRAM (IS42S32800G-6BLI) is connected to SDRAM Bank1 of STM32H747XIH6 FMC interface.

5.9 Quad-SPI Flash memory Two 512-Mbit Quad-SPI Flash memory devices (MT25QL512ABB8ESF-0SIT from MICRON) are fitted on STM32H747I-DISCO in positions U3 and U14, making possible the evaluation of the STM32H747XIH6 Quad-SPI interface.

5.10 Virtual COM port The serial interface USART1 is directly available as a Virtual COM port of a PC connected to STLINK-V3E USB connector CN2. The Virtual COM port configuration is: • 115200 b/s • 8-bit data • no parity • 1 stop bit

5.11 User LEDs Four general-purpose color LEDs (LD1, LD2, LD3, and LD4) are available as light indicators. Each LED is in light-emitting state for a low level of the corresponding port of the STM32H747XIH6 MCU.

5.12 Physical input devices The STM32H747I-DISCO board provides a number of input devices for physical human control: • Four-way joystick controller with select key (B3) • Wake-up / Tamper button (B2) • Reset button (B1)

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6 Connectors

6.1 USB OTG HS Micro-AB connector CN1 An USB OTG high speed communication link is available at USB Micro-AB receptacle connector CN1. Micro-AB receptacle enables USB Host and USB Device features.

Figure 8. USB OTG HS Micro-AB connector CN1

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Table 6. USB OTG HS Micro-AB connector CN1 Pin number Description Pin number Description

1 VBUS 4 ID 2DM5GND 3DP--

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6.2 STLINK-V3E USB Micro-B connector CN2 USB connector CN2 is used to connect the embedded STLINK-V3E to the PC for programming and debugging software.

Figure 9. USB Micro-B connector CN2

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Table 7. USB Micro-B connector CN2 Pin number Description Pin number Description

1 VBUS (power) 4 NC 2DM5GND 3DP--

6.3 SPDIF input RCA connector CN3

Table 8. SPDIF input RCA connector CN3 Pin number Description Pin number Description

1 SPDIF_RX0 (PD7) 3 GND 2GND4GND

6.4 STLINK-V3E MCU programming header CN4 The 4-pin STLINK-V3E MCU programming header offers a way to program and debug an MCU in an external application board using a dedicated cable connected to it.

Table 9. STLINK-V3E MCU programming header CN4 Pin number Description Pin number Description

13V33GND 2 SWCLK (PA14) 4 SWDIO (PA13)

Note: The STLINK-V3E MCU programming header is not populated by default. Its use is reserved to advanced users.

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6.5 ARDUINO® Uno V3 connectors CN5, CN6, CN8 and CN9 ARDUINO® Uno V3 connectors CN5, CN6, CN8 and CN9 are female connectors compatible with ARDUINO® Uno Revision 3 standard. Most of shields designed for ARDUINO® Uno V3 fit to STM32H747I-DISCO board.

Table 10. ARDUINO® Uno V3 compatible connectors Left connectors Right connectors

Pin Pin MCU MCU Pin Pin CN No. Function Function CN No. No. Name Pin Pin Name No.

I2C4_SCL PD12 D15 10 I2C4_SDA PD13 D14 9 - AVDD - AREF 8 Ground - GND 7 1 NC - - SPI5_SCK PK03 D13 6 2 IOREF - 3.3 V Ref SPI5_MISO PJ11 D12 5 CN5 Digital TIM1_CH2N, 3 RESET NRST RESET PJ10 D11 4 SPI5_MOSI 3.3 V(1) TIM1_CH1, CN8 4+3V3- PK1 D10 3 Power input / output SPI5_NSS 5 +5V - 5 V output TIM8_CH2 PJ6 D9 2 6 GND - Ground - PJ5 D8 1 7 GND - Ground - 8 VIN - Power input(2) - PJ0 D7 8 - TIM8_CH2N PJ7 D6 7 1 A0 PF7 ADC3_IN5 TIM3_CH1 PA6 D5 6 2 A1 PF10 ADC12_IN0 - PJ4 D4 5 3 A2 PA0_C ADC12_IN1 TIM13_CH1 PF8 D3 4 CN6 4 A3 PA1_C ADC1_IN15 - PJ3 D2 3 CN9 Digital Analog PC2_C ADC3_IN50 5A4 or or UART8_TX PJ8 D1 2 PD13 I2C4_SDA(3) PC3_C ADC3_IN1 6A5 or or UART8_RX PJ9 D0 1 PD12 I2C4_SCL(3)

1. The +3V3 on ARD connector Pin4 of CN8 is not a power input for STM32H747I-DISCO board, to simplify power architecture. 2. The external voltage applied to pin VIN on Pin8 of CN8 must be in the range 6 to 9V at 25°C ambient temperature. If a higher voltage is applied on the regulator U19, it may overheat and could be damaged. 3. By default, Pin 5 and Pin 6 of CN9 connector are connected to ADC MCU input ports PC2_C and PC3_C respectively, thanks to configuration of solder bridges: SB6 and SB23 closed, SB7 and SB24 opened. In case it is necessary to connect I2C interface signals on pins 5 and 6 of CN9 instead of ADC inputs, open SB6 and SB23, and close SB7 and SB24.

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Before using any ARDUINO® Uno V3 shield, it is important to refer to Section 5.2.1: Supplying the board through STLINK-V3E USB port on page 15 for a correct configuration of JP6. Caution: The I/Os of the STM32 microcontroller are +3V3 compatible instead of 5 V for ARDUINO® Uno V3.

6.6 Ethernet RJ45 connector CN7

Figure 10. Ethernet RJ45 connector CN7 (front view)

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Yellow LED: Ethernet connection. Green LED: Ethernet traffic.

Table 11. USB Micro-B connector CN2 Pin number Description Pin number Description

1TX+7CT 2TX-8CT 3 RX+ 9 K, yellow LED 4 CT 10 A, yellow LED 5 CT 11 K, green LED 6 RX- 12 A, green LED

6.7 Audio blue jack (Line In) connector CN10 The 3.5 mm stereo audio blue jack input CN10 is available on the STM32H747I-DISCO Discovery board for audio line input.

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6.8 Audio green jack (Line Out) connector CN11 The 3.5 mm stereo audio green jack output CN11 is available on the STM32H747I-DISCO Discovery board for headphones.

Figure 11. Stereo headset with microphone jack CN11

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Table 12. Audio jack connector CN11 (on board) Pin number Description Stereo headset pinning

1NCNA 2NCNA 3GNDGND 4 OUT_Right SPK_R (33 ohm typ.) 5NCNA

6 OUT_Left SPK_L (33 ohm typ.)

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6.9 microSD card connector CN12 microSD cards with 4 Gbytes or more capacity are inserted in the receptacle CN12. Four data bits of the SDMMC1 interface, CLK and CMD signals of the STM32H747XIH6 are used to communicate with the microSD card at +3V3 only. The card insertion is detected by the PI8 GPIO: when a microSD card is inserted, the logic level is 0, otherwise it is 1.

Figure 12. microSD connector CN12

Table 13. microSD connector CN12 Pin Pin Description Description number number

1 SDIO1_D2 (PC10) 6 GND 2 SDIO1_D3 (PC11) 7 SDIO1_D0 (PC8) 3 SDIO1_CMD (PD2) 8 SDIO1_D1 (PC9) 4+3V3 9 GND 5 SDIO1_CK (PC12) 10 µSD_DETECT (PI8)

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6.10 STDC14 connector CN13

Figure 13. STDC14 debugging connector CN13 (top view)



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Table 14. STDC14 debugging connector CN13 Terminal Function / MCU port Terminal Description

1- 2 - 3 VDD 4 SWDIO/TMS (PA13) 5 GND 6 SWDCLK/TCK (PA14) 7 GND 8 SWO/TDO (PB3) 9 KEY 10 TDI (PA15) 11 GND 12 RESET# 13 VCP_RX (PA10) 14 VCP_TX (PA9)

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6.11 External 5 V USB Micro-B connector CN14 USB connector CN14 is used to provide additional external 5 V power to the STM32H747I- DISCO if more power current is consumed on the board.

Figure 14. USB Micro-B connector CN14

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Table 15. USB Micro-B connector CN14 Pin number Description Pin number Description

1 VBUS (power) 4 NC 2NC5GND 3NC--

6.12 DSI LCD connector CN15 (MIPI) The CN15 connector is designed to connect the DSISM LCD daughterboard. The MB1166 daughterboard is available to be mounted on the STM32H747I-DISCO board. Table 16 shows the assignment of CN15 and STM32H747XIH6 terminals.

Figure 15. DSI LCD display connector CN15

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Table 16. DSI LCD module connector CN15 Pin CN15 pin Pin Function Function connection number connection

GND - 1 2 - - DSI_CK_P - 3 4 PK7 DSI_INT DSI_CK_N - 5 6 - GND GND - 7 8 GND RFU(1) DSI_D0_P - 9 10 GND RFU(1) DSI_D0_N - 11 12 - GND GND - 13 14 GND RFU(1) DSI_D1_P - 15 16 GND RFU(1) DSI_D1_N - 17 18 - GND GND - 19 20 - - BLVDD (5V) - 21 22 - - BLVDD (5V) - 23 24 - - - - 25 26 - - BLGND - 27 28 - - BLGND - 29 30 - - - - 31 32 - - - - 33 34 - - SCLK/MCLK PE5 35 36 - 3.3 V LRCLK PE4 37 38 - - I2S_DATA PE6 39 40 PD13 I2C_SDA - - 41 42 - - - - 43 44 PD12 I2C_SCL CEC_CLK PA8 45 46 - - CEC PB6 47 48 - - DSI_TE PJ2 49 50 - - -5152-- DSI_BL_CTRL PJ12 53 54 - - - - 55 56 - - DSI_RST PG3 57 58 - - - - 59 60 - 1.8 V

1. Reserved for future use.

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6.13 TAG connector CN16 The TAG connector footprint CN16 is used to connect STM32H747XIH6 microcontroller for programming or debugging the board.

Figure 16. TAG connector CN16

Table 17. TAG connector CN16 Pin number Description Pin number Description

1 VDD 2 SWDIO/TMS (PA13) 3 GND 4 SWDCLK/TCK (PA14) 5 GND 6 SWO/TDO (PB3) 7 NC 8 TDI (PA15) 9 TRST (PB4) 10 RESET#

6.14 Audio connector CN17 The 2x10-male-pin 1.27 mm-pitch audio connector is used for Audio MEMS daughter board extension with the DFSDM interface.

Table 18. Audio connector CN17 Terminal Function / MCU port Terminal Function / MCU port

1GND 2 +3V3 3 DFSDM_CKOUT (PD3) 4 DFSDM_CKOUT (PD3) 5 DFSDM_DATIN3 (PC7) 6 DFSDM_DATIN7 (PB9) 7 DFSDM_DATIN1 (PC3) 8 DFSDM_DATIN2 (PB14) 9NC 10DETECTn (PC6) 11 NC 12 MEMS_LED (PJ13) 13 NC 14 NC 15 NC 16 NC 17 NC 18 NC 19 +3V3 20 GND

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6.15 Camera module connector P1 An 8-bit camera module function is supported thanks to the 30-pin dedicated ZIF connector P1. The reference of camera module to be used is STM32F4DIS-CAM. This module must be connected with caution before powering the STM32H747I-DISCO Discovery board. The camera module I²C addresses are 0x61 and 0x60. Camera is usable by default. Care must be taken of GPIO sharing and multiplexing with other functions, in order to program the good configuration. GPIO assignment and sharing: • DCMI_SDA and DCMI_SCL I2C peripheral share with Pmod™/STMOD+ connector, ARDUINO® connector, and Audio DSISM LCD • Camera signals PA4, PC6, PC7, PB8, PB9, PD3 share with Pmod™ • Camera signals PC9 and PC11 share with SDIO • Camera signal PA6 shared with ARDUINO®

Figure 17. Camera module connector P1 (front view)

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Table 19. Camera module connector P1 Pin number Description Pin number Description

1GND16GND 2 NC 17 DCMI_HSYNC (PA4) 3NC18NC 4 DCMI_D0 (PC6) 19 DCMI_VSYNC (PB7) 5 DCMI_D1 (PC7) 20 3V3 6 DCMI_D2 (PG10) 21 Camera_CLK (OSC_24M) 7 DCMI_D3 (PC9) 22 NC 8 DCMI_D4 (PC11) 23 GND 9 DCMI_D5 (PD3) 24 NC 10 DCMI_D6 (PB8) 25 DCMI_PWR_EN (PJ14) 11 DCMI_D7 (PB9) 26 RESET# 12 NC 27 DCMI_SDA (PD13) 13 NC 28 DCMI_SCL (PD12) 14 GND 29 GND 15 DCMI_PIXCK (PA6) 30 3V3

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6.16 STMod+ connector P2 The standard 20-pin STMod+ connector is available on STM32H747I-DISCO board to increase compatibility with external boards and modules from the Ecosystem of microcontrollers. By default, it is designed to support an ST dedicated Fanout board which allows connecting different modules or board extensions from different manufacturers. Fanout board also embeds a 3V3 regulator. For more detailed information, please refer to ST Fanout board user manual and to relevant datasheets of associated modules. For details about STMod+ interface, please refer to the STMod+ connector interface specification.

Figure 18. STMod+ connector P2

         

         

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Table 20. STMod+ connector P2 Pin Pin Description Description number number

1 SPI2_NSS/USART2_CTS (PA11/PA0) 11 INT (PC6) 2 SPI2_MOSI/ USART2_TX (PC3/PD5) 12 RESET (PJ13) 3 SPI2_MISO/ USART2_RX (PC2/PD6) 13 ADC (PA4) 4 SPI2_SCK/ USART2_RTS (PA12/PD4) 14 PWM (PF8) 5GND15+5 V 6+5 V16GND 7 I2C4_SCL (PD12) 17 DFSDM-DATA3 (PC7) 8 SPI2_MOSIs (PB15) 18 DFSDM-CKOUT (PD3) 9 SPI2_MISOs (PB14) 19 DFSDM-DATA7 (PB9) 10 I2C4_SDA (PD13) 20 DFSDM-CK7 (PB8)

That this connector shares many GPIOs with other functions on the board. For more detailed information, refer to Appendix B: STMod+ GPIO sharing and multiplexing. In addition, to have a quick look at STMod+ GPIO sharing and multiplexing, and to get a quick view on other Alternate functions available on its pins, please refer to Appendix B: STMod+ GPIO sharing and multiplexing.

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6.17 Pmod connector P3 The standard 12-pin Pmod™ connector is available on the STM32H747I-DISCO Discovery board to support low frequency, low I/O pin count peripheral modules. The Pmod™ interface, which has been implemented on the STM32H747I-DISCO Discovery board, is compatible with the Pmod™ type 2A & 4A I/O signal assignment convention.

Figure 19. Pmod connector P3

     

     

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Table 21. Pmod connector P3 Pin number Description Pin number Description

1 SPI2_NSS/USART2_CTS (PA11/PA0) 7 INT (PC6) 2 SPI2_MOSI/ USART2_TX (PC3/PD5) 8 RESET (PJ3) 3 SPI2_MISO/ USART2_RX (PC2/PD6) 9 NA 4 SPI2_SCK/ USART2_RTS (PA12/PD4) 10 NA 5GND 11GND 6+3V3 12+3V3

Pmod™ also shares GPIOs with other functions of the board. For more detailed information, refer to Appendix B: STMod+ GPIO sharing and multiplexing.

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7 Schematic diagrams

This chapter provides design schematics for the STM32H747I-DISCO key features to help users to implement these features in application designs: • Figure 20: Overall schematics for the board on page 36 • Figure 21: STM32H747I-DISCO MCU on page 37 • Figure 22: Power supply on page 38 • Figure 23: SDRAM memory device on page 39 • Figure 24: Audio codec device on page 40 • Figure 25: DSI LCD and camera connector on page 41 • Figure 26: Ethernet on page 42 • Figure 27: Quad-SPI Flash memory devices on page 43 • Figure 28: Physical control peripherals and microSD™ card on page 44 • Figure 29: Pmod, STMod+ and audio connectors on page 45 • Figure 30: TAG debug connector on page 46 • Figure 31: ARDUINO® Uno connector on page 47 • Figure 32: STLINK-V3E module on page 48 • Figure 33: STLINK-V3E power on page 49 • Figure 34: USB_OTG_HS port on page 50

UM2411 Rev 4 35/61

60 Schematic diagrams UM2411 115 Revision: MB1248 D.2 U_Power Power.SchDoc T_PWR_EN T_PWR_EXT U_STLink_V3E_PWR STLink_V3E_PWR.SchDoc STM32H7-DK MB1248 1/21/2019 A3 Title: Project: Size:Date: Reference: Sheet: of T_PWR_EN T_PWR_EXT T_SWDIO T_SWCLK T_SWO T_NRST T_VCP_TX T_VCP_RX U_STLink_V3E_Module STLink_V3E_Module.SchDoc A[0..15] D[0..31] SDCLK SDNE1 SDNRAS SDNCAS SDNWE SDCKE1 FMC_NBL0 FMC_NBL1 FMC_NBL2 FMC_NBL3 QSPI_CLK QSPI_BK1_NCS QSPI_BK1_IO0 QSPI_BK1_IO1 QSPI_BK1_IO2 QSPI_BK1_IO3 QSPI_BK2_IO0 QSPI_BK2_IO1 QSPI_BK2_IO2 QSPI_BK2_IO3 SDIO1_CLK SDIO1_D0 SDIO1_D1 SDIO1_D2 SDIO1_D3 SDIO1_CMD uSD_Detect JOY_SEL JOY_UP JOY_DOWN JOY_LEFT JOY_RIGHT WAKEUP LED1 LED2 LED3 LED4 RMII_REF_CLK RMII_RXD0 RMII_RXD1 RMII_CRS_DV RMII_TXD0 RMII_TXD1 RMII_TX_EN ETH_MDC ETH_MDIO OSC_25M ETH_nINT RESET# TDI TRST TMS/SWDIO TCK/SWCLK TDO/SWO RESET# U_Memory Memory.SchDoc U_QSPI QSPI.SchDoc U_Peripherals Peripherals.SchDoc U_Ethernet Ethernet.SchDoc U_DEBUG DEBUG.SchDoc 25MHz clock Same length Same length 90MHz clock 133MHz clock TDI LED1 LED2 LED3 LED4 TRST SDNE1 A[0..15] D[0..31] SDCLK SDNWE JOY_UP SDCKE1 RESET# SDNRAS SDNCAS JOY_SEL WAKEUP OSC_25M SDIO1_D1 SDIO1_D0 SDIO1_D2 SDIO1_D3 ETH_nINT TDO/SWO ETH_MDC QSPI_CLK JOY_LEFT uSD_Detect FMC_NBL1 FMC_NBL0 FMC_NBL2 FMC_NBL3 ETH_MDIO RMII_TXD1 RMII_RXD1 RMII_TXD0 RMII_RXD0 SDIO1_CLK JOY_DOWN JOY_RIGHT SDIO1_CMD TMS/SWDIO USART1_TX USART1_RX TCK/SWCLK RMII_TX_EN QSPI_BK1_IO1 QSPI_BK2_IO1 QSPI_BK1_IO0 QSPI_BK1_IO2 QSPI_BK1_IO3 QSPI_BK2_IO0 QSPI_BK2_IO2 QSPI_BK2_IO3 RMII_CRS_DV QSPI_BK1_NCS RMII_REF_CLK I2C4_SCL I2C4_SDA SAI1_SCKA SAI1_FSA SAI1_SDA SAI1_SDB SAI1_MCLKA SAI4_CK1 SAI4_D1 SPDIF_RX0 Audio_INT DSI_CK_P DSI_CK_N DSI_D0_P DSI_D0_N DSI_D1_P DSI_D1_N DSI_TE DSI_RESET LCD_BL_CTRL CEC CEC_CLK TOUCH_INT DCMI_PIXCK DCMI_HSYNC DCMI_VSYNC DCMI_D[0..7] DCMI_PWR_EN ULPI_D[0..7] ULPI_CK ULPI_DIR ULPI_STP ULPI_NXT OTG_HS_OverCurrent ARD_A0 ARD_A1 ARD_A2 ARD_A3 ARD_A4 ARD_A5 ARD_D0 ARD_D1 ARD_D2 ARD_D3 ARD_D4 ARD_D5 ARD_D6 ARD_D7 ARD_D8 ARD_D9 ARD_D10 ARD_D11 ARD_D12 ARD_D13 PMOD#1-NSS PMOD#2-MOSIp PMOD#2-TX PMOD#3-MISOp PMOD#3-RX PMOD#4-SCK PMOD#1-CTS PMOD#8-MOSIs PMOD#9-MISOs PMOD#4-RTS PMOD#11-INT PMOD#12-RST PMOD#13-ADC PMOD#14-PWM PMOD#17-DF-D3 PMOD#18-DF-CKOUT PMOD#19-DF-D7 PMOD#20-DF-CK7 U_MCU MCU.SchDoc 500MHz clock 25MHz clock 60MHz clock Figure 20. Overall schematics for the the board for schematics 20. Overall Figure Same length I2S CEC LRCLK DSI_TE SAI4_D1 ARD_A1 ARD_A5 ARD_D1 ARD_D5 ARD_A0 ARD_A2 ARD_A3 ARD_A4 ARD_D0 ARD_D2 ARD_D3 ARD_D4 ARD_D6 ARD_D7 ARD_D8 ARD_D9 ULPI_CK ARD_D11 ARD_D10 ARD_D12 ARD_D13 SAI4_CK1 DSI_D0_P DSI_D1_P ULPI_DIR SAI1_SDB SAI1_FSA CEC_CLK ULPI_STP DSI_D0_N DSI_D1_N SAI1_SDA DSI_CK_P Audio_INT DSI_CK_N ULPI_NXT SPDIF_RX0 DSI_RESET SAI1_SCKA ULPI_D[0..7] PMOD#2-TX PMOD#3-RX SCLK/MCLK TOUCH_INT DCMI_D[0..7] PMOD#1-NSS DCMI_PIXCK PMOD#1-CTS PMOD#4-RTS SAI1_MCLKA PMOD#4-SCK PMOD#11-INT DCMI_HSYNC DCMI_VSYNC PMOD#12-RST PMOD#13-ADC LCD_BL_CTRL PMOD#8-MOSIs PMOD#9-MISOs PMOD#14-PWM DCMI_PWR_EN PMOD#2-MOSIp PMOD#3-MISOp PMOD#17-DF-D3 PMOD#19-DF-D7 PMOD#20-DF-CK7 OTG_HS_OverCurrent PMOD#18-DF-CKOUT I2C4_SCL I2C4_SDA I2C4_SCL I2C4_SDA RESET# OSC_24M OSC_24M RESET# ARD_D15 ARD_D14 NRST PMOD#7-SCL PMOD#10-SDA U_Audio Audio.SchDoc _MDSMd connector U_PMOD_STMod+ PMOD_STMod+ connector .SchDoc U_LCD&Camera Connectors LCD&Camera Connectors.SchDoc U_USB_OTG USB_OTG .SchDoc U_Arduino Connectors Arduino Connectors.SchDoc 24MHz clock R131R130 1K5 1K5 +3V3

36/61 UM2411 Rev 4 UM2411 Schematic diagrams 215 FMC_NBL2 FMC_NBL3 uSD_Detect ULPI_DIR LED1 LED2 LED3 LED4 ARD_D7 OTG_HS_OverCurrent DSI_TE ARD_D2 ARD_D4 ARD_D8 ARD_D9 ARD_D6 ARD_D1 ARD_D0 ARD_D11 ARD_D12 LCD_BL_CTRL PMOD#12-RST DCMI_PWR_EN Audio_INT ARD_D13 ARD_D10 JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP TOUCH_INT DSI_CK_P DSI_CK_N DSI_D0_P DSI_D0_N DSI_D1_P DSI_D1_N Revision: D24 D25 D26 D27 D28 D29 D30 D31 PI0 PI1 PI2 PI3 PI4 PI5 PI6 PI7 PI8 PI9 PI10 PI11 PI12 PI13 PI14 PI15 MB1248 D.2 PJ0 PJ1 PJ2 PJ3 PJ4 PJ5 PJ6 PJ7 PJ8 PJ9 PJ10 PJ11 PJ12 PJ13 PJ14 PJ15 PK0 PK1 PK2 PK3 PK4 PK5 PK6 PK7 R90R92 33 R91 33 R195 33 33 R187R188 33 33 R200R201 33 33 N6 T6 U6 U7 N15 N14 N13 M14 J14 H17 C8 B8 C7 D7 L16 A16 B15 C14 A4 A2 B3 E4 E2 P6 R12 L14 D11 E10 D10 M17 K17 A15 A3 F3 H1 H2 H3 K14 B10 J15 A8 L17 F4 P5 M16 K16 STM32H7-DK MCU 1/21/2019 A3 PI1 PI5 PI0 PI2 PI3 PI4 PI6 PI7 PI8 PI9 PJ1 PJ5 PJ0 PJ2 PJ3 PJ4 PJ6 PJ7 PJ8 PJ9 PK1 PK5 PK0 PK2 PK3 PK4 PK6 PK7 PI11 PI15 PI10 PI12 PI13 PI14 PJ11 PJ15 PJ10 PJ12 PJ13 PJ14 Title: Project: Size:Date: Reference: Sheet: of DSI_D0_P DSI_D1_P DSI_D0_N DSI_D1_N DSI_CK_P DSI_CK_N +3V3 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 PH2 PH3 PH4 PH5 PH6 PH7 PH8 PH9 PH10 PH11 PH12 PH13 PH14 PH15 PA0_C PA1_C PC2_C PC3_C PH0-OSCIN PH1-OSCOUT NRST BOOT0 PDR_ON U6B STM32H747XIH6U R190 [N/A] J1 J2 P2 P3 P4 T1 E8 E7 T8 B9 T2 R1 K1 U8 A9 C9 D9 D8 D6 N2 R2 R191 10K F15 F16 T11 P13 P14 H15 T13 B17 B16 H16 H14 G15 A10 U13 R13 R14 D16 G14 PH0 PH1 RESET# BOOT0 R192 [N/A] R55R54 33 R172 33 R82 33 R168 33 R169 33 R176 33 33 R179R181 33 33 R93R193 33 R194 33 R178 33 R189 33 33 R141R139 33 33 R142R48 33 33 R152R159 33 R165 33 R162 33 R154 33 R183 33 R88 33 R89 33 33 +3V3 PA0_C PA1_C PC2_C PC3_C R73 51 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 PH2 PH3 PH4 PH5 PH6 PH7 PH8 PH9 PH10 PH11 PH12 PH13 PH14 PH15 R196 10K A10 A11 A14 A15 D16 D17 D18 D19 D20 D21 D22 D23 A12 R202 0 DCMI_D2 itor close to itor close MCU C120 100nF Capac R72 51 OSC_25M ARD_A2 ARD_A3 ARD_A4 ARD_A5 DSI_RESET QSPI_BK1_NCS SAI1_MCLKA SDCLK QSPI_BK2_IO2 RMII_TX_EN RMII_TXD1 RMII_TXD0 QSPI_BK2_IO3 SDNCAS QSPI_BK2_IO0 QSPI_BK2_IO1 ULPI_NXT SDNWE SDNE1 SDCKE1 3 2 1 2 3 OUT GND OSC_25M VDD EN X2 NZ2520SB-25.00M RESET# D13 ESDA7P60-1U1M 1 1 4 4 2 ETH_nINT SAI4_CK1 ARD_D3 PMOD#14-PWM B1 TD-0341 [RESET/Black] R70 10K C22 100nF SB39 +3V3 R87 33 SB17 QSPI_BK1_IO1 QSPI_BK1_IO0 QSPI_BK1_IO3 QSPI_BK1_IO2 SDIO1_CMD PMOD#18-DF-CKOUT PMOD#4-RTS PMOD#2-TX PMOD#3-RX SPDIF_RX0 I2C4_SCL I2C4_SDA SAI1_SDB SAI1_FSA SAI1_SCKA SAI1_SDA ARD_A1 SDNRAS FMC_NBL1 FMC_NBL0 D2 D3 D13 D14 D15 D0 D1 A0 D4 D5 D6 D7 D8 D9 D10 D11 D12 A1 A2 A3 A4 A5 A6 A7 A8 A9 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 Figure 21. STM32H747I-DISCO MCU 21. STM32H747I-DISCO Figure R182 33 R180 33 R59R62 33 R60 33 R157 33 33 R67R65 33 33 R52R51 33 R148 33 33 R146 33 R151 33 R149 33 R49R50 33 R150 33 33 R199 33 R198 33 R185 33 R186 33 R197 33 R184 33 R69 33 R140 33 R144 33 R143 33 R145 33 R53R147 33 33 DCMI_D5 B4 D1 G3 J4 R15 P15 P10 R11 T7 R9 D13 D12 B12 A12 B11 C11 U16 T17 N9 R10 T10 U10 L3 R7 P7 P8 C4 C3 D3 D2 E5 U9 T9 P9 G4 G1 H4 J5 K2 K3 K4 L4 E12 A11 T16 R16 R17 P16 PE1 PE5 PF1 PF5 PE0 PE2 PE3 PE4 PE6 PE7 PE8 PE9 PF0 PF2 PF3 PF4 PF6 PF7 PF8 PF9 PD1 PD5 PD0 PD2 PD3 PD4 PD6 PD7 PD8 PD9 PE11 PE15 PF11 PF15 PE10 PE12 PE13 PE14 PF10 PF12 PF13 PF14 PD11 PD15 PD10 PD12 PD13 PD14 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14-OSC32_IN PC15-OSC32_OUT U6A STM32H747XIH6U T5 B5 L2 E3 N5 T3 R5 U5 B7 A5 C5 D5 T4 C1 N4 N3 U2 U3 R3 R6 C6 D4 U4 C2 M2 M3 M4 E15 P11 E17 E16 P12 T15 F14 F13 E13 E14 D15 C15 B14 T14 U15 B13 D14 A14 U14 A13 C12 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PB0 PB1 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 R56 33 ULPI_D0 ULPI_D1 ULPI_D2 ULPI_D3 ULPI_D4 ULPI_D6 ULPI_D7 ULPI_D5 PB2 DCMI_D6 DCMI_D7 DCMI_D3 DCMI_D4 DCMI_D0 DCMI_D1 D[0..31] A[0..15] ULPI_D[0..7] R77 0 R78 0 DCMI_D[0..7] D[0..31] A[0..15] X3 ULPI_D[0..7] SDIO1_D0 SDIO1_D1 SDIO1_D2 SDIO1_D3 SDIO1_CLK WAKEUP DCMI_D[0..7] C31 1.5pF C34 1.5pF RMII_REF_CLK ETH_MDIO ULPI_CK RMII_CRS_DV CEC_CLK USART1_TX USART1_RX TMS/SWDIO TCK/SWCLK TDI QSPI_CLK TDO/SWO TRST CEC DCMI_VSYNC ULPI_STP RMII_RXD0 RMII_RXD1 PMOD#1-CTS PMOD#1-NSS PMOD#4-SCK PMOD#20-DF-CK7 PMOD#19-DF-D7 PMOD#9-MISOs PMOD#8-MOSIs PMOD#3-MISOp PMOD#2-MOSIp PMOD#11-INT PMOD#17-DF-D3 SB3 SB4 SB8 NX3215SA-32.768KHZ-EXS00A-MU00525 SAI4_D1 ARD_A0 DCMI_HSYNC ARD_D5 DCMI_PIXCK ETH_MDC PMOD#13-ADC

UM2411 Rev 4 37/61 Schematic diagrams UM2411 H3 H4 H5 H6 VDD_MCU C75 100nF 315 JP3 TP5 Ground TP2 1V8 Revision: H7 H2 5V_USB_PWR +3V3 TP1 Ground 10 11 4 2 3 5 1 6 7 8 9 +1V8 ID DP H1 H8 DM EXP EXP GND

VBUS Shield Shield Shield Shield

MB1248 D.2

receptacle USB_Micro-B 2 CN14 USB_uB_105017-0001 STM32H7-DK LD8 Green C69 TPSR106K006R1000 C42 10uF 1 Power A4 1/21/2019 TP4 +3V3 4 2 Title: Project: Size:Date: Reference: Sheet: of R101 1K C65 100nF Tab

Vout

+3V3 1 TP3 5V Vin E5V U8 LD1117S18TR 3 +5V 2 1 4 5 +3V3 C146 10uF NC NC NC VO ST1L05APU33R 2 4 6 8

10

4 2

GND

7 C101 100nF

1 3 5 7 9 GND Tab JP6 Shunt Fitted 1-2

Vout 6 1 C92 1uF VI U11 Vin U19 LD1117S50TR 3 VDDA 3 CHGR C54 4.7uF E5V C21 [N/A] C90 100nF VIN VBUS_HS +5V C143 10uF(25V) DSI_VDD12 5V_USB_PWR 5V_USB_STLK 5V_USB_CHGR SB9 C87 1uF C20 2.2uF VREF+ C36 4.7uF VDD_MCU C19 100nF Figure Power supply 22. Figure GND-SD C94 100nF C106 100nF P1 P17 N17 A1 A17 B2 B6 C10 C13 C16 G7 G8 G9 G10 G11 G16 H7 H8 H9 H10 H11 J3 J7 J8 J9 J10 J11 K7 K8 K9 K10 K11 L7 L8 L9 L10 L11 N16 R4 R8 T12 U1 U17 J16 J17 K15 L15 M15 N1 Ceramic capacitor (Low ESR <600m ohm) Only one 2.2uF one Only on required board C107 100nF C109 100nF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA VREF- VSSDSI VSSDSI VSSDSI VDDDSI C104 100nF C117 100nF VCAPDSI C97 100nF C91 100nF C95 100nF C110 100nF VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDSMPS VLXSMPS VFBSMPS VSSSMPS VCAP VCAP VCAP VDDLDO VDDLDO VDDLDO VDD50USB VDD33USB VDDA VREF+ VBAT U6C STM32H747XIH6U F1 F5 F2 E1 L1 L5 B1 E6 E9 G5 H5 K5 N7 N8 G2 A7 A6 M1 J13 M5 E11 F17 L13 U11 N11 G13 H13 K13 C17 U12 N10 N12 D17 G17 M13 C102 100nF C116 100nF SB16 1uF_X5R_0603 SB46 C28 C100 100nF C108 100nF SB14 SB2 SB11 SB1 SB12 SB15 SB48 SB49 VDD_MCU C153 220pF C93 100nF C115 100nF L3 SB10 GND-SD 2.2uH(LQM2MPN2R2NG0) L7 BEAD(FBMJ1608HM180NTR) C26 10uF(GRM155R60G106ME44) +3V3 C118 100nF C98 100nF VDD_MCU VDD_SDC VDD_MCU VDD_MCU C15C39C33 4.7uF[N/A] C16 4.7uF C32 4.7uF C40 2.2uF 2.2uF 2.2uF[N/A] C96 100nF C105 100nF R158 0 VDD_SDC SB19 VDDA VDD_MCU VDD_MCU L6 BEAD(FCM1608KF-601T03) C152 10uF VREF+ LDO mode: SB1, SB12, SB1, mode: SB49LDO mounted, SB2, SB11, SB19, SB46,SMPS (default): mode SB2, SB11, SB48 SB19, removed SB46, SB48 mounted, SB1, SB12, SB49 removed SB14, are SB15 backup VDD_MCU GND-SD GND-SD SMPS GND Place near L3

38/61 UM2411 Rev 4 UM2411 Schematic diagrams D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 415 Revision: B3 B8 C1 D1 E9 L9 M1 N1 P3 P8 D3 D2 B1 C2 A1 A2 C7 C8 B9 D8 D7 E8 N3 N2 M2 M3 L2 L8 M7 P9 R9 R8 A3 F1 L3 R3 E2 A9 P1 N7 C3 A8 R2 R1 M8 N8 VSS VSS VSS VSS DQ1 DQ5 DQ3 DQ9 DQ8 DQ7 DQ6 DQ4 DQ2 DQ0 DQ31 DQ21 DQ11 DQ25 DQ23 DQ15 DQ13 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DQ30 DQ29 DQ28 DQ27 DQ26 DQ24 DQ22 DQ20 DQ19 DQ18 DQ17 DQ16 DQ14 DQ12 DQ10 MB1248 D.2 SDRAM A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BA1 BA0 WE# CAS# RAS# CS# CKE CLK DQM3 DQM2 DQM1 DQM0 NC NC NC NC NC VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD U7 IS42S32800G-6BLI IS42S32160D-6BLI J1 J3 J7 J9 J8 J2 F3 F7 F2 F8 F9 E1 L1 E3 P2 P7 H1 G1 K1 E7 L7 H3 G3 K3 B2 B7 C9 R7 H9 G7 H2 G2 G9 G8 H8 K8 K7 K9 H7 K2 D9 N9 A7 M9 STM32H7-DK SDRAM A4 1/21/2019 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A15 A14 Title: Project: Size:Date: Reference: Sheet: of PI5 PI4 R47 0 PE1 PE0 +3V3 PH5 PG15 PF11 PH6 PH7 PG8

SDNWE SDNCAS SDNRAS SDNE1 SDCKE1 SDCLK FMC_NBL3 FMC_NBL2 FMC_NBL1 FMC_NBL0 C44 100nF

C23 100nF

C27 100nF

C30 100nF

C25 100nF

C37 100nF

C29 100nF

C45 100nF

C41 100nF

Place close SDRAMPlace C24 100nF

C119 100nF

C121 100nF

C35 100nF

C38 100nF +3V3 Figure 23. SDRAM memory 23. SDRAM memory device Figure D[0..31] A[0..15] D[0..31] A[0..15]

UM2411 Rev 4 39/61 Schematic diagrams UM2411

D4 ESDA6V1BC6 CN11 PJ3028B-3-GR 6

Jack out Green 3 6 4

4 5

3 2

515 1 Revision: MB1248 D.2 SPK Left SPK Right I2C4_SDA I2C4_SCL SAI1_MCLKA C74 4.7uF PD13 PD12 PG7 STM32H7-DK Audio A4 1/21/2019 JP2 JP5 C73 4.7uF Title: Project: Size:Date: Reference: Sheet: of +3V3

R98 20

R105R103 0 0 C50 100nF Default I2C Address:0011010 I2C Default C67 4.7uF

R97 20

C51 100nF R108 [N/A] C47C49 2.2uF C48 2.2uF 2.2uF H1 A7 A6 G2 E1 G5 A2 G8 H8 H9 C1 C5 C4 B5 B4 F8 F3 F7 A5 C9 B6 H7 G6 G7 D3 A1 B3 A3 A4 F9 H6 C3 D6 E7 E8 E2 B1 SPDIF_RX0 SDA SCLK CPCB CPCA AGND AGND AGND DGND VMIDC MCLK1 CPGND HP2GND PD7 REFGND CS/ADDR HPOUT2P SPKGND1 HPOUT1L SPKGND2 HPOUT1R CPVOUTP CIFMODE HPOUT2N MICBIAS1 MICBIAS2 CPVOUTN SPKMODE HPOUT1FB SPKOUTLP SPKOUTRP SPKOUTLN SPKOUTRN LINEOUT1P LINEOUT2P LINEOUTFB LINEOUT1N LINEOUT2N GPIO2/MCLK2 4 U15 74LVC1G04SE

R127 1M 5 3 2 +3V3 LDO1VDD AVDD1 SPKVDD1 SPKVDD2 AVDD2 CPVDD DCVDD DBVDD LDO2VDD LDO1ENA LDO2ENA VREFC DMICCLK BCLK1 LRCLK1 DACDAT1 ADCDAT1 ADCLRCLK1/GPIO1 GPIO3/BCLK2 GPIO4/LRCLK2 GPIO5/DACDAT2 GPIO7/ADCDAT2 GPIO6/ADCLRCLK2 GPIO11/BCLK3 GPIO10/LRCLK3 GPIO8/DACDAT3 GPIO9/ADCDAT3 IN1LP IN1LN IN2LP/VRXN IN2LN/DMICDAT1 IN1RP IN1RN IN2RP/VRXP IN2RN/DMICDAT2 U12 WM8994ECS/R 100 Second Stage F1 F5 F2 F4 F6 E3 E5 E9 D1 E6 G1 E4 B2 C2 D5 C6 G3 H3 H5 C8 B8 B9 C7 B7 D9 D8 G9 D2 D4 H2 G4 H4 D7 A8 A9 R126 C80 100nF 1uF 1uF R99 4K7 C46 1uF C71 C72 C81 100nF +3V3 Figure 24. device 24. Audio codec Figure PE5 PE4 PE6 PE3 PJ15 Left Right

of first stage C58 1uF +3V3

SB22

4.7uF C62 3 6 4 Very close toVery close Output pin 4 C77 22nF

SAI1_SCKA SAI1_FSA SAI1_SDA SAI1_SDB Audio_INT 100nF C57 R129 [NA] CN10 PJ3028B-3-BE 4 Jack blue in U16 74LVC1G04SE +1V8

R132 1M C60 4.7uF 5 3 +3V3 First Stage 2

SB21

+1V8 MIC_DATA

C56 100nF

+1V8

C64 1uF

SB44 MIC_CLK

R133 100 C68 100nF

+3V3

C70 4.7uF SB45 +3V3 3 4 2

C78 22nF C59 100nF +3V3 LR CLK DOUT R128 75 +3V3 SB43 MICBIAS1 RIGHT 2 1 3 4 R213 10K VDD GND U21 MP34DT05-A PC1 PE2 LEFT SELECTION MP34DT05-A for replacement RCA in Yellow for input SPDIF 1 5 CN3

SB41 SB42 RCJ-01X-SMT C150 100nF SAI4_D1 SAI4_CK1

40/61 UM2411 Rev 4 UM2411 Schematic diagrams 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P1 FPU330ZH-BT1D3-CA 615 Revision: DCMI_D0 DCMI_D1 DCMI_D2 DCMI_D3 DCMI_D4 DCMI_D5 DCMI_D6 DCMI_D7 PA6 PA4 PB7 Camera_CLK PJ14 C79 100nF R5R4 100 100 +3V3 C8 10uF MB1248 D.2 +3V3 STM32H7-DK LCD&Camera Connectors A4 1/21/2019 DCMI_PIXCK DCMI_HSYNC DCMI_VSYNC OSC_24M DCMI_PWR_EN RESET# Title: Project: Size:Date: Reference: Sheet: of PD13 PD12 Connector DCMI_D[0..7] Camera Camera DCMI_D[0..7] +3V3 TOUCH_INT C9 100nF PK7 Figure 25. DSI LCD and camera connector camera 25. DSI LCD and Figure SB29 SB28 SB27 SB26 I2C4_SDA I2C4_SCL +1V8 C10 DSI_D2_P DSI_D2_N DSI_D3_P DSI_D3_N 100nF PD13 PD12 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 62 63 64 CN15 QSH-030-01-F-D-A-K-TR 1 3 5 7 9 11 21 31 41 51 61 13 15 23 25 33 35 43 45 53 55 63 17 19 27 29 37 39 47 49 57 59 62 64 C76 100nF C3 10uF R123 10K PE5 PE4 PE6 PA8 PB6 PJ2 PJ12 PG3 DSI_CK_P DSI_CK_N DSI_D0_P DSI_D0_N DSI_D1_P DSI_D1_N +3V3 L5 L4 BEAD(FCM1608KF-601T03) SCLK/MCLK LRCLK I2S CEC_CLK CEC DSI_TE LCD_BL_CTRL DSI_RESET +5V BEAD(FCM1608KF-601T03) DSI LCD

UM2411 Rev 4 41/61 Schematic diagrams UM2411 TX+ TX- RX+ NC NC RX- NC NC Shield Shield LED(Yellow)_A LED(Yellow)_K LED(Green)_A LED(Green)_K CN7 KRJ-CB4.2GYZNL 1 3 5 2 4 6 7 8 9 11 13 14 10 12 R79 270 715 R80 10K Revision: R44 270 R76 75 R57 10K R166 75 R156 75 R81 0 MB1248 D.2 R174 75 C17 15 10 11 14 16 9 STM32H7-DK Ethernet A4 1/21/2019 CT CT TX- RX- TX+ RX+ Title: Project: Size:Date: Reference: Sheet: of TD+ CT TD- RD+ CT RD- TC1206KKX7RDBB102 U5 KMS-1102NL 1 3 2 6 7 8 C103 100nF C88 100nF L8 BEAD(FCM1608KF-601T03) +3V3 100nF C89 4 6 5 C86 10uF I/O3 I/O4 Vbus TD_P TD_N RD_P RD_N C111 100nF I/O1 GND I/O2 U17 USBLC6-4SC6 1 3 2 C112 100nF R164 50 C99 100nF i i R161 50 +3V3 C113 1uF_X5R_0603 R170 50 Diff Pair 100ohm Diff Pair 100ohm i R167 50 C114 470pF Figure 26. Ethernet 26. Figure i R173 12K1 Diff Pair 100ohm 9 23 24 3 25 20 21 6 19 1 2 22 Diff Pair 100ohm TXP RXP TXN RXN RBIAS VDDIO VDD1A VDD2A VDDCR GND_EP LED1/nINT/nPME/REGOFF LED2/nINT/nPME/nINTSEL TXEN TXD0 TXD1 RXD0/MODE0 RXD1/MODE1 RXER/PHYAD0 CRS_DV/MODE2 MDC MDIO nRST nINT/REFCLK0 XTAL2 XTAL1/CLKIN U18 LAN8742A-CZ-TR 5 8 7 4 11 13 15 16 17 18 10 12 14 R68 10K +3V3 R75 10K R74 10K R64 1K5 R63 10K +3V3 +3V3 R171R175 33 33 R160 33 R155 0 R153 33 R177 [N/A] R163 10K +3V3 PG11 PG13 PG12 PC4 PC5 PA7 PC1 PA2 PA1 RMII_TX_EN RMII_TXD0 RMII_TXD1 RMII_RXD0 RMII_RXD1 RMII_CRS_DV ETH_MDC ETH_MDIO RESET# RMII_REF_CLK OSC_25M ETH_nINT

42/61 UM2411 Rev 4 UM2411 Schematic diagrams 815 Revision: QSPI_CLK BK2_IO0 BK2_IO2 SB25 R125 33 R124 33 MB1248 D.2 9 16 15 14 13 12 11 10 Two QSPI Flash solution QSPI Flash Two NC NC NC NC Vss DQ0 CLK STM32H7-DK QSPI W#/Vpp/DQ2 A4 1/21/2019 Title: Project: Size:Date: Reference: Sheet: of HOLD#/DQ3 VCC NC NC NC NC CS# DQ1 U14 MT25QL512ABB8ESF-0SIT 1 3 5 2 4 6 7 8 R135 33 R134 33 C84 100nF BK2_IO3 NCS2 BK2_IO1 +3V3 Flash memory devices R3/R6/R18/R19, SB47 ON R124/R125/R134/R135, SB25, C84 OFF R124/R125/R134/R135, SB25, C84 ON R3/R6/R18/R19, SB47 OFF QSPI_CLK QSPI_BK1_IO0 QSPI_BK2_IO0 QSPI_BK2_IO2 QSPI_BK1_IO2 PF7 PB2 PH2 PG9 PD11 BK2_IO0 BK2_IO2 QSPI_CLK 33[N/A] 33[N/A] R2R3 33 R6 R1 33 Figure 27. Quad-SPI 9 16 15 14 13 12 11 10 NC NC NC NC Vss DQ0 CLK W#/Vpp/DQ2 HOLD#/DQ3 VCC NC NC NC NC CS# DQ1 U3 MT25QL512ABB8ESF-0SIT 1 3 5 2 4 6 7 8 Twin Quad SPI Flash SPI Twin Quad R18 33[N/A] R19 33[N/A] SB47 R20 33 R15 33 C13 100nF BK2_IO3 BK2_IO1 NCS2 One Twin Quad SPI FllashTwo Quad SPI Fllash U3:MT25TL01GHBB8ESF-0SIT (default) U3:MT25QL512ABB8ESF-0SIT U14:NA U14:MT25QL512ABB8ESF-0SIT Twin Quad SPI Flash solutions: PF6 PG6 PF9 R8 10K PG14 PH3 +3V3 +3V3 QSPI_BK1_IO3 QSPI_BK2_IO3 QSPI_BK2_IO1 QSPI_BK1_NCS QSPI_BK1_IO1

UM2411 Rev 4 43/61 Schematic diagrams UM2411 C149 100nF +3V3

+3V3 U13 EMIF06-HSD03F3

VCC

B1

GND

B4

GND

B3 915

GND

B2

DET

B5

O1 I1 SW1

8 Revision:

A1 C1 10

O2 I2 7 SW2

A2 C2 9

6

O3 I3 5

A3 C3

4

O4 I4 3

A4 C4

O5 I5

2 R122 0

C5 A5 MB1248 D.2

O6 I6 1

A6 C6 R117 47K R116 47K STM32H7-DK +3V3 Peripherals A4 1/21/2019 R121 [N/A] R119 47K +3V3 Title: Project: Size:Date: Reference: Sheet: of R118 47K CN12 PJS008-2000 SMS064FF or SMS128FF PI8 R115 47K PC9 PC8 PC11 PC10 PC12 PD2 uSD_Detect input pin with pull-up SDIO1_D1 SDIO1_D3 SDIO1_D0 SDIO1_D2 SDIO1_CLK SDIO1_CMD MICRO SD (TF) Card LED1 LED2 LED3 LED4 7 8 PI12 PI13 PI14 PI15 GND GND R203 510 R204 680 R205 680 R209 680 LEDs 2 2 2 2 LD1 Green LD2 Orange LD3 Red LD4 Blue 1 1 1 1 COMMON Selection DOWN LEFT RIGHT UP B3 MT-008A 1 5 3 2 4 6 +3V3 D9 ESDA6V1-5SC6

Figure 28. Physical control peripherals and microSD™ card microSD™ and Physical Figure peripherals 28. control

6

5

4 2

3 1 WAKEUP PC13 Wakeup & Key Button PK2 PK3 PK4 PK5 PK6

B2 USER R215 330

1 2

R214 220K

4 3 +3V3 Buttons R216 100 D10 ESDA7P60-1U1M C151 [N/A]

JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP 1 2 Joystick

44/61 UM2411 Rev 4 UM2411 Schematic diagrams 10 15 Revision: MB1248 D.2 STM32H7-DK PMOD_STMod+ connector A4 1/21/2019 Title: Project: Size:Date: Reference: Sheet: of DFSDM_CKOUT DFSDM_DATIN7 DFSDM_DATIN2 DETECTn MEMS_LED PMOD#11-INT PMOD#12-RST PMOD#13-ADC PMOD#14-PWM PMOD#17-DF-D3 PMOD#18-DF-CKOUT PMOD#19-DF-D7 PMOD#20-DF-CK7 PMOD#9 PMOD#11 PMOD#12 PMOD#18 PC6 PJ13 PA4 PF8 PC7 PD3 PB9 PB8 PC6 PJ13 PD3 PB14 +3V3 PMOD#11 PMOD#12 PMOD#14 PMOD#17 PMOD#18 PMOD#19 +3V3 PMOD#11 PMOD#12 7 8 9 2 4 6 8 11 11 13 15 10 12 12 14 16 17 18 19 20 10 12 14 16 18 20 1 2 3 4 5 6 1 2 3 4 5 6 7 8 9 10 1 3 5 7 9 11 13 15 17 19 PMOD STMod+ P3 P2 CN17 FHCS44-210 SSW-106-02-F-D-RA SQT-110-01-F-D-RA ATOM FH254206C-1600 ATOM FH200210C-12000 Connector Audio Receptacle TH 10X2 VT 1.27mm +5V SB40 PC7PC3 PB9 +3V3 PMOD#1 PMOD#2 PMOD#3 PMOD#4 PMOD#1 PMOD#2 PMOD#3 PMOD#4 PMOD#9 PMOD#2 PMOD#17 PMOD#19 PMOD#18 SB32 SB31 SB34 SB33 SB36 SB35 SB38 SB37 DFSDM_CKOUT DFSDM_DATIN3 DFSDM_DATIN1 Figure 29. Pmod, STMod+ and audio connectors and STMod+ Pmod, Figure 29. PA11 PA0 PC3 PD5 PC2 PD6 PA12 PD4 PD12 PB15 PB14 PD13 PMOD#1-NSS PMOD#1-CTS PMOD#2-MOSIp PMOD#2-TX PMOD#3-MISOp PMOD#3-RX PMOD#4-SCK PMOD#4-RTS PMOD#7-SCL PMOD#8-MOSIs PMOD#9-MISOs PMOD#10-SDA

UM2411 Rev 4 45/61 Schematic diagrams UM2411 12 15 Revision: MB1248 D.2 STM32H7-DK TAG Connector A4 1/21/2019

Title: Project: Size:Date: Reference: Sheet: of

5

4

2

3 1 D11 ESDALC6V1W5 10 9 8 7 6 CN16 NO Fitted: TC2050-IDC-NL 1 3 5 2 4 Figure 30. TAG debug connector debug 30. TAG Figure +3V3 Only footprint with Cable: TC2050-IDC-NL

PA13 PA14 PB3 PA15 PB4

5

4 2

R208 22 R207 22 R206R212 22 R211 22 R210 22 22 3 1 D12 ESDALC6V1W5 TMS/SWDIO TCK/SWCLK TDO/SWO TDI TRST RESET#

46/61 UM2411 Rev 4 UM2411 Schematic diagrams 13 15 Revision: MB1248 D.2 5_MOSI STM32H7-DK Arduino connectors A4 1/21/2019 C18 [N/A] Title: Project: Size:Date: Reference: Sheet: of 8_RX VREF+ I2C4_SCL I2C4_SDA SPI5_SCK SPI5_MISO SPI TIM1_CH2N, SPI5_NSS TIM1_CH1, TIM8_CH2 TIM3_CH1 TIM13_CH1 UART8_TX UART TIM8_CH2N R43 [N/A] ARD_D15 ARD_D14 ARD_D1 ARD_D5 ARD_D3 ARD_D9 ARD_D8 ARD_D7 ARD_D6 ARD_D4 ARD_D2 ARD_D0 ARD_D11 ARD_D13 ARD_D12 ARD_D10 PK0 PJ11 PJ10 PK1 PJ6 PJ5 PJ0 PJ7 PA6 PJ4 PJ3 PJ8 PJ9 PD12 PD13 PF8 1 1 5 3 5 3 9 8 7 6 4 2 8 7 6 4 2 10 CN5 CN6 SSW-108-22-x-S-VS SB5 D4 D8 D2 D7 GND AVDD TX/D1 RX/D0 SCL/D15 SDA/D14 SCK/D13 R45 1M PWM/D9 PWM/D3 PWM/D6 PWM/D5 MISO/D12

PWM/CS/D10 Uno Uno connector

SSW-110-22-x-S-VS G 1 PWM/MOSI/D11 ®

T1 BSN20BK SD 3 2

POWER AIN Arduino uno connector Arduino IOREF NRST 3V3 5V GND GND VIN A0 A1 A2 A3 A4 A5 2 1 2 3 4 5 6 7 8 1 2 3 4 5 6 SAMTEC SSW-106-22-x-S-VS CN8 SSW-108-22-x-S-VS CN9 LD6 Green R120 1K 1 E5V VIN +3V3 R46 510 +5V PA4 PF10 PA0_C PA1_C NRST Figure 31. ARDUINO Figure 31. SB23 SB6 +3V3 NRST ARD_A1 ARD_A3 ARD_A0 ARD_A2 SB24 SB7 PD13 PD12 PC2_C PC3_C WARNING voltage applied to <11.5V VIN ADC12_IN4 ADC3_IN8 ADC12_IN0 ADC12_IN1 ARD_A5 ARD_A4 I2C4_SDA I2C4_SCL ADC3_IN1 ADC3_IN0

UM2411 Rev 4 47/61 Schematic diagrams UM2411 T_VCP_TX T_VCP_RX +3V3 11 15 T_NRST T_SWDIO T_SWCLK T_SWO T_PWR_EXT T_PWR_EN T_VCC Revision: 4K7 4K7 R83 MCO MB1248 D.2 T_NRST T_SWDIO T_SWCLK T_SWO T_VCP_TX T_VCP_RX T_PWR_EXT T_PWR_EN R86 100 20pF C55 Fitted: NO Fitted: R96 STM32H7-DK STLink_V3E_Module A4 1/21/2019 Title: Project: Size:Date: Reference: Sheet: of 100 JP4 Fitted: NO Fitted: R104 T_SW_DIR T_PWR_EXT T_PWR_EN LED_STLK T_SWDIO_IN T_SWDIOa T_SWCLKa T_SWOa STLK_VCP_RX STLK_VCP_TX GNDDetect T_NRSTa 2 N12 M11 C10 L2 R4 R5 N3 R3 K13 C4 P4 D12 F15 D15 A7 D4 D15 ESDALC6V1W5 LED_STLK 1 5 3 4 MCO/PA8 T_SWO/PD2 T_NRST/PA5 R113 330 R114 330 T_SWCLK/PH6 HW_TYP_1/PI5 HW_TYP_0/PI4 T_SW_DIR/PA7 GNDDetect/PG5 T_VCC AIN/PA0 LED_STLK/PA10 T_PWR_EXT/PB1 T_PWR_ENn/PB0 T_SWDIO_IN/PH7 T_SWDIO_OUT/PF9 VCP_STLK_RX/PG9 2 3 VCP_STLK_TX/PG14 STLK_SWDIO STLK_SWCLK T_VCP_RX T_VCP_TX Red Green LD10 LD_BICOLOR_CMS 1 4 USB_DEV_HS_N USB_DEV_HS_P 2 Impedance Constraint [Min = 85.00Matched Net [Tolerance Lengths Max 0.2mm] = = 95.00 ] 3V3_STLK i i D14 ESDALC6V1W5 USB USB 1 5 3 4 STLK_SWDIO/PA13 STLK_SWCLK/PA14 USB_DEV_HS_N/PB14 USB_DEV_HS_P/PB15 OSC_IN/PH0 OSC_OUT/PH1 NRST BOOT0 PDR_ON OSC32_IN/PC14 OSC32_OUT/PC15 V12_OTGPHY/PG7 REXT_OTGPHY/PG6 ST-LINKV3E_SWD U9A J1 F1 E1 G1 H1 C6 D6 J15 J14 R15 A15 R14 A14 2 3 1 T_NRST T_SWDIO T_SWCLK T_SWO 3K GND D-out D+out R112 10K 2.2uF R100 Figure 32. 32. STLINK-V3E module Figure STLK_SWDIO STLK_SWCLK USB_DEV_HS_N USB_DEV_HS_P 10K R111 NC D-in D+in ECMF02-2AMX6 U1 C43 5 4 6

Header 4x1 C52 100nF

4

3 T_SWDIOa T_SWCLKa T_SWOa T_NRSTa STLK_VCP_RX

2 1 i i USB USB

D3 ESDA7P60-1U1M CN4 NO Fitted: 3V3_STLK

JP1

1 2 Fitted: NO Fitted: Silkscreen = Reserved R217R218 22 R219 22 22 R220R221 22 22 Must on be a border or the PCB. 3V3_STLK C6 100nF Fitted: NO Fitted: Closed to Pin1 of Mirco-B T_SWDIO T_SWCLK T_SWO T_NRST USB_DEV_HS_CN_N USB_DEV_HS_CN_P 100 2 4 6 8 10 12 14 5V_USB_CHGR 5 10 11 3 4 2 1 6 7 8 9 1 3 5 7 9 11 13 CN13 R102 FTSH-107-01-L-DV-K ID DP DM 3 2 EXP EXP GND VBUS Shield Shield Shield Shield STDC14 Receiver

FTSH-105-01-L-DV-K soldered centrally on the 14-pin footprint USB_Micro-B receptacle USB_Micro-B OUT GND T_VCP_RX T_VCP_TX T_VCC tect CN2 USB_uB_105017-0001 VDD EN X4 NZ2520SB-25.00M GNDDe 1 4 R222 22 +3V3 T_VCC must beT_VCC Target the of must connected to VDD_MCU to STLK_VCP_TX 100 R110 10K R95 3V3_STLK C61 100nF

48/61 UM2411 Rev 4 UM2411 Schematic diagrams C144 100nF 3V3_STLK 1uF C145 5

C142 10nF

15 15 4 BYPASS Revision:

LDK120M33R 2 GND INH Vin Vout U20 3.3 Volts ST-LINK 100nF C147 1 3 MB1248 D.2 C148 1uF STM32H7-DK STLink_V3E_PWR A4 1/21/2019 Title: Project: Size:Date: Reference: Sheet: of BAT60JFILM BAT60JFILM BAT60JFILM BAT60JFILM D7 D6 D8 D5 100nF C122 E5V VBUS_HS C128 1uF 5V_USB_PWR 5V_USB_CHGR C123 4.7uF 3V3_STLK U9B ST-LINKV3E_SWD C137 100nF M1 H6 H7 H8 H9 H10 J6 J7 J8 J9 J10 K6 K7 K8 K9 K10 F12 D5 G2 M8 N1 C141 100nF

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSSA

VREF- G9

VSS VSS

G8 M9

VSS VSS

G12 G7 C139 100nF

VSS VSS

G6 D8

VSS VSS

F10 D7

VSS VSS

F9 F2

VSS VSS

H12 F8 C138 100nF

VSS VSS

F7 D9

VSS VSS

F6 G10 C125 100nF VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDA VREF+ VBAT BYPASS-REG VCAP1 VCAP2 F3 P1 R1 C1 C5 L4 G3 C8 C7 C9 K4 N8 N9 J13 J12 F13 C129 100nF G13 H13 N10 M10 Figure 33. STLINK-V3E power C136 2.2uF 3V3_STLK C126 100nF C127 2.2uF C124 100nF Ceramic capacitor (Low ESR) R94 10K SB18 5V_USB_STLK 3V3_STLK C63 100nF C140 100nF 5 Volts 5 Volts ST-LINK LED Curr=4mA,LED Lum=25% C66 100nF SB13 1 3 3V3_STLK LD9 RED C133 100nF OUT

STMPS2151STR FAULT 2 R85 R84 4K7 2K7 GND R109 100K R106 820 +5V C130 100nF IN EN U10 5 4 C135 100nF T_PWR_EN T_PWR_EXT R107 10K C134 100nF C53 1uF 5V_USB_CHGR T_PWR_EN T_PWR_EXT T_PWR_EN C132 100nF C131 100nF 3V3_STLK

UM2411 Rev 4 49/61

Schematic diagrams UM2411

B receptacle B USB_Micro-A

T1_G 3 G LD7 Green T3 STT4P3LLH6[N/A]

Backup footprint for T4 D VBUS DM DP ID GND Shield Shield Shield Shield EXP S

T5 9013

R71 330

CN1 475900001 2 3 2 1 14 15 +3V3 1 1 5 3 5 2 4 6 7 8 9 4 2 6 10 1 Revision: L1 BLM18PG121SN1D +1V8 +3V3 R61 22K T1_D VBUS_HS R66 47K C2 100nF C5 100nF MB1248 D.2 R32 10K OTG_HS_OverCurrent C4 100nF C1 100nF 1 D2 [N/A] T2 9013 R31 10K

R58 1K

A1 B1 3 2

STM32H7-DK

+3V3 +3V3 B2 A2 USB_OTG_HS A4 1/21/2019 C7 4.7uF PJ1 R17 620

Title: Project: Size:Date: Reference: Sheet: of

D1 [N/A] G 4

B1 1 A1

L2 BLM18PG121SN1D T4 STS5PF30L A2 B2 D S R13 3K3 LD5 Red 1 3 5 2 2 6 7 8 R7 0 T1_D T1_G C14 100nF 3 1 R34 [N/A] R33 0 OUT FAULT USB_VDDIO R12 820 GND IN EN U2 STMPS2151STR C82 2.2uF 5 2 4 C83 100nF +5V R11 10K C12 100nF +1V8 C85 100nF +5V REFSEL0 REFSEL1 REFSEL2 R16 0 R14 [N/A] R10 8K06_1% 20 33 11 21 23 19 30 28 12 17 32 8 14 18 22 24 ID DP NC DM VBUS CPEN VBAT RBIAS VDDIO VDD3.3 VDD1.8 VDD1.8 REFSEL1 REFSEL0 REFSEL2 GNDPAD R25 0 R22 [N/A] Figure 34. USB_OTG_HS port USB_OTG_HS Figure 34. NXT DIR STP CLKOUT D7 D6 D5 D4 D3 D2 D1 D0 XO REFCLK SPK_L SPK_R RESETB U4 USB3320C-EZK 1 5 3 2 9 7 6 4 31 13 25 15 29 10 26 16 27 REFSEL0 REFSEL1 REFSEL2 R41 0 R30 [N/A] R137 4K7 R138 100K USB_VDDIO USB_VDDIO R21R27R29 0 R42 0 R40 0 R39 0 R38 0 R37 0 0 0 R136 [N/A] +3V3 ULPI_D7 ULPI_D6 ULPI_D5 ULPI_D4 ULPI_D3 ULPI_D2 ULPI_D1 ULPI_D0 R23 51 R36R28R26 0 R35 0 0 33 SB30 PB5 PB13 PB12 PB11 PB10 PB1 PB0 PA3 SB30 closed if reset is controlled by hardware PH4 PI11 PC0 PA5 OSC_24M RESET# ULPI_D[0..7] 3 2 ULPI_NXT ULPI_DIR ULPI_STP ULPI_CK R24 51 OUT GND VDD EN ULPI_D[0..7] X1 NZ2520SB-24.00M 1 4 OSC_24M R9 10K C11 100nF +3V3

50/61 UM2411 Rev 4 UM2411 STM32H747I-DISCO I/O assignment

Appendix A STM32H747I-DISCO I/O assignment

Table 22. STM32H747I-DISCO I/O assignment Pin GPIO port GPIO primary interface

A1 VSS - A10 PG9 QSPI_BK2_IO2 A11 PD5 PMOD#2- USART2_TX A12 PD4 PMOD#4- USART2_RTS A13 PC10 SDIO1_D2 A14 PA15 JTDI A15 PI1 FMC_D25 A16 PI0 FMC_D24 A17 VSS - A2 PI6 FMC_D28 A3 PI5 FMC_NBL3 A4 PI4 FMC_NBL2 A5 PB5 ULPI_D7 A6 VDDLDO - A7 VCAP - A8 PK5 JOY_RIGHT A9 PG10 DCMI_D2 B1 VBAT - B10 PJ15 Audio_INT B11 PD6 PMOD#3- USART2_RX B12 PD3 PMOD#18_DFSDM_CKOUT/DCMI_D5 B13 PC11 SDIO1_D3 || DCMI_D4 B14 PA14 JTCK-SWCLK B15 PI2 FMC_D26 B16 PH15 FMC_D23 B17 PH14 FMC_D22 B2 VSS - B3 PI7 FMC_D29 B4 PE1 FMC_NBL1 B5 PB6 HDMI_CEC B6 VSS - B7 PB4 NJTRST

UM2411 Rev 4 51/61

60 STM32H747I-DISCO I/O assignment UM2411

Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

B8 PK4 JOY_LEFT B9 PG11 ETH_/TX_EN/TX_EN C1 PC15-OSC32_OUT OSC32_OUT C10 VSS - C11 PD7 SPDIF_RX0 C12 PC12 SDIO1_CK C13 VSS - C14 PI3 FMC_D27 C15 PA13 JTMS-SWDIO C16 VSS - C17 VDDLDO - C2 PC14-OSC32_IN OSC32_IN C3 PE2 ETH_nINT || SAI4_CK1 C4 PE0 FMC_NBL0 C5 PB7 DCMI_VSYNC C6 PB3 JTDO/TRACESWO C7 PK6 JOY_UP C8 PK3 JOY_DOWN C9 PG12 ETH_/TXD1/TXD1 D1 PE5 SAI1_SCK_A D10 PJ14 DCMI_PWR_EN D11 PJ12 BL_CTRL D12 PD2 SDIO1_CMD D13 PD0 FMC_D2 D14 PA10 VCP-USART1_RX D15 PA9 VCP-USART1_TX D16 PH13 FMC_D21 D17 VCAP - D2 PE4 SAI1_FS_A D3 PE3 SAI1_SD_B D4 PB9 PMOD#19_DFSDM-DATA7 || DCMI_D7 D5 PB8 PMOD#20_DFSDM-CK7 || DCMI_D6 D6 PG15 FMC_SDNCAS D7 PK7 TOUCH_INT D8 PG14 QSPI_BK2_IO3

52/61 UM2411 Rev 4 UM2411 STM32H747I-DISCO I/O assignment

Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

D9 PG13 ETH_/TXD0/TXD0 E1 VLXSMPS - E10 PJ13 PMOD#12_GPIO E11 VDD - E12 PD1 FMC_D3 E13 PC8 SDIO1_D0 E14 PC9 SDIO1_D1 || DCMI_D3 E15 PA8 CEC_CK || MCO1 E16 PA12 PMOD#4-SPI2_SCK/2_CK E17 PA11 PMOD#1-SPI2_NSS/2_WS E2 PI9 FMC_D30 E3 PC13 TAMP_1/WKUP2 E4 PI8 uSD_Detect E5 PE6 SAI1_SD_A E6 VDD - E7 PDR_ON - E8 BOOT0 - E9 VDD - F1 VDDSMPS - F13 PC7 PMOD#17_DFSDM_DATA3/DCMI_D1 F14 PC6 PMOD#11_INT/DCMI_D0 F15 PG8 FMC_SDCLK F16 PG7 SAI1_MCLK_A F17 VDD33USB - F2 VSSSMPS - F3 PI10 FMC_D31 F4 PI11 ULPI_DIR F5 VDD - G1 PF2 FMC_A2 G10 VSS - G11 VSS - G13 VDD - G14 PG5 FMC_BA1 G15 PG6 QSPI_BK1_NCS G16 VSS -

UM2411 Rev 4 53/61

60 STM32H747I-DISCO I/O assignment UM2411

Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

G17 VDD50USB - G2 VFBSMPS - G3 PF1 FMC_A1 G4 PF0 FMC_A0 G5 VDD - G7 VSS - G8 VSS - G9 VSS - H1 PI12 LED1 H10 VSS - H11 VSS - H13 VDD - H14 PG4 FMC_BA0 H15 PG3 DSI_Reset H16 PG2 FMC_A12 H17 PK2 JOY_SEL H2 PI13 LED2 H3 PI14 LED3 H4 PF3 FMC_A3 H5 VDD - H7 VSS - H8 VSS - H9 VSS - J1 PH1 - OSC_OUT OSC_OUT J10 VSS - J11 VSS - J13 VDD - J14 PK0 ARD_D13-SPI5_SCK J15 PK1 ARD_D10-SPI5_NSS || TIM1_CH1 J16 VSS - J17 VSS - J2 PH0 - OSC_IN OSC_IN J3 VSS - J4 PF5 FMC_A5 J5 PF4 FMC_A4

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Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

J7 VSS - J8 VSS - J9 VSS - K1 NRST NRST K10 VSS - K11 VSS - K13 VDD - K14 PJ11 ARD_D12-SPI5_MISO K15 VSSDSI - K16 DSI_D1P - K17 DSI_D1N - K2 PF6 QSPI_BK1_IO3 K3 PF7 QSPI_BK1_IO2 K4 PF8 PMOD#14_PWM || ARD_D3-TIM13_CH1 K5 VDD - K7 VSS - K8 VSS - K9 VSS - L1 VDDA - L10 VSS - L11 VSS - L13 VDD - L14 PJ10 ARD_D11-SPI5_MOSI || TIM1_CH2N L15 VSSDSI - L16 DSI_CKP - L17 DSI_CKN - L2 PC0 ULPI_STP L3 PF10 ARD_A1 L4 PF9 QSPI_BK1_IO1 L5 VDD - L7 VSS - L8 VSS - L9 VSS - M1 VREF+ - M13 VDD -

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60 STM32H747I-DISCO I/O assignment UM2411

Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

M14 PJ9 ARD_D0-UART8_RX M15 VSSDSI - M16 DSI_D0P - M17 DSI_D0N - M2 PC1 ETH_MDC || SAI4_D1 M3 PC2 PMOD#3-SPI2_MISO/2_SDI M4 PC3 PMOD#2-SPI2_MOSI/2_SDO M5 VDD - N1 VREF- - N10 VDD - N11 VDD - N12 VDD - N13 PJ8 ARD_D1-UART8_TX N14 PJ7 ARD_D6-TIM8_CH2N N15 PJ6 ARD_D9-TIM8_CH2 N16 VSS - N17 VCAPDSI - N2 PH2 QSPI_BK2_IO0 N3 PA2 ETH_MDIO N4 PA1 ETH_/RX_CLK/REF_CLK/CLK N5 PA0 PMOD#1- USART2_CTS_NSS N6 PJ0 ARD_D7 N7 VDD - N8 VDD - N9 PE10 FMC_D7 P1 VSSA - P10 PE11 FMC_D8 P11 PB10 ULPI_D3 P12 PB11 ULPI_D4 P13 PH10 FMC_D18 P14 PH11 FMC_D19 P15 PD15 FMC_D1 P16 PD14 FMC_D0 P17 VDDDSI - P2 PH3 QSPI_BK2_IO1

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Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

P3 PH4 ULPI_NXT P4 PH5 FMC_SDNWE P5 PI15 LED4 P6 PJ1 OTG_HS_OverCurrent P7 PF13 FMC_A7 P8 PF14 FMC_A8 P9 PE9 FMC_D6 R1 PC2_C ARD_A4 R10 PE12 FMC_D9 R11 PE15 FMC_D12 R12 PJ5 ARD_D8 R13 PH9 FMC_D17 R14 PH12 FMC_D20 R15 PD11 QSPI_BK1_IO0 R16 PD12 PMOD#7/ARD_D15-I2C4_SCL R17 PD13 PMOD#10/ARD_D14-I2C4_SDA R2 PC3_C ARD_A5 R3 PA6 ARD_D5-TIM3_CH1 || DCMI_PIXCLK R4 VSS - R5 PA7 ETH_/RX_DV/CRS_DV/SYNC R6 PB2 QSPI_CLK R7 PF12 FMC_A6 R8 VSS - R9 PF15 FMC_A9 T1 PA0_C ARD_A2 T10 PE13 FMC_D10 T11 PH6 FMC_SDNE1 T12 VSS - T13 PH8 FMC_D16 T14 PB12 ULPI_D5 T15 PB15 PMOD#8-SPI2_MOSI/2_SDO T16 PD10 FMC_D15 T17 PD9 FMC_D14 T2 PA1_C ARD_A3 T3 PA5 ULPI_CK

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Table 22. STM32H747I-DISCO I/O assignment (continued) Pin GPIO port GPIO primary interface

T4 PC4 ETH_/RXD0/RXD0/RXD T5 PB1 ULPI_D2 T6 PJ2 DSI_TE T7 PF11 FMC_SDNRAS T8 PG0 FMC_A10 T9 PE8 FMC_D5 U1 VSS - U10 PE14 FMC_D11 U11 VCAP1 - U12 VDDLDO - U13 PH7 FMC_SDCKE1 U14 PB13 ULPI_D6 U15 PB14 PMOD#9-SPI2_MISO/2_SDI U16 PD8 FMC_D13 U17 VSS - U2 PA3 ULPI_D0 PMOD#13_ADC || ARD_A0 || U3 PA4 DCMI_HSYNC U4 PC5 ETH_/RXD1/RXD1 U5 PB0 ULPI_D1 U6 PJ3 ARD_D2 U7 PJ4 ARD_D4 U8 PG1 FMC_A11 U9 PE7 FMC_D4

58/61 UM2411 Rev 4 UM2411 STMod+ GPIO sharing and multiplexing - - - - D0 D1 D5 D7 D6 DCMI HSYNC ------CK3 CK7 DATA7 CKOUT DFSDM ------A0 D3 ARD ------INT RST Pmod™ (2) Shared or exclusive functions exclusive or Shared - - - - ADC3_IN6, TIM13_CH1 ADC3_IN6, Some other Alternate Functions Alternate other Some ADC12_IN4, TIM5_ETR, DAC1_OUT TIM5_ETR, ADC12_IN4, TIM3_CH2, TIM8_CH2, USART6_RX TIM3_CH1, TIM8_CH1, USART6_TX TIM8_CH1, TIM3_CH1, TIM4_CH4, TIM17_CH1, CAN1_TX, I2C1_SDA CAN1_TX, TIM4_CH4, TIM17_CH1, I2C1_SCL CAN1_RX, TIM4_CH3, TIM16_CH1, ing it to the bus. INT +5V RST ADC GND PWM GPIO GPIO GPIO GPIO Basic ------SB * * PA4 +5V PF8 PB9 PC6 PC7 Port GND PJ13 PB8 PD3 11 12 13 14 15 16 17 18 19 20 (1) - Pins 1 2 3 4 5 6 7 8 9 STMod+ 10 address any new device when add address of PA0 +5V PD5 PC3 PD6 PC2 PD4 Port GND PA11 PA12 PB15 PB14 PD12 PD13 ------31 32 33 34 35 36 37 38 SB +5V GND TXS2 SCL4 NSS2 RXS2 SDA4 SCK2 Basic MOSI2 MISO2 MOSI2 MISO2 RTSS2 CTSS2

slave devices. Check the slave devices. Check slave the (2) Table 23. STMod+ GPIO sharing and multiplexing multiplexing and GPIO sharing 23. STMod+ Table - - TIM4_CH1 TIM4_CH2 USART2_TX CAN1_RXFD ADC123_IN13 ADC123_IN12 ADC123_INO, TIM5_CH1 ADC123_INO, CNA1_RX, USART1_CTS CAN1_TXFD, USART2_RX CAN1_TXFD, Some other Alternate Functions Alternate other Some TIM1_ETR, CAN1_TX, USART1_RTS CAN1_TX, TIM1_ETR, TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART1_TX TIM12_CH1, TIM8_CH2N, TIM1_CH2N, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USART1_RX TIM12_CH2, TIM8_CH3N, TIM1_CH3N,

Shared or exclusive functions or exclusive Shared

------Uno Uno = Pmod™ Functions = Alternate = STMod+ = CAM = DCMI = Supply = GND TXS3 RXS3 SCK2 CSN2 ® MISO2 MOSI2 RTSS3 CTSS2 Pmod™

------gives the description of the signals available on the STMod+ connector. on the STMod+ available the signals of description the gives ARD SCL4 SDA4 C bus on pins 19 / 20 might be shared with built-in Discovery built-in be shared with C bus / 20 might on 19 pins 2 RTSS2 stands for USART2_RTS, for stands RTSS2 USART2_CTS, for stands CTSS2 for USART2_RX, stands RXS2 USART2_TX, for stands TXS2 SPI2_MOSI, for stands MOSI2 SPI2_MISO, for stands MISO2 SPI2_NSS, for stands NSS2 SPI2_SCK, for stands SCK2 I2C4_SDA, for stands SDA4 I2C4_SCL, for stands SCL4 RESET, for RST stands INTERRUPT. forINT stands Table 23 Table The I The It also shows which signal is shared with other board connector or function. board connector also shows which is It with other signal shared ------= DFSDM = DFSDM ARDUINO = CK2 DATA1 DATA1 DATA2 CKOUT DFSDM Legend: 1. 2. Appendix B STMod+ GPIO sharing and multiplexing

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Revision history

Table 24. Document revision history Date Revision Changes

23-Nov-2018 1 Initial version Updated schematics from Figure 20 to Figure 34 in Chapter 7: Schematic diagrams. Updated board views in Figure 1, Figure 2, and Figure 3 in the cover page. 29-Mar-2019 2 Reorganized Chapter 2: Ordering information and Chapter 3: Development environment. Updated Table 1: Ordering information. Added Section 2.1: Product marking and Section 2.2: Codification. Updated Quad-SPI Flash memory device reference in 10-Sep-2019 3 Section 5.9: Quad-SPI Flash memory. Updated Section 5.7: Ethernet for Ethernet setting; Added Table 5: Ethernet related solder bridge and 3-Jan-2020 4 resistor settings. Updated Section 5.2.3: SMPS/LDO power supply with hardware/firmware mismatch deadlock recovery.

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