History of Electronic

1642–1945 Mechanical Era

1946– Electronic Age: divided into 4/5 generations

1 / 28 Key Developments/Relationships

History

Electromechanical Electronic

Z1, ENIAC Cryptanalytic Machines Konrad Zuse J.P. Eckert & (not much info, classified) (Germany) J.W. Mauchly * special purpose, 1938−41 1946 & * COLOSSUS (1943) allied code−breaker George Stibitz Bell Labs (USA) 1937−43

Mark I, II Howard Aiken EDSAC EDVAC ACE Harvard/IBM (USA) M.V. Wilkes J. von Newmann A. Turing 1939−44 Cambridge (England) Princeton 1946−47 1947−49 1946−52

2 / 28 Electromechanical Systems

3 / 28 Konrad Zuse

I worked independently of England and U.S.

I Z3 (1941): first operational, program controlled,

I pgm control: tape, 8 /command

I arithmetic unit: binary, floating point, word length 22-bits (sign, 7- exponent, 14-bit mantissa), builtin operations: +, -, ×, ÷, square root, times (2, .5, 10, 0.1, -1)

I store: 64 words

I output: lamp display w/ 4 places and decimal point

4 / 28 Zuse (continued)

I Z3 destroyed in 1944 air raid

I believed to have independently developed ideas of:

I binary arithmetic — Liebniz

I program control — Babbage

I instruction formats — Ludgate

I floating point representation — Torres

I lacked idea of conditional branch

5 / 28 H. Aiken ()

I Mark I (1940–1944) 1. Decimal Arithmetic 2. punched paper tape for program control 3. 2-address instructions

I Mark II (1944–1947) 1. floating point numbers 2. multiple arithmetic units, usable simultaneously

6 / 28 Stibitz

I Complex Computer (1938–1940) 1. complex numbers: +, -, ×, ÷ 2. binary arithmetic 3. automatic decimal/binary conversions

I (1939–1943) 1. BCD number representation 2. Error detecting codes

7 / 28 Electronic Computers: Instantiation

John Atanasoff (1939): applied mathematician, Iowa State Univ

I designed special purpose machine to solve “large” systems of linear equations

I claims to be first with operational electronic computer, largely unrecognized J.P. Eckert and J. Mauchly

I Moore School of , Univ of I ENIAC (1945)

I first general purpose computer I not stored program

8 / 28 ENIAC

1. technology (18,000) 2. 3. 20 word memory (A1, A2, ..., A20) called accumulators 4. word size, 10-digits 5. programmed by manual switches/plugboards

9 / 28 EDVAC (1945–1951)

First stored program computer design, conceived because ENIAC:

I difficult to program

I limited memory capacity

I slow memory access

First draft report of EDVAC written by in 1945; therefore he is credited w/ developing stored program concept.

10 / 28 Moore School Lectures (summer 1946)

Moore School Lectures Subject: EDVAC

EDSAC (1949) IAS (1952) EDVAC (1951) Eckert & Mauchly M.V. Wilkes J. von Neumann (built by others BINAC (1950) Cambridge U. Inst. for Advanced Study at Moore School) UNIVAC (1951) (taken over by Sperry Rand Co; for several years was undisputed leader of U.S. computer market)

11 / 28 Major Generations in the

Evolution of Electronic Computing

12 / 28 First Generation (1946–1954)

Technology: vacuum tubes, acoustic/CRT memories

Hardware/Arch: centralized control, fixed point arithmetic

Software: assembly languages

13 / 28 First Generation: Examples

I EDSAC (1949) Cambridge U.

I memory hierarchy (primary memory to drum) I floating point emulators provided as system routines

I ISA (1952) Princeton

I CRT memory allowing entire word access as one operation

I (1951) MIT

I ferrite core memory

14 / 28 First Generation (cont)

I UNIVAC I (1951)

I magnetic tapes w/ ability to read fwd/bkwd, and w/ buffering and error checking capabilities. I because of slow mercury was rapidly replaced w/ ferrite core based UNIVAC II (1957) I first successful computer I Grace Hopper: Mathematic → Algol, Flowmatic → COBOL

I IBM 701 (1953)

I disk and tape secondary memories

I MADM (?) Manchester U.

I index registers

15 / 28 First Generation (cont)

I IBM 704 (1955)

I hardwired floating point arithmetic (first) I indirect addressing (first)

Memory sizes in this era will still quite limited. Therefore, some machines were constructed with drum memories (e.g., IBM 650 (1954)). Because of slow access, the assembly operations were place at strategic points on drum — at first by hand, later by programs (e.g., SOAP).

16 / 28 Second Generation (1955–1964)

Occurred primarily due to technological advances (transistor).

Technology: discrete transistor, ferrite core memories, magnetic drums.

Hardware/Arch: floating point arith, index registers, I/O processors.

Software: High Level Languages (, COBOL, ALGOL, LISP), system software (e.g., compilers, libraries, batch monitors).

17 / 28 Second Generation: Examples

I UNIVAC 1103 (1956)

I floating point hardware I program interrupts (first) I IBM 709 (1959)

I hundreds sold at several million dollars each I IBM 1401 (1961)

I 20,000 sold I Honeywell H-800 (?)

I replaced 1401 w/ movement to S/360 I IBM 7094 (?)

I data channels I EDSAC II (?)

I micro-programming (first)

18 / 28 Second Generation (cont)

I CDC 6600 (1964)

I multi-functional units I Burroughs B-5000 (1963)

I designed to efficiently support Algol-60 (first lang directed arch) I (1962) Manchester U.

I virtual memory (first) I IBM Stretch (1961)

I attempted to push state-of-the-art to the limit I instr. lookahead and partial execution I interleaved memory I hardware support for protecting multiprogrammed tasks I Burroughs D-825 (1962)

I first multiprocessor I 2 processors connected to 16 memories (crossbar)

19 / 28 Second Generation (cont)

This generation also sees the introduction and widespread use of HLLs (high level languages):

FORTRAN (54–57) ALGOL (58–62) introduction of BNF COBOL (59–60) DOD enforced as standard LISP (60–65) MIT

20 / 28 Third Generation (1965–1975)

Caused primarily by: 1. development of SSI and MSI integrated circuits, 2. generalized use of micro-programming to implement instruction sets, and 3. the generalization of multiprogrammed operating systems. Technology: integrated circuits (SSI, MSI), semiconductor memories Hardware/Arch: micro-programming, pipelining, multiprogramming, multiprocessing Software: timesharing, virtual memory, O/S

21 / 28 Third Generation: Examples

I CTSS (early 1960’s) MIT

I time sharing I IBM S/360 (1965)

I architecture family I micro-programming I MU 5 (?)

I pipelining I ILLIAC IV

I array processing (4 quadrants of 64 processors; only 1 quadrant built)

22 / 28 Notes for 3rd Generation

multiprogramming: overlapped execution of different pgms w/ 1 CPU timesharing: multiprogramming system that allows for many interactive users multiprocessing: machines that provide for concurrent execution of programs by multiple CPUs

SSI ∼ 10 gates/chip MSI ∼ 10-100 gates/chip LSI ≤ 10,000 gates/chip

23 / 28 Fourth Generation

Technology: LSI, VLSI, bit-slice logic

Hardware/Arch: large scale multiprocessors, multicomputers, language directed architectures (including RISCs), distributed system architectures (including LANs), fault tolerant processors

Software: distributed operating systems, advanced compiler optimization techniques, electronic mail networks, concurrent HLLs

24 / 28 Fourth Generation: Examples

I SYMBOL (1971) Fairchild

I HLL directed architecture (SPL) I migration of virtually all s/w (including compiler) into h/w I only one built I C.mmp (1977) CMU

I multiprocessor (16 PDP-11’s connected by crossbar to 16MM) I Cm* (1979) CMU

I multicomputer (interconnected clusters of processors; each processor has own memory; hierarchical communication structure) I Intel iAPX 432 (1980)

I 2 VLSI chips with 160,000 transistors I load balancing I object oriented arch

25 / 28 Fourth Generation (cont)

I HP 3000 (?)

I I Burroughs B1700 (?)

I multiple-language directed architecture (COBOL, RPG, FORTRAN, Basic, and SDL) I bit addressable memory (length specified); variable size ALU I dynamically swappable micro-program I on low end machines, micro-program resides in MM

I RISC I, II (1982, 1983) Berkley

I MIPS (1982) Stanford

I IBM 801 (1982)

26 / 28 Significant Publications:

Leading to Quantitative Analysis for Systems Design

I D. E. Knuth, “An empirical study of FORTRAN programs,” Software: Practice and Experience, 1 105–133, 1971.

I Manolis G. H. Katevenis, Reduced Instruction Set Computer Architectures for VLSI, 1985.

I J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann Publishers, Inc., San Mateo, California, (all editions).

27 / 28 Further Readings

I Randell, B. (ed), The Origins of Digital Computers, 1975.

I Shurkin, J. Engines of the Mind, 1985.

I Wilkes, M.V. Automatic Digital , 1956.

I Annals of the History of Computers.

I Rosen, S., “Electronic Computers: A Historical Survey,” ACM Computer Surveys, Vol 1, No 1, 7–36, March 1969.

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