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VPPD-04002. 1.2 1/17 Contents
1 Revision History ...... 1 1.1 Revision 1.2 ...... 1 1.2 Revision 1.1 ...... 1 1.3 Revision 1.0 ...... 1 2 Flash Design for VCore-III ...... 2 2.1 Hardware Design ...... 2 2.1.1 Flash Support ...... 2 2.1.2 Supported Flash Types ...... 2 2.1.3 Add New Flash Types ...... 2 2.2 Flash Programming ...... 2 2.2.1 Installing Software from Scratch: How to Flash a Board ...... 3 2.2.2 Upgrading Software from Within an Existing Installation ...... 3 2.2.3 Updating an Existing Board with New RedBoot (CLI) ...... 3 2.3 Flash Layout ...... 3 2.3.1 Flash Layout (32 MB) ...... 4 2.3.2 Flash Layout (16 MB) ...... 4 2.4 Creating a Flash Image ...... 4 2.5 Flash Size Recommendations ...... 6
ENT-AN1144 Application Note Revision 1.2 iii Tables
Table 1 Flash Layout Detail (32 MB) ...... 4 Table 2 Flash Layout Detail (16 MB) ...... 4 Table 3 Recommended Flash Size ...... 6
ENT-AN1144 Application Note Revision 1.2 iv Revision History
1 Revision History
The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication. 1.1 Revision 1.2 In revision 1.2 of this document, SPI programmer information was added. 1.2 Revision 1.1 In revision 1.1 of this document, the NAND and Flash requirements were added. 1.3 Revision 1.0 Revision 1.0 was the first publication of this document.
ENT-AN1144 Application Note Revision 1.2 1 Flash Design for VCore-III
2 Flash Design for VCore-III
This document provides guidelines for designing the SPI NOR flash on a Microsemi Enterprise or Carrier Ethernet switch. It includes hardware design and RedBoot bootloader update guidelines and is relevant for all VCore-III based Ethernet switches. Note: This document covers the WebStaX software package using eCos. Refer to AN1184 for information about WebStax for Linux. 2.1 Hardware Design The Vcore-III CPU boots from the Serial Interface (SI) and Serial Peripheral Interface (SPI). Initially the CPU uses 24-bit addressing for accessing 16 MB of data, but it can access a larger data area using 32-bit addressing after initial boot. Accessing the SPI NOR flash in 32-bit addressing mode is done under full CPU control (bit-banging). To make sure the SPI NOR flash is brought back to 24-bit addressing mode after a reset, the flash reset should be connected to the switch reset signal through a resistor. For SPI flash programming, a pin header can be used for connecting a flash programmer. The switch reset signal needs to be held low for tri-stating the switch and allowing the flash programmer control of the SPI signals. In this case, the flash reset should not be active. For chip selecting the SPI NOR flash, SI_nEN is used. 2.1.1 Flash Support The bootloader (and eCos OS) supports m25p80 compatible SPI NOR flash and automatically detects the flash sector size and numbers of sectors through jedec id. 2.1.2 Supported Flash Types A list of supported SPI NOR flash types is found at: ecos/packages/devs/flash/spi/m25pxx/current/src/m25pxx.c The procedures in this document describe the single-chip flash designs. Designs using multiple flash chips are possible, but outside the scope of this document. 2.1.3 Add New Flash Types Adding a new NOR flash type is done by adding the jedec_id/sector_size/sector_count information into ecos/packages/devs/flash/spi/m25pxx/current/src/m25pxx.c Note: Both application code and bootloader need to be recompiled if NOR flash type is updated of added. 2.2 Flash Programming To support the WebStaX software package family, the NOR must be initialized with the following components. • Bootloader (RedBoot) • Configuration sections • Main eCos-based WebStaX image (dual images for fails-safe firmware upgrade) • RedBoot flash partition info (FIS) The process of initializing the NOR for operating the WebStaX software involves using a SPI NOR programmer with flash images created for the desired switch target system. The flash images are generated as described in Creating a Flash Image, page 4.
ENT-AN1144 Application Note Revision 1.2 2 Flash Design for VCore-III
2.2.1 Installing Software from Scratch: How to Flash a Board The procedure for installing the software from scratch on a new board involves using a SPI programmer. For more information about the requirements and the procedure, see the AN1184 application note. Although the application note is part of the Linux documentation, the information applies to eCos as well. 2.2.2 Upgrading Software from Within an Existing Installation If the system is already capable of booting and network connectivity, the Web GUI or CLI can be used to update the main application. To update the main application: log in and click Maintenance > Software > Upload, and upgrade using the eCos.dat firmware image. Use the firmware upgrade CLI command to upload the.dat firmware image. A TFTP or HTTP URL might be used to point the network location of the image. The CLI can be accesses by RS232 or SSH. 2.2.3 Updating an Existing Board with New RedBoot (CLI) To update an existing board using CLI, perform the following steps: 1. Ensure that the RedBoot image is available on a TFTP/FTP/HTTP server. 2. Ensure the necessary network connections and IP configuration to create connectivity to the TFTP/FTP/HTTP server. 3. Establish a CLI session on the system to be updated. 4. Enter the debug command enabler: platform debug allow. 5. Execute the debug firmware bootloader
Note: The debug command for older releases is in the vcli. Type debug vcl debug board. • Stackconf contains the switch configuration. • Syslog is the persistent system log that logs system events like port link-up or -down. • Crashfile contains the information stored after a software crash. For dual images (managed and managed.bk), 6 MB is allocated in a 16-MB flash layout and 12 MB is allocated in a 32-MB flash layout. The Diag area is used to store manufacturing diagnostic data. RedBoot reserves some partition names for internal use; namely: RedBoot, Redundant FIS, and FIS directory. These are created automatically by the fis init command and should not be used.
ENT-AN1144 Application Note Revision 1.2 3 Flash Design for VCore-III
2.3.1 Flash Layout (32 MB) The following table details characteristics of a 32 MB flash layout.
Table 1 • Flash Layout Detail (32 MB)
Name FLASH Address Mem Address Length Entry Point .FisValid 0x00000000 0x00000000 0x00000000 0x00000000 RedBoot 0x40000000 0x80080000 0x00020000 0xFFFFFFFF conf 0x40040000 0x00000000 0x00040000 0x00000000 stackconf 0x40080000 0x00000000 0x00100000 0x00000000 syslog 0x40180000 0x00000000 0x00040000 0x00000000 crashfile 0x401C0000 0x00000000 0x00040000 0x00000000 managed.bk 0x40200000 0x80040000 0x00C00000 0x800400BC managed 0x40E00000 0x80040000 0x00C00000 0x800400BC diag 0x41A00000 0x80040000 0x00300000 0x800400BC Redundant FIS 0x41FD0000 0x41FD0000 0x00010000 0x00000000 RedBoot config 0x41FE0000 0x41FE0000 0x00001000 0x00000000 FIS directory 0x41FF0000 0x41FF0000 0x00010000 0x00000000 2.3.2 Flash Layout (16 MB) The following table details characteristics of a 16 MB flash layout.
Table 2 • Flash Layout Detail (16 MB)
Name FLASH Address Mem Address Length Entry Point .FisValid 0x00000000 0x00000000 0x00000000 0x00000000 RedBoot 0x40000000 0x40000000 0x00020000 0x00000000 conf 0x40040000 0x00000000 0x00040000 0x00000000 stackconf 0x40080000 0x00000000 0x00100000 0x00000000 syslog 0x40180000 0x00000000 0x00040000 0x00000000 managed.bk 0x401C0000 0x80040000 0x00600000 0x800400BC managed 0x407C0000 0x80040000 0x00600000 0x800400BC redundant FIS 0x40FD0000 0x40FD0000 0x00010000 0x00000000 RedBoot config 0x40FE0000 0x40FE0000 0x00001000 0x00000000 FIS directory 0x40FF0000 0x40FF0000 0x00010000 0x00000000 2.4 Creating a Flash Image It is possible to create your own flash images by replacing individual sections with your own data as well as rearranging the standard flash layout through the flash_builder tool hosted on: https://github.com/vtss/flash_builder. The tool can be downloaded by executing git clone https://github.com/vtss/flash_builder.git on a Linux system. This will create a flash_builder/directory in the current directory. The tool is written in perl, and requires the YAML::Tiny module installed.
ENT-AN1144 Application Note Revision 1.2 4 Flash Design for VCore-III
The tool enables you to define a text template, outlining the flash layout.The tool produces a flash image with the same name in the out/ directory by running the script buildflash.pl with the text template as argument. The templates/ directory holds a number of flash layouts for a number of Microsemi reference boards. While defining a custom image, use the template matching eCos, the target switch of your choice, and the geometry of your designs flash device. The geometry is defined by the total size and erase block size of your flash chip. When you have found the best starting point for your template, copy the file to a new file, naming it to your liking. Here is the reference template ecos-jaguar2-cu8sfp16-32mb-64kb.txt: # Flash template: ecos-jaguar2-cu8sfp16-32mb-64kb # The first section describe the flash geometry: capacity, blocksize --- - capacity: 32M blocksize: 64K # # Subsequent sections describe individual flash sections: # - name: The FIS name. 1 to 15 characters # - size: Flash section size. Units 'M' or 'K' # - flash: Hex address of section # - entry: Hex address of execution entrypoint (optional) # - memory: Hex address of memory load address (optional) # - datafile: File name to load data from (optional) # - name: 'RedBoot' size: 256K flash: 0x40000000 datafile: artifacts/redboot-jaguar2.img - name: 'conf' size: 64K flash: 0x40040000 - name: 'stackconf' size: 256K flash: 0x40050000 - name: 'syslog' size: 256K flash: 0x40090000 - name: 'crashfile' size: 256K flash: 0x400d0000 - name: 'managed' size: 15744K flash: 0x40110000 memory: 0x80040000 entry: 0x800400bc datafile: artifacts/web_switch_jr2_ref.gz - name: 'managed.bk' size: 15744K flash: 0x41070000 memory: 0x80040000 entry: 0x800400bc datafile: artifacts/web_switch_jr2_ref.gz - name: 'FIS directory' size: 64K flash: 0x41fd0000 - name: 'RedBoot config'
ENT-AN1144 Application Note Revision 1.2 5 Flash Design for VCore-III
size: 4K flash: 0x41fe0000 datafile: files/fconfig-ecos.bin - name: 'Redundant FIS' size: 64K flash: 0x41ff0000 The comment lines in the files (starting with "#") describe the sections and define the keywords. A number of rules must be obeyed: • Let the bootloader be the first entry, as the system will start to execute from the start of the flash. • The last three sections should be left as it is—they are assumed to be at the fixed address by the bootloader. • The remaining sections may be shuffled around, resized, and initialized with data per your needs. • Flash sections may not overlap, but unused sections are perfectly OK. The following is a short example to modify the template and generate a new flash image. $ cp templates/ecos-jaguar2-cu8sfp16-32mb-64kb.txt templates/custom-jaguar2- cu8sfp16-32mb-64kb.txt $ vi templates/custom-jaguar2-cu8sfp16-32mb-64kb.txt
Table 3 • Recommended Flash Size
Description WebStaX SMBStaX ISTaX CEServices eCos only, No 16 MB SPI NOR. 16 MB SPI NOR 32 MB SPI NOR 32 MB SPI NOR customer Appl add eCos with 4 MB 16 MB SPI NOR 32 MB SPI NOR 32 MB SPI NOR 32 MB SPI NOR. customer Appl add 64 MB SPI NOR to ensure space for all performance data
ENT-AN1144 Application Note Revision 1.2 6