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Challenges in Debugging Dynamically Compiled Languages As Exemplified by C# Debugger for Tizen
Samsung R&D Institute Russia Center of System Software Challenges in debugging dynamically compiled languages as exemplified by C# debugger for Tizen Dmitri Botcharnikov 1 Agenda Dynamically compiled languages Tizen .NET Debugging Challenges Tizen .NET Debugger internals Future plans 2 Dynamically compiled languages Dynamically (Just-In-Time) compiled languages VM manages low-level details: memory allocation, exception handling But for debuggers… 3 Tizen .NET Visual Studio Tools for Tizen preview were released C# was added to Tizen Over 1,400,000 C# developers worldwide Tizen running on 50 millions Samsung devices (TV, wearables, mobile, IoT) http://developer.tizen.org 4 Technologies Tizen OS (emulator, platform-specific APIs) Xamarin.Forms .NET Core (CoreCLR, CoreFX, Roslyn) Visual Studio 2015 (Windows) 5 C# Compilation & Execution C# source MSIL Output CLR Roslyn JIT Language-specific compiler: C# => MSIL CLR JIT compiler: MSIL => native code 6 Debugging Challenges Source code to native code mapping ◦ C# compiler generates debugging information for source code to MSIL mapping Stepping in and over ◦ Stepping into not yet compiled code ◦ Managed exception handlers ◦ Lambdas, closures & iterators Local variables & arguments inspection ◦ C# compiler generates debugging information for MSIL variables 7 LLDB Subproject of LLVM (http://lldb.llvm.org) Native debugger builds on LLVM and Clang libraries Supports X86 and ARM architectures 8 SOS debugger plug-in Plug-in for LLDB (libsosplugin.so, libsos.so) Port of SOS.dll -
LLDB Tutorial: Adding Debugger Support for Your Target LLVM 2016 Tutorial
LLDB Tutorial: Adding debugger support for your target LLVM 2016 tutorial Deepak Panickal Andrzej Warzyński Codeplay Soware @codeplayso March 18, 2016 Outline • LLDB architecture crash course I Overview of LLDB I User scenarios such as breakpoints, stack-walking etc. I Debugging ps • Both generic and specialized architectures are covered I MSP430 lldb debugging, which we have implemented for this tutorial I github.com/codeplaysoftware/lldb-msp430 I ARM architecture is also referred to for the generic cases • Focusing on debugging ELF executables on Linux EuroLLVM 2016 Outline 2 / 54 Overview Part 1: The Basics Part 2: ELF And Architecture Support Part 3: Registers Part 4: Memory and Breakpoints Part 5: Other Key Features Part 6: Debugging Tips Part 7: MSP430 Quick Recap EuroLLVM 2016 Outline 3 / 54 Part 1 The Basics EuroLLVM 2016 Part 1: The Basics 4 / 54 LLDB - Architecture lldb user driver TCP Socket GDB RSP . lldb-server debug API Architecture of LLDB LLDB offers mulple opons: I user drivers: command line, lldb-mi, Python I debug API: ptrace/simulator/runme/actual drivers EuroLLVM 2016 Part 1: The Basics 5 / 54 lldb/lldb-server lldb • Runs on host • Interacts with the user • Understands symbols, DWARF informaon, data formats, etc. • Plugin architecture I ProcessGDBRemote, DynamicLoaderPOSIXDYLD, ABISysV_msp430 are some... lldb-server • Runs on both remote and host, communicates to lldb via RSP over whichever medium is available • Interacts with the hardware/simulator • Deals with binary data and memory addresses • Plugin architecture I ObjectFileELF, ProcessLinux, are some... EuroLLVM 2016 Part 1: The Basics 6 / 54 GDB Remote Serial Protocol • Simple, ASCII message based protocol • Designed for debugging remote targets • Originally developed for gdb<->gdbserver communicaon • Extended for LLDB, see lldb-gdb-remote.txt Packet structure: checksum $. -
Toolchains Instructor: Prabal Dutta Date: October 2, 2012
EECS 373: Design of Microprocessor-Based Systems Fall 2012 Lecture 3: Toolchains Instructor: Prabal Dutta Date: October 2, 2012 Note: Unless otherwise specified, these notes assume: (i) an ARM Cortex-M3 processor operating in little endian mode; (ii) the ARM EABI application binary interface; and (iii) the GNU GCC toolchain. Toolchains A complete software toolchain includes programs to convert source code into binary machine code, link together separately assembled/compiled code modules, disassemble the binaries, and convert their formats. Binary program file (.bin) Assembly Object Executable files (.s) files (.o) image file objcopy ld (linker) as objdump (assembler) Memory layout Disassembled Linker code (.lst) script (.ld) Figure 0.1: Assembler Toolchain. A typical GNU (GNU's Not Unix) assembler toolchain includes several programs that interact as shown in Figure 0.1 and perform the following functions: • as is the assembler and it converts human-readable assembly language programs into binary machine language code. It typically takes as input .s assembly files and outputs .o object files. • ld is the linker and it is used to combine multiple object files by resolving their external symbol references and relocating their data sections, and outputting a single executable file. It typically takes as input .o object files and .ld linker scripts and outputs .out executable files. • objcopy is a translation utility that copies and converts the contents of an object file from one format (e.g. .out) another (e.g. .bin). • objdump is a disassembler but it can also display various other information about object files. It is often used to disassemble binary files (e.g. -
Université De Montréal Context-Aware
UNIVERSITE´ DE MONTREAL´ CONTEXT-AWARE SOURCE CODE IDENTIFIER SPLITTING AND EXPANSION FOR SOFTWARE MAINTENANCE LATIFA GUERROUJ DEPARTEMENT´ DE GENIE´ INFORMATIQUE ET GENIE´ LOGICIEL ECOLE´ POLYTECHNIQUE DE MONTREAL´ THESE` PRESENT´ EE´ EN VUE DE L'OBTENTION DU DIPLOME^ DE PHILOSOPHIÆ DOCTOR (GENIE´ INFORMATIQUE) JUILLET 2013 ⃝c Latifa Guerrouj, 2013. UNIVERSITE´ DE MONTREAL´ ECOLE´ POLYTECHNIQUE DE MONTREAL´ Cette th`ese intitul´ee: CONTEXT-AWARE SOURCE CODE IDENTIFIER SPLITTING AND EXPANSION FOR SOFTWARE MAINTENANCE pr´esent´eepar: GUERROUJ Latifa en vue de l'obtention du dipl^ome de: Philosophiæ Doctor a ´et´ed^ument accept´eepar le jury d'examen constitu´ede: Mme BOUCHENEB Hanifa, Doctorat, pr´esidente M. ANTONIOL Giuliano, Ph.D., membre et directeur de recherche M. GUEH´ ENEUC´ Yann-Ga¨el, Ph.D., membre et codirecteur de recherche M. DESMARAIS Michel, Ph.D., membre Mme LAWRIE Dawn, Ph.D., membre iii This dissertation is dedicated to my parents. For their endless love, support and encouragement. iv ACKNOWLEDGMENTS I am very grateful to both Giulio and Yann for their support, encouragement, and intel- lectual input. I worked with you for four years or even less, but what I learned from you will last forever. Giulio, your passion about research was a source of inspiration and motivation for me. Also, your mentoring and support have been instrumental in achieving my goals. Yann, your enthusiasm and guidance have always been a strength for me to keep moving forward. Research would not be as much fun without students and researchers to collaborate with. It has been a real pleasure and great privilege working with Massimiliano Di Penta (University of Sannio), Denys Poshyvanyk (College of William and Mary), and their teams. -
Nateguyver Breakpoints LLDB Debug Toolchain More
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Sun Microsystems: Sun Java Workstation W1100z
CFP2000 Result spec Copyright 1999-2004, Standard Performance Evaluation Corporation Sun Microsystems SPECfp2000 = 1787 Sun Java Workstation W1100z SPECfp_base2000 = 1637 SPEC license #: 6 Tested by: Sun Microsystems, Santa Clara Test date: Jul-2004 Hardware Avail: Jul-2004 Software Avail: Jul-2004 Reference Base Base Benchmark Time Runtime Ratio Runtime Ratio 1000 2000 3000 4000 168.wupwise 1600 92.3 1733 71.8 2229 171.swim 3100 134 2310 123 2519 172.mgrid 1800 124 1447 103 1755 173.applu 2100 150 1402 133 1579 177.mesa 1400 76.1 1839 70.1 1998 178.galgel 2900 104 2789 94.4 3073 179.art 2600 146 1786 106 2464 183.equake 1300 93.7 1387 89.1 1460 187.facerec 1900 80.1 2373 80.1 2373 188.ammp 2200 158 1397 154 1425 189.lucas 2000 121 1649 122 1637 191.fma3d 2100 135 1552 135 1552 200.sixtrack 1100 148 742 148 742 301.apsi 2600 170 1529 168 1549 Hardware Software CPU: AMD Opteron (TM) 150 Operating System: Red Hat Enterprise Linux WS 3 (AMD64) CPU MHz: 2400 Compiler: PathScale EKO Compiler Suite, Release 1.1 FPU: Integrated Red Hat gcc 3.5 ssa (from RHEL WS 3) PGI Fortran 5.2 (build 5.2-0E) CPU(s) enabled: 1 core, 1 chip, 1 core/chip AMD Core Math Library (Version 2.0) for AMD64 CPU(s) orderable: 1 File System: Linux/ext3 Parallel: No System State: Multi-user, Run level 3 Primary Cache: 64KBI + 64KBD on chip Secondary Cache: 1024KB (I+D) on chip L3 Cache: N/A Other Cache: N/A Memory: 4x1GB, PC3200 CL3 DDR SDRAM ECC Registered Disk Subsystem: IDE, 80GB, 7200RPM Other Hardware: None Notes/Tuning Information A two-pass compilation method is -
Cray Scientific Libraries Overview
Cray Scientific Libraries Overview What are libraries for? ● Building blocks for writing scientific applications ● Historically – allowed the first forms of code re-use ● Later – became ways of running optimized code ● Today the complexity of the hardware is very high ● The Cray PE insulates users from this complexity • Cray module environment • CCE • Performance tools • Tuned MPI libraries (+PGAS) • Optimized Scientific libraries Cray Scientific Libraries are designed to provide the maximum possible performance from Cray systems with minimum effort. Scientific libraries on XC – functional view FFT Sparse Dense Trilinos BLAS FFTW LAPACK PETSc ScaLAPACK CRAFFT CASK IRT What makes Cray libraries special 1. Node performance ● Highly tuned routines at the low-level (ex. BLAS) 2. Network performance ● Optimized for network performance ● Overlap between communication and computation ● Use the best available low-level mechanism ● Use adaptive parallel algorithms 3. Highly adaptive software ● Use auto-tuning and adaptation to give the user the known best (or very good) codes at runtime 4. Productivity features ● Simple interfaces into complex software LibSci usage ● LibSci ● The drivers should do it all for you – no need to explicitly link ● For threads, set OMP_NUM_THREADS ● Threading is used within LibSci ● If you call within a parallel region, single thread used ● FFTW ● module load fftw (there are also wisdom files available) ● PETSc ● module load petsc (or module load petsc-complex) ● Use as you would your normal PETSc build ● Trilinos ● -
Latexsample-Thesis
INTEGRAL ESTIMATION IN QUANTUM PHYSICS by Jane Doe A dissertation submitted to the faculty of The University of Utah in partial fulfillment of the requirements for the degree of Doctor of Philosophy Department of Mathematics The University of Utah May 2016 Copyright c Jane Doe 2016 All Rights Reserved The University of Utah Graduate School STATEMENT OF DISSERTATION APPROVAL The dissertation of Jane Doe has been approved by the following supervisory committee members: Cornelius L´anczos , Chair(s) 17 Feb 2016 Date Approved Hans Bethe , Member 17 Feb 2016 Date Approved Niels Bohr , Member 17 Feb 2016 Date Approved Max Born , Member 17 Feb 2016 Date Approved Paul A. M. Dirac , Member 17 Feb 2016 Date Approved by Petrus Marcus Aurelius Featherstone-Hough , Chair/Dean of the Department/College/School of Mathematics and by Alice B. Toklas , Dean of The Graduate School. ABSTRACT Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. Blah blah blah blah blah blah blah blah blah blah blah blah blah blah blah. -
Getting Started with RTEMS Edition 4.7.2, for 4.7.2
Getting Started with RTEMS Edition 4.7.2, for 4.7.2 14 February 2008 On-Line Applications Research Corporation On-Line Applications Research Corporation TEXinfo 2006-10-04.17 COPYRIGHT c 1988 - 2006. On-Line Applications Research Corporation (OAR). The authors have used their best efforts in preparing this material. These efforts include the development, research, and testing of the theories and programs to determine their effectiveness. No warranty of any kind, expressed or implied, with regard to the software or the material contained in this document is provided. No liability arising out of the application or use of any product described in this document is assumed. The authors reserve the right to revise this material and to make changes from time to time in the content hereof without obligation to notify anyone of such revision or changes. The RTEMS Project is hosted at http://www.rtems.com. Any inquiries concerning RTEMS, its related support components, its documentation, or any custom services for RTEMS should be directed to the contacts listed on that site. A current list of RTEMS Support Providers is at http://www.rtems.com/support.html. i Table of Contents 1 Introduction..................................... 1 1.1 Real-Time Embedded Systems.................................. 1 1.2 Cross Development ............................................. 2 1.3 Resources on the Internet ...................................... 3 1.3.1 Online Tool Documentation ............................... 3 1.3.2 RTEMS Mailing List ...................................... 3 1.3.3 CrossGCC Mailing List.................................... 3 1.3.4 GCC Mailing Lists ........................................ 3 2 Requirements ................................... 5 2.1 Disk Space ..................................................... 5 2.2 General Host Software Requirements ........................... 5 2.2.1 GCC ..................................................... -
Introduchon to Arm for Network Stack Developers
Introducon to Arm for network stack developers Pavel Shamis/Pasha Principal Research Engineer Mvapich User Group 2017 © 2017 Arm Limited Columbus, OH Outline • Arm Overview • HPC SoLware Stack • Porng on Arm • Evaluaon 2 © 2017 Arm Limited Arm Overview © 2017 Arm Limited An introduc1on to Arm Arm is the world's leading semiconductor intellectual property supplier. We license to over 350 partners, are present in 95% of smart phones, 80% of digital cameras, 35% of all electronic devices, and a total of 60 billion Arm cores have been shipped since 1990. Our CPU business model: License technology to partners, who use it to create their own system-on-chip (SoC) products. We may license an instrucBon set architecture (ISA) such as “ARMv8-A”) or a specific implementaon, such as “Cortex-A72”. …and our IP extends beyond the CPU Partners who license an ISA can create their own implementaon, as long as it passes the compliance tests. 4 © 2017 Arm Limited A partnership business model A business model that shares success Business Development • Everyone in the value chain benefits Arm Licenses technology to Partner • Long term sustainability SemiCo Design once and reuse is fundamental IP Partner Licence fee • Spread the cost amongst many partners Provider • Technology reused across mulBple applicaons Partners develop • Creates market for ecosystem to target chips – Re-use is also fundamental to the ecosystem Royalty Upfront license fee OEM • Covers the development cost Customer Ongoing royalBes OEM sells • Typically based on a percentage of chip price -
Sun Microsystems
OMPM2001 Result spec Copyright 1999-2002, Standard Performance Evaluation Corporation Sun Microsystems SPECompMpeak2001 = 11223 Sun Fire V40z SPECompMbase2001 = 10862 SPEC license #:HPG0010 Tested by: Sun Microsystems, Santa Clara Test site: Menlo Park Test date: Feb-2005 Hardware Avail:Apr-2005 Software Avail:Apr-2005 Reference Base Base Peak Peak Benchmark Time Runtime Ratio Runtime Ratio 10000 20000 30000 310.wupwise_m 6000 432 13882 431 13924 312.swim_m 6000 424 14142 401 14962 314.mgrid_m 7300 622 11729 622 11729 316.applu_m 4000 536 7463 419 9540 318.galgel_m 5100 483 10561 481 10593 320.equake_m 2600 240 10822 240 10822 324.apsi_m 3400 297 11442 282 12046 326.gafort_m 8700 869 10011 869 10011 328.fma3d_m 4600 608 7566 608 7566 330.art_m 6400 226 28323 226 28323 332.ammp_m 7000 1359 5152 1359 5152 Hardware Software CPU: AMD Opteron (TM) 852 OpenMP Threads: 4 CPU MHz: 2600 Parallel: OpenMP FPU: Integrated Operating System: SUSE LINUX Enterprise Server 9 CPU(s) enabled: 4 cores, 4 chips, 1 core/chip Compiler: PathScale EKOPath Compiler Suite, Release 2.1 CPU(s) orderable: 1,2,4 File System: ufs Primary Cache: 64KBI + 64KBD on chip System State: Multi-User Secondary Cache: 1024KB (I+D) on chip L3 Cache: None Other Cache: None Memory: 16GB (8x2GB, PC3200 CL3 DDR SDRAM ECC Registered) Disk Subsystem: SCSI, 73GB, 10K RPM Other Hardware: None Notes/Tuning Information Baseline Optimization Flags: Fortran : -Ofast -OPT:early_mp=on -mcmodel=medium -mp C : -Ofast -mp Peak Optimization Flags: 310.wupwise_m : -mp -Ofast -mcmodel=medium -LNO:prefetch_ahead=5:prefetch=3 -
Improving Program Reconstruction in LLDB Using C++ Modules
Beyond Debug Information: Improving Program Reconstruction in LLDB using C++ Modules Master’s Thesis in Computer Science and Engineering RAPHAEL ISEMANN Department of Computer Science and Engineering CHALMERS UNIVERSITY OF TECHNOLOGY UNIVERSITY OF GOTHENBURG Gothenburg, Sweden 2019 Master’s thesis 2019 Beyond Debug Information: Improving Program Reconstruction in LLDB using C++ Modules Raphael Isemann Department of Computer Science and Engineering Chalmers University of Technology University of Gothenburg Gothenburg, Sweden 2019 Beyond Debug Information: Improving Program Reconstruction in LLDB using C++ Modules Raphael Isemann © Raphael Isemann, 2019. Supervisor: Thomas Sewell, Department of Computer Science and Engineering Examiner: Magnus Myreen, Department of Computer Science and Engineering Master’s Thesis 2019 Department of Computer Science and Engineering Chalmers University of Technology and University of Gothenburg SE-412 96 Gothenburg Telephone +46 31 772 1000 Cover: The LLVM logo, owned by and royality-free licensed from Apple Inc. Typeset in LATEX Gothenburg, Sweden 2019 iv Beyond Debug Information: Improving Program Reconstruction in LLDB using C++ Modules Raphael Isemann Department of Computer Science and Engineering Chalmers University of Technology and University of Gothenburg Abstract Expression evaluation is a core feature of every modern C++ debugger. Still, no C++ debugger currently features an expression evaluator that consistently supports advanced language features such as meta-programming with templates. The under- lying problem is that the debugger can often only partially reconstruct the debugged program from the debug information. This thesis presents a solution to this problem by using C++ modules as an additional source of program information. We devel- oped a prototype based on the LLDB debugger that is loading missing program components from the C++ modules used by the program.