In Using the GNU Compiler Collection (GCC)

Total Page:16

File Type:pdf, Size:1020Kb

In Using the GNU Compiler Collection (GCC) Using the GNU Compiler Collection For gcc version 6.1.0 (GCC) Richard M. Stallman and the GCC Developer Community Published by: GNU Press Website: http://www.gnupress.org a division of the General: [email protected] Free Software Foundation Orders: [email protected] 51 Franklin Street, Fifth Floor Tel 617-542-5942 Boston, MA 02110-1301 USA Fax 617-542-2652 Last printed October 2003 for GCC 3.3.1. Printed copies are available for $45 each. Copyright c 1988-2016 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with the Invariant Sections being \Funding Free Software", the Front-Cover Texts being (a) (see below), and with the Back-Cover Texts being (b) (see below). A copy of the license is included in the section entitled \GNU Free Documentation License". (a) The FSF's Front-Cover Text is: A GNU Manual (b) The FSF's Back-Cover Text is: You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development. i Short Contents Introduction ::::::::::::::::::::::::::::::::::::::::::::: 1 1 Programming Languages Supported by GCC ::::::::::::::: 3 2 Language Standards Supported by GCC :::::::::::::::::: 5 3 GCC Command Options ::::::::::::::::::::::::::::::: 9 4 C Implementation-Defined Behavior :::::::::::::::::::: 373 5 C++ Implementation-Defined Behavior ::::::::::::::::: 381 6 Extensions to the C Language Family ::::::::::::::::::: 383 7 Extensions to the C++ Language :::::::::::::::::::::: 681 8 GNU Objective-C Features ::::::::::::::::::::::::::: 697 9 Binary Compatibility :::::::::::::::::::::::::::::::: 713 10 gcov|a Test Coverage Program ::::::::::::::::::::::: 717 11 gcov-tool|an Offline Gcda Profile Processing Tool ::::::: 727 12 Known Causes of Trouble with GCC :::::::::::::::::::: 731 13 Reporting Bugs ::::::::::::::::::::::::::::::::::::: 747 14 How To Get Help with GCC :::::::::::::::::::::::::: 749 15 Contributing to GCC Development ::::::::::::::::::::: 751 Funding Free Software ::::::::::::::::::::::::::::::::::: 753 The GNU Project and GNU/Linux::::::::::::::::::::::::: 755 GNU General Public License :::::::::::::::::::::::::::::: 757 GNU Free Documentation License ::::::::::::::::::::::::: 769 Contributors to GCC :::::::::::::::::::::::::::::::::::: 777 Option Index :::::::::::::::::::::::::::::::::::::::::: 795 Keyword Index ::::::::::::::::::::::::::::::::::::::::: 819 iii Table of Contents Introduction :::::::::::::::::::::::::::::::::::::::: 1 1 Programming Languages Supported by GCC ::::::::::::::::::::::::::::::::::::::::::::::::: 3 2 Language Standards Supported by GCC ::::: 5 2.1 C Language :::::::::::::::::::::::::::::::::::::::::::::::::::: 5 2.2 C++ Language :::::::::::::::::::::::::::::::::::::::::::::::: 6 2.3 Objective-C and Objective-C++ Languages :::::::::::::::::::: 7 2.4 Go Language::::::::::::::::::::::::::::::::::::::::::::::::::: 8 2.5 References for Other Languages :::::::::::::::::::::::::::::::: 8 3 GCC Command Options ::::::::::::::::::::::: 9 3.1 Option Summary::::::::::::::::::::::::::::::::::::::::::::::: 9 3.2 Options Controlling the Kind of Output ::::::::::::::::::::::: 27 3.3 Compiling C++ Programs :::::::::::::::::::::::::::::::::::: 32 3.4 Options Controlling C Dialect ::::::::::::::::::::::::::::::::: 33 3.5 Options Controlling C++ Dialect ::::::::::::::::::::::::::::: 39 3.6 Options Controlling Objective-C and Objective-C++ Dialects :: 51 3.7 Options to Control Diagnostic Messages Formatting ::::::::::: 55 3.8 Options to Request or Suppress Warnings ::::::::::::::::::::: 56 3.9 Options for Debugging Your Program ::::::::::::::::::::::::: 88 3.10 Options That Control Optimization :::::::::::::::::::::::::: 93 3.11 Program Instrumentation Options::::::::::::::::::::::::::: 148 3.12 Options Controlling the Preprocessor:::::::::::::::::::::::: 159 3.13 Passing Options to the Assembler ::::::::::::::::::::::::::: 170 3.14 Options for Linking ::::::::::::::::::::::::::::::::::::::::: 171 3.15 Options for Directory Search :::::::::::::::::::::::::::::::: 175 3.16 Options for Code Generation Conventions ::::::::::::::::::: 177 3.17 GCC Developer Options :::::::::::::::::::::::::::::::::::: 186 3.18 Machine-Dependent Options :::::::::::::::::::::::::::::::: 202 3.18.1 AArch64 Options :::::::::::::::::::::::::::::::::::::: 203 3.18.1.1 `-march' and `-mcpu' Feature Modifiers :::::::::::: 205 3.18.2 Adapteva Epiphany Options ::::::::::::::::::::::::::: 206 3.18.3 ARC Options :::::::::::::::::::::::::::::::::::::::::: 208 3.18.4 ARM Options:::::::::::::::::::::::::::::::::::::::::: 216 3.18.5 AVR Options :::::::::::::::::::::::::::::::::::::::::: 222 3.18.5.1 EIND and Devices with More Than 128 Ki Bytes of Flash::::::::::::::::::::::::::::::::::::::::::::::::::: 226 3.18.5.2 Handling of the RAMPD, RAMPX, RAMPY and RAMPZ Special Function Registers:::::::::::::::::::::::::::::::::::::: 228 3.18.5.3 AVR Built-in Macros:::::::::::::::::::::::::::::: 228 iv Using the GNU Compiler Collection (GCC) 3.18.6 Blackfin Options ::::::::::::::::::::::::::::::::::::::: 230 3.18.7 C6X Options::::::::::::::::::::::::::::::::::::::::::: 233 3.18.8 CRIS Options:::::::::::::::::::::::::::::::::::::::::: 234 3.18.9 CR16 Options ::::::::::::::::::::::::::::::::::::::::: 235 3.18.10 Darwin Options::::::::::::::::::::::::::::::::::::::: 236 3.18.11 DEC Alpha Options :::::::::::::::::::::::::::::::::: 239 3.18.12 FR30 Options :::::::::::::::::::::::::::::::::::::::: 244 3.18.13 FT32 Options :::::::::::::::::::::::::::::::::::::::: 244 3.18.14 FRV Options ::::::::::::::::::::::::::::::::::::::::: 244 3.18.15 GNU/Linux Options :::::::::::::::::::::::::::::::::: 248 3.18.16 H8/300 Options::::::::::::::::::::::::::::::::::::::: 249 3.18.17 HPPA Options:::::::::::::::::::::::::::::::::::::::: 249 3.18.18 IA-64 Options :::::::::::::::::::::::::::::::::::::::: 252 3.18.19 LM32 Options :::::::::::::::::::::::::::::::::::::::: 256 3.18.20 M32C Options :::::::::::::::::::::::::::::::::::::::: 256 3.18.21 M32R/D Options ::::::::::::::::::::::::::::::::::::: 257 3.18.22 M680x0 Options :::::::::::::::::::::::::::::::::::::: 258 3.18.23 MCore Options ::::::::::::::::::::::::::::::::::::::: 263 3.18.24 MeP Options ::::::::::::::::::::::::::::::::::::::::: 264 3.18.25 MicroBlaze Options ::::::::::::::::::::::::::::::::::: 266 3.18.26 MIPS Options :::::::::::::::::::::::::::::::::::::::: 267 3.18.27 MMIX Options ::::::::::::::::::::::::::::::::::::::: 281 3.18.28 MN10300 Options :::::::::::::::::::::::::::::::::::: 282 3.18.29 Moxie Options :::::::::::::::::::::::::::::::::::::::: 283 3.18.30 MSP430 Options:::::::::::::::::::::::::::::::::::::: 284 3.18.31 NDS32 Options ::::::::::::::::::::::::::::::::::::::: 285 3.18.32 Nios II Options ::::::::::::::::::::::::::::::::::::::: 286 3.18.33 Nvidia PTX Options :::::::::::::::::::::::::::::::::: 291 3.18.34 PDP-11 Options :::::::::::::::::::::::::::::::::::::: 291 3.18.35 picoChip Options ::::::::::::::::::::::::::::::::::::: 292 3.18.36 PowerPC Options::::::::::::::::::::::::::::::::::::: 293 3.18.37 RL78 Options::::::::::::::::::::::::::::::::::::::::: 293 3.18.38 IBM RS/6000 and PowerPC Options :::::::::::::::::: 294 3.18.39 RX Options :::::::::::::::::::::::::::::::::::::::::: 311 3.18.40 S/390 and zSeries Options :::::::::::::::::::::::::::: 314 3.18.41 Score Options::::::::::::::::::::::::::::::::::::::::: 317 3.18.42 SH Options ::::::::::::::::::::::::::::::::::::::::::: 318 3.18.43 Solaris 2 Options ::::::::::::::::::::::::::::::::::::: 324 3.18.44 SPARC Options :::::::::::::::::::::::::::::::::::::: 325 3.18.45 SPU Options ::::::::::::::::::::::::::::::::::::::::: 330 3.18.46 Options for System V ::::::::::::::::::::::::::::::::: 332 3.18.47 TILE-Gx Options ::::::::::::::::::::::::::::::::::::: 332 3.18.48 TILEPro Options ::::::::::::::::::::::::::::::::::::: 332 3.18.49 V850 Options ::::::::::::::::::::::::::::::::::::::::: 333 3.18.50 VAX Options ::::::::::::::::::::::::::::::::::::::::: 335 3.18.51 Visium Options ::::::::::::::::::::::::::::::::::::::: 335 3.18.52 VMS Options ::::::::::::::::::::::::::::::::::::::::: 336 3.18.53 VxWorks Options ::::::::::::::::::::::::::::::::::::: 337 v 3.18.54 x86 Options :::::::::::::::::::::::::::::::::::::::::: 337 3.18.55 x86 Windows Options::::::::::::::::::::::::::::::::: 357 3.18.56 Xstormy16 Options ::::::::::::::::::::::::::::::::::: 358 3.18.57 Xtensa Options ::::::::::::::::::::::::::::::::::::::: 358 3.18.58 zSeries Options ::::::::::::::::::::::::::::::::::::::: 360 3.19 Specifying Subprocesses and the Switches to Pass to Them :: 360 3.20 Environment Variables Affecting GCC :::::::::::::::::::::: 367 3.21 Using Precompiled Headers ::::::::::::::::::::::::::::::::: 370 4 C Implementation-Defined Behavior ::::::: 373 4.1 Translation :::::::::::::::::::::::::::::::::::::::::::::::::: 373 4.2 Environment::::::::::::::::::::::::::::::::::::::::::::::::: 373 4.3 Identifiers:::::::::::::::::::::::::::::::::::::::::::::::::::: 373 4.4 Characters ::::::::::::::::::::::::::::::::::::::::::::::::::: 374 4.5 Integers:::::::::::::::::::::::::::::::::::::::::::::::::::::: 375 4.6 Floating Point ::::::::::::::::::::::::::::::::::::::::::::::: 375 4.7 Arrays and Pointers:::::::::::::::::::::::::::::::::::::::::: 376 4.8 Hints :::::::::::::::::::::::::::::::::::::::::::::::::::::::: 377 4.9 Structures, Unions, Enumerations, and Bit-Fields::::::::::::: 377 4.10 Qualifiers :::::::::::::::::::::::::::::::::::::::::::::::::::
Recommended publications
  • Fujitsu SPARC64™ X+/X Software on Chip Overview for Developers]
    White paper [Fujitsu SPARC64™ X+/X Software on Chip Overview for Developers] White paper Fujitsu SPARC64™ X+/X Software on Chip Overview for Developers Page 1 of 13 www.fujitsu.com/sparc White paper [Fujitsu SPARC64™ X+/X Software on Chip Overview for Developers] Table of Contents Table of Contents 1 Software on Chip Innovative Technology 3 2 SPARC64™ X+/X SIMD Vector Processing 4 2.1 How Oracle Databases take advantage of SPARC64™ X+/X SIMD vector processing 4 2.2 How to use of SPARC64™ X+/X SIMD instructions in user applications 5 2.3 How to check if the system and operating system is capable of SIMD execution? 6 2.4 How to check if SPARC64™ X+/X SIMD instructions indeed have been generated upon compilation of a user source code? 6 2.5 Is SPARC64™ X+/X SIMD implementation compatible with Oracle’s SPARC SIMD? 6 3 SPARC64™ X+/X Decimal Floating Point Processing 8 3.1 How Oracle Databases take advantage of SPARC64™ X+/X Decimal Floating-Point 8 3.2 Decimal Floating-Point processing in user applications 8 4 SPARC64™ X+/X Extended Floating-Point Registers 9 4.1 How Oracle Databases take advantage of SPARC64™ X+/X Decimal Floating-Point 9 5 SPARC64™ X+/X On-Chip Cryptographic Processing Capabilities 10 5.1 How to use the On-Chip Cryptographic Processing Capabilities 10 5.2 How to use the On-Chip Cryptographic Processing Capabilities in user applications 10 6 Conclusions 12 Page 2 of 13 www.fujitsu.com/sparc White paper [Fujitsu SPARC64™ X+/X Software on Chip Overview for Developers] Software on Chip Innovative Technology 1 Software on Chip Innovative Technology Fujitsu brings together innovations in supercomputing, business computing, and mainframe computing in the Fujitsu M10 enterprise server family to help organizations meet their business challenges.
    [Show full text]
  • Using the GNU Compiler Collection (GCC)
    Using the GNU Compiler Collection (GCC) Using the GNU Compiler Collection by Richard M. Stallman and the GCC Developer Community Last updated 23 May 2004 for GCC 3.4.6 For GCC Version 3.4.6 Published by: GNU Press Website: www.gnupress.org a division of the General: [email protected] Free Software Foundation Orders: [email protected] 59 Temple Place Suite 330 Tel 617-542-5942 Boston, MA 02111-1307 USA Fax 617-542-2652 Last printed October 2003 for GCC 3.3.1. Printed copies are available for $45 each. Copyright c 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with the Invariant Sections being \GNU General Public License" and \Funding Free Software", the Front-Cover texts being (a) (see below), and with the Back-Cover Texts being (b) (see below). A copy of the license is included in the section entitled \GNU Free Documentation License". (a) The FSF's Front-Cover Text is: A GNU Manual (b) The FSF's Back-Cover Text is: You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development. i Short Contents Introduction ...................................... 1 1 Programming Languages Supported by GCC ............ 3 2 Language Standards Supported by GCC ............... 5 3 GCC Command Options .........................
    [Show full text]
  • Chapter 2 DIRECT METHODS—PART II
    Chapter 2 DIRECT METHODS—PART II If we use finite precision arithmetic, the results obtained by the use of direct methods are contaminated with roundoff error, which is not always negligible. 2.1 Finite Precision Computation 2.2 Residual vs. Error 2.3 Pivoting 2.4 Scaling 2.5 Iterative Improvement 2.1 Finite Precision Computation 2.1.1 Floating-point numbers decimal floating-point numbers The essence of floating-point numbers is best illustrated by an example, such as that of a 3-digit floating-point calculator which accepts numbers like the following: 123. 50.4 −0.62 −0.02 7.00 Any such number can be expressed as e ±d1.d2d3 × 10 where e ∈{0, 1, 2}. (2.1) Here 40 t := precision = 3, [L : U] := exponent range = [0 : 2]. The exponent range is rather limited. If the calculator display accommodates scientific notation, e g., 3.46 3 −1.56 −3 then we might use [L : U]=[−9 : 9]. Some numbers have multiple representations in form (2.1), e.g., 2.00 × 101 =0.20 × 102. Hence, there is a normalization: • choose smallest possible exponent, • choose + sign for zero, e.g., 0.52 × 102 → 5.20 × 101, 0.08 × 10−8 → 0.80 × 10−9, −0.00 × 100 → 0.00 × 10−9. −9 Nonzero numbers of form ±0.d2d3 × 10 are denormalized. But for large-scale scientific computation base 2 is preferred. binary floating-point numbers This is an important matter because numbers like 0.2 do not have finite representations in base 2: 0.2=(0.001100110011 ···)2.
    [Show full text]
  • ARM Code Development in Windows
    ARM Code Development in Windows By: Ali Nuhi This guide will describe how to develop code to be run on an embedded Linux system using an ARM processor (specifically the OMAP3530). Environment The Cygwin bash shell will be the environment used for code development. Download it from the below link. http://cygwin.com/install.html READ THE SITE. Download setup.exe and choose the packages you want to install. Some helpful packages to download are: -gcc4-core,g++ etc. (for c and c++ compiling of normal programs) -git core files and completion (version control system) -wget (utility to download files from the internet via HTTP and FTP) -VIM (text editor) -Xemacs (another text editor, better than vim) -nano (simple command line text editor) If you still use windows notepad for writing code please atleast upgrade to notepad++. Toolchain We will be compiling and creating files using CodeSourcery g++ lite toolchains. This is a modified version of GCC which will create files specifically for ARM target systems. Download this at: http://www.codesourcery.com/sgpp/lite/arm/portal/release1803 Download the Windows installer and execute. You can let it install as is unless you have some other install scheme on your computer. I highly recommend reading the getting started pdf that comes with CodeSourcery. Once it’s fully installed open up Cygwin and execute the below lines. $ export CYGPATH=cygpath $ export CYGPATH=c:/cygwin/bin/cygpath If you installed Cygwin to another directory then you must edit the second line. To use the compiler type the following and hit tab twice to see all of the possible options you have.
    [Show full text]
  • Branch-Directed and Pointer-Based Data Cache Prefetching
    Branch-directed and Pointer-based Data Cache Prefetching Yue Liu Mona Dimitri David R. Kaeli Department of Electrical and Computer Engineering Northeastern University Boston, MA Abstract The design of the on-chip cache memory and branch prediction logic has become an integral part of a microprocessor implementation. Branch predictors reduce the effects of control hazards on pipeline performance. Branch prediction implementations have been proposed which eliminate a majority of the pipeline stalls associated with branches. Caches are commonly used to reduce the performance gap between microprocessor and memory technology. Caches can only provide this benefit if the requested address is in the cache when requested. To increase the probability that addresses are present when requested, prefetching can be employed. Prefetching attempts to prime the cache with instructions and data which will be accessed in the near future. The work presented here describes two new prefetching algorithms. The first ties data cache prefetching to branches in the instruction stream. History of the data stream is incorporated into a Branch Target Buffer (BTB). Since branch behavior determines program control flow, data access patterns are also dependent upon this behavior. Results indicate that combining this strategy with tagged prefetching can significantly improve cache hit ratios. While improving cache hit rates is important, the resulting memory bus traffic introduced can be an issue. Our prefetching technique can also significantly reduce the overall memory bus traffic. The second prefetching scheme dynamically identifies pointer-based data references in the data stream, and records these references in order to successfully prime the cache with the next element in the linked data structure in advance of its access.
    [Show full text]
  • Cygwin User's Guide
    Cygwin User’s Guide Cygwin User’s Guide ii Copyright © Cygwin authors Permission is granted to make and distribute verbatim copies of this documentation provided the copyright notice and this per- mission notice are preserved on all copies. Permission is granted to copy and distribute modified versions of this documentation under the conditions for verbatim copying, provided that the entire resulting derived work is distributed under the terms of a permission notice identical to this one. Permission is granted to copy and distribute translations of this documentation into another language, under the above conditions for modified versions, except that this permission notice may be stated in a translation approved by the Free Software Foundation. Cygwin User’s Guide iii Contents 1 Cygwin Overview 1 1.1 What is it? . .1 1.2 Quick Start Guide for those more experienced with Windows . .1 1.3 Quick Start Guide for those more experienced with UNIX . .1 1.4 Are the Cygwin tools free software? . .2 1.5 A brief history of the Cygwin project . .2 1.6 Highlights of Cygwin Functionality . .3 1.6.1 Introduction . .3 1.6.2 Permissions and Security . .3 1.6.3 File Access . .3 1.6.4 Text Mode vs. Binary Mode . .4 1.6.5 ANSI C Library . .4 1.6.6 Process Creation . .5 1.6.6.1 Problems with process creation . .5 1.6.7 Signals . .6 1.6.8 Sockets . .6 1.6.9 Select . .7 1.7 What’s new and what changed in Cygwin . .7 1.7.1 What’s new and what changed in 3.2 .
    [Show full text]
  • Truffle/C Interpreter
    JOHANNES KEPLER UNIVERSITAT¨ LINZ JKU Faculty of Engineering and Natural Sciences Truffle/C Interpreter Master’s Thesis submitted in partial fulfillment of the requirements for the academic degree Diplom-Ingenieur in the Master’s Program Computer Science Submitted by Manuel Rigger, BSc. At the Institut f¨urSystemsoftware Advisor o.Univ.-Prof. Dipl.-Ing. Dr.Dr.h.c. Hanspeter M¨ossenb¨ock Co-advisor Dipl.-Ing. Lukas Stadler Dipl.-Ing. Dr. Thomas W¨urthinger Xiamen, April 2014 Contents I Contents 1 Introduction 3 1.1 Motivation . .3 1.2 Goals and Scope . .4 1.3 From C to Java . .4 1.4 Structure of the Thesis . .6 2 State of the Art 9 2.1 Graal . .9 2.2 Truffle . 10 2.2.1 Rewriting and Specialization . 10 2.2.2 Truffle DSL . 11 2.2.3 Control Flow . 12 2.2.4 Profiling and Inlining . 12 2.2.5 Partial Evaluation and Compilation . 12 2.3 Clang . 13 3 Architecture 14 3.1 From Clang to Java . 15 3.2 Node Construction . 16 3.3 Runtime . 16 4 The Truffle/C File 17 4.1 Truffle/C File Format Goals . 17 4.2 Truffle/C File Format 1 . 19 4.2.1 Constant Pool . 19 4.2.2 Function Table . 20 4.2.3 Functions and Attributes . 20 4.3 Truffle/C File Considerations and Comparison . 21 4.3.1 Java Class File and Truffle/C File . 21 4.3.2 ELF and Truffle/C File . 22 4.4 Clang Modification Truffle/C File . 23 Contents II 5 Truffle/C Data Types 25 5.1 Data Type Hierarchy: Boxing, Upcasts and Downcasts .
    [Show full text]
  • Memory Tagging and How It Improves C/C++ Memory Safety Kostya Serebryany, Evgenii Stepanov, Aleksey Shlyapnikov, Vlad Tsyrklevich, Dmitry Vyukov Google February 2018
    Memory Tagging and how it improves C/C++ memory safety Kostya Serebryany, Evgenii Stepanov, Aleksey Shlyapnikov, Vlad Tsyrklevich, Dmitry Vyukov Google February 2018 Introduction 2 Memory Safety in C/C++ 2 AddressSanitizer 2 Memory Tagging 3 SPARC ADI 4 AArch64 HWASAN 4 Compiler And Run-time Support 5 Overhead 5 RAM 5 CPU 6 Code Size 8 Usage Modes 8 Testing 9 Always-on Bug Detection In Production 9 Sampling In Production 10 Security Hardening 11 Strengths 11 Weaknesses 12 Legacy Code 12 Kernel 12 Uninitialized Memory 13 Possible Improvements 13 Precision Of Buffer Overflow Detection 13 Probability Of Bug Detection 14 Conclusion 14 Introduction Memory safety in C and C++ remains largely unresolved. A technique usually called “memory tagging” may dramatically improve the situation if implemented in hardware with reasonable overhead. This paper describes two existing implementations of memory tagging: one is the full hardware implementation in SPARC; the other is a partially hardware-assisted compiler-based tool for AArch64. We describe the basic idea, evaluate the two implementations, and explain how they improve memory safety. This paper is intended to initiate a wider discussion of memory tagging and to motivate the CPU and OS vendors to add support for it in the near future. Memory Safety in C/C++ C and C++ are well known for their performance and flexibility, but perhaps even more for their extreme memory unsafety. This year we are celebrating the 30th anniversary of the Morris Worm, one of the first known exploitations of a memory safety bug, and the problem is still not solved.
    [Show full text]
  • MIPS Architecture • MIPS (Microprocessor Without Interlocked Pipeline Stages) • MIPS Computer Systems Inc
    Spring 2011 Prof. Hyesoon Kim MIPS Architecture • MIPS (Microprocessor without interlocked pipeline stages) • MIPS Computer Systems Inc. • Developed from Stanford • MIPS architecture usages • 1990’s – R2000, R3000, R4000, Motorola 68000 family • Playstation, Playstation 2, Sony PSP handheld, Nintendo 64 console • Android • Shift to SOC http://en.wikipedia.org/wiki/MIPS_architecture • MIPS R4000 CPU core • Floating point and vector floating point co-processors • 3D-CG extended instruction sets • Graphics – 3D curved surface and other 3D functionality – Hardware clipping, compressed texture handling • R4300 (embedded version) – Nintendo-64 http://www.digitaltrends.com/gaming/sony- announces-playstation-portable-specs/ Not Yet out • Google TV: an Android-based software service that lets users switch between their TV content and Web applications such as Netflix and Amazon Video on Demand • GoogleTV : search capabilities. • High stream data? • Internet accesses? • Multi-threading, SMP design • High graphics processors • Several CODEC – Hardware vs. Software • Displaying frame buffer e.g) 1080p resolution: 1920 (H) x 1080 (V) color depth: 4 bytes/pixel 4*1920*1080 ~= 8.3MB 8.3MB * 60Hz=498MB/sec • Started from 32-bit • Later 64-bit • microMIPS: 16-bit compression version (similar to ARM thumb) • SIMD additions-64 bit floating points • User Defined Instructions (UDIs) coprocessors • All self-modified code • Allow unaligned accesses http://www.spiritus-temporis.com/mips-architecture/ • 32 64-bit general purpose registers (GPRs) • A pair of special-purpose registers to hold the results of integer multiply, divide, and multiply-accumulate operations (HI and LO) – HI—Multiply and Divide register higher result – LO—Multiply and Divide register lower result • a special-purpose program counter (PC), • A MIPS64 processor always produces a 64-bit result • 32 floating point registers (FPRs).
    [Show full text]
  • Contents of Lecture 4: Declarations
    Contents of Lecture 4: Declarations Implicint int Storage class specifiers Type specifiers Enumeration specifiers Type qualifiers Jonas Skeppstedt ([email protected]) Lecture 4 2014 1 / 39 Now obsolete: implicit int Sometimes you can see code such as: main() // invalid { } or even: #include <stdio.h> count; // invalid float x; In earlier versions of C one could skip the type, which then became int, and is called implicit int. Calling a function before its declaration also set its return type to int. It’s invalid C so don’t use it — but compilers often allow it... Jonas Skeppstedt ([email protected]) Lecture 4 2014 2 / 39 Storage class specifiers Last lecture we discussed the different kinds of storage durations. Now we will see how to specify some of them explicitly. Dynamic (important) and temporary (less important) storage duration are not specified by the programmer using any particular syntax but defined by the standard. The storage class specifiers are: typedef extern static _Thread_local auto register Of these typedef does not refer to any kind of storage duration — instead it introduces another name of a type and not a new type: typedef int num_t; int* p; num_t* q; p = q; // valid since p and q have the same type. Jonas Skeppstedt ([email protected]) Lecture 4 2014 3 / 39 Storage class specifiers: static at file scope static int count; /∗ initialized to zero. ∗/ static void init(void) { /∗ Do some initializations ... ∗/ } Used to make an identifier invisible outside the source file With static at file scope, there is no risk of name conflicts with other files.
    [Show full text]
  • Statically Detecting Likely Buffer Overflow Vulnerabilities
    Statically Detecting Likely Buffer Overflow Vulnerabilities David Larochelle [email protected] University of Virginia, Department of Computer Science David Evans [email protected] University of Virginia, Department of Computer Science Abstract Buffer overflow attacks may be today’s single most important security threat. This paper presents a new approach to mitigating buffer overflow vulnerabilities by detecting likely vulnerabilities through an analysis of the program source code. Our approach exploits information provided in semantic comments and uses lightweight and efficient static analyses. This paper describes an implementation of our approach that extends the LCLint annotation-assisted static checking tool. Our tool is as fast as a compiler and nearly as easy to use. We present experience using our approach to detect buffer overflow vulnerabilities in two security-sensitive programs. 1. Introduction ed a prototype tool that does this by extending LCLint [Evans96]. Our work differs from other work on static detection of buffer overflows in three key ways: (1) we Buffer overflow attacks are an important and persistent exploit semantic comments added to source code to security problem. Buffer overflows account for enable local checking of interprocedural properties; (2) approximately half of all security vulnerabilities we focus on lightweight static checking techniques that [CWPBW00, WFBA00]. Richard Pethia of CERT have good performance and scalability characteristics, identified buffer overflow attacks as the single most im- but sacrifice soundness and completeness; and (3) we portant security problem at a recent software introduce loop heuristics, a simple approach for engineering conference [Pethia00]; Brian Snow of the efficiently analyzing many loops found in typical NSA predicted that buffer overflow attacks would still programs.
    [Show full text]
  • Toolchains Instructor: Prabal Dutta Date: October 2, 2012
    EECS 373: Design of Microprocessor-Based Systems Fall 2012 Lecture 3: Toolchains Instructor: Prabal Dutta Date: October 2, 2012 Note: Unless otherwise specified, these notes assume: (i) an ARM Cortex-M3 processor operating in little endian mode; (ii) the ARM EABI application binary interface; and (iii) the GNU GCC toolchain. Toolchains A complete software toolchain includes programs to convert source code into binary machine code, link together separately assembled/compiled code modules, disassemble the binaries, and convert their formats. Binary program file (.bin) Assembly Object Executable files (.s) files (.o) image file objcopy ld (linker) as objdump (assembler) Memory layout Disassembled Linker code (.lst) script (.ld) Figure 0.1: Assembler Toolchain. A typical GNU (GNU's Not Unix) assembler toolchain includes several programs that interact as shown in Figure 0.1 and perform the following functions: • as is the assembler and it converts human-readable assembly language programs into binary machine language code. It typically takes as input .s assembly files and outputs .o object files. • ld is the linker and it is used to combine multiple object files by resolving their external symbol references and relocating their data sections, and outputting a single executable file. It typically takes as input .o object files and .ld linker scripts and outputs .out executable files. • objcopy is a translation utility that copies and converts the contents of an object file from one format (e.g. .out) another (e.g. .bin). • objdump is a disassembler but it can also display various other information about object files. It is often used to disassemble binary files (e.g.
    [Show full text]