Design Languages for Embedded Systems Stephen A. Edwards Columbia University, New York
[email protected] May, 2003 Abstract ward hardware simulation. VHDL’s primitive are assign- ments such as a = b + c or procedural code. Verilog adds Embedded systems are application-specific computers that transistor and logic gate primitives, and allows new ones to interact with the physical world. Each has a diverse set be defined with truth tables. of tasks to perform, and although a very flexible language might be able to handle all of them, instead a variety of Both languages allow concurrent processes to be de- problem-domain-specific languages have evolved that are scribed procedurally. Such processes sleep until awak- easier to write, analyze, and compile. ened by an event that causes them to run, read and write variables, and suspend. Processes may wait for a pe- This paper surveys some of the more important lan- riod of time (e.g., #10 in Verilog, wait for 10ns in guages, introducing their central ideas quickly without go- VHDL), a value change (@(a or b), wait on a,b), ing into detail. A small example of each is included. or an event (@(posedge clk), wait on clk un- 1 Introduction til clk='1'). An embedded system is a computer masquerading as a non- VHDL communication is more disciplined and flexible. computer that must perform a small set of tasks cheaply and Verilog communicates through wires or regs: shared mem- efficiently. A typical system might have communication, ory locations that can cause race conditions. VHDL’s sig- signal processing, and user interface tasks to perform.