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Oled Module Specification MULTI-INNO TECHNOLOGY CO., LTD. www.multi-inno.com OLED MODULE SPECIFICATION Model : MI6432AO-W For Customer's Acceptance: Customer Approved Comment Revision 1.0 Engineering Date 2013-04-07 Our Reference MODULE NO.: MI6432AO-W Ver 1.0 REVISION RECORD REV NO. REV DATE CONTENTS REMARKS 1.0 2013-04-07 Initial Release MULTI-INNO TECHNOLOGY CO.,LTD. P.2 MODULE NO.: MI6432AO-W Ver 1.0 CONTENT PHYSICAL DATA EXTERNAL DIMENSIONS ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS FUNCTIONAL SPECIFICATION AND APPLICATION CIRCUIT ELECTRO-OPTICAL CHARACTERISTICS INTERFACE PIN CONNECTIONS RELIABILITY TESTS OUTGOING QUALITY CONTROL SPECIFICATION CAUTIONS IN USING OLED MODULE MULTI-INNO TECHNOLOGY CO.,LTD. P.3 MODULE NO.: MI6432AO-W Ver 1.0 PHYSICAL DATA No. Items Specification Unit 1 Display Mode Passive Matrix OLED - 2 Display ColorMonochrome (White) - 3 Duty 1/32 - 4 Resolution 64 (W)x 32(H) Pixel 5 Active Area 11.18 (W) x 5.58 (H) mm 2 6 Outline Dimension 14.50 (W) x 11.60 (H) x 1.28 (D) mm 3 7 Dot Pitch 0.175 (W) x 0.175 (H) mm 2 8 Dot Size 0.155 (W) x 0.155 (H) mm 2 9 Aperture Rate 78 % 10 Driver IC SSD1306Z - 11 Interface I2C - 12 Weight 0.42f10% g MULTI-INNO TECHNOLOGY CO.,LTD. P.4 MODULE NO.: MI6432AO-W Ver 1.0 EXTERNAL DIMENSIONS MULTI-INNO TECHNOLOGY CO.,LTD. P.5 MODULE NO.: MI6432AO-W Ver 1.0 ABSOLUTE MAXIMUM RATINGS ITEM SYMBOL MIN MAX UNIT REMARK IC maximum VDD -0.3 4.0 V rating Supply Voltage IC maximum VBAT -0.3 5.0 V rating IC maximum OLED Operating Voltage VCC 0 16 V rating Operating Temp. Top -40 70 ć - Storage Temp Tstg -40 85 ć - Operation life time - TBD - hrs - Note 1: All the above voltages are on the basis of "V SS = 0V". Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur.Also,for normal operations,it is desirable to use this module under the conditions according to electro-optical characteristics .If this module is used beyond these co- nditions,malfunctioning of the module can occur and the reliability of the module may deterio- rate. Note 3: V = 7.25V, Ta = 25 ° C, 50% Checkerboard. CC Software configuration follows Actual Application Example . End of lifetime is specified as 50% of initial brightness reached.The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions. ELECTRICAL CHARACTERISTICS DC Characteristics TEST ITEM SYMBOL MIN TYPE MAX UNIT CONDITION 22±3 C, Logic Supply Voltage VDD q 1.65 2.8 3.3 V 55±15%R.H OLED Driver Supply Voltage 22±3 C, VCC q 7.0 7.25 7.5 (Supplied Externally) 55±15%R.H 22±3 C, Supply Voltage for DC/DC VBAT q 3.3 3.7 4.2 55±15%R.H OLED Driver Supply Voltage 22±3 C, VCC q 7.0 7.25 7.5 V (Generated by Internal DC/DC) 55±15%R.H High-level Input Voltage VIH - 0.8hVDD - - V Low-level Input Voltage VIL - - - 0.2hVDD V High-level Output Voltage VOH - 0.9hVDD - - V Low-level Output Voltage VOL - - - 0.1hVDD V Note : The VCC input must be kept in a stable value; ripple and noise are not allowed. MULTI-INNO TECHNOLOGY CO.,LTD. P.6 MODULE NO.: MI6432AO-W Ver 1.0 ƹ AC Characteristics I²Cnterface Timing Characteristics (VDD - VSS = 1.65V to 3.3V, TA = 25°C) I²C interface characteristics MULTI-INNO TECHNOLOGY CO.,LTD. P.7 MODULE NO.: MI6432AO-W Ver 1.0 FUNCTIONAL SPECIFICATION AND APPLICATION CIRCUIT 1. Power ON and Power OFF Sequence Power ON Sequence: 1. Power ON VDD (4) 2. After VDD become stable, set RES# pin LOW (logic low) for at least 3us (t1 ) and then HIGH (logic high). (1) 3. After set RES# pin LOW (logic low), wait for at least 3us (t2). Then Power ON VCC . 4. After VCC become stable, send command AFh for display ON. SEG/COM will be ON after 100ms (t AF). Power OFF Sequence: 1. Send command AEh for display OFF. 2. Power OFF VCC(1) (2) (3). (5) 3. Power OFF VDD after tOFF. (Typical tOFF=100ms) Note: (1)Since an ESD protection circuit is connected between VDD and VCC, VCC becomes lower than VDD whenever VDD is ON and VCC is OFF as shown in the dotted line of VCC in above figures. (2) VCC should be kept float (disable) when it is OFF. (3) Power Pins(VDD, VCC) can never be pulled to ground under any circumstance. (4) The register values are reset after t1. (5) VDD should not be Power OFF before VCC Power OFF. MULTI-INNO TECHNOLOGY CO.,LTD. P.8 MODULE NO.: MI6432AO-W Ver 1.0 2. Application Circuit 1) Application Example of M00930 with Internal Charge Pump and I²C mode. VDD 00930 C1 1 C2P 2 C2N C2 3 R2 R3 C1P 4 C1N VBAT 5 VBAT 6 VBREF(NC) 7 VSS VDD 8 VDD RES# 9 RES# SCL 10 SCL SDA 11 SDA 12 IREF 13 VCOMH 14 VCC R1 C3 C4 C5 C6 GND Pin connected to MCU interface: SCL, SDA, RES# Under Internal DC/DC Mode, the Charge Pump Setting(8Dh) must be set as follow: 8Dh: Charge Pump Setting 14h; Enable Charge Pump Recommended components C3,C5,C6: 4.7ȝF/16V.ROHS (Tantalum Capacitors) C1,C2,C4: 1uF-0603-X7R±10%.RoHS R1: 0603 1/10W +/-5% 390Kohm.RoHS R2,R3: 0603 1/10W +/-5% 10Kohm.RoHS MULTI-INNO TECHNOLOGY CO.,LTD. P.9 MODULE NO.: MI6432AO-W Ver 1.0 2) Application Example of M00930 with External VCC and I²C mode. 00930 1 C2P 2 C2N VDD 3 C1P 4 C1N 5 VBAT 6 R2 R3 VBREF(NC) 7 VSS VDD 8 VDD RES# 9 RES# SCL 10 SCL SDA 11 SDA 12 IREF 13 VCOMH VCC 14 VCC R1 C1 C2 C3 GND Pin connected to MCU interface: SCL, SDA, RES# C1P, C1N, C2P, C2N,VBAT should be left open. Under external VCC Mode, the Charge Pump Setting(8Dh) must be set as follow: 8Dh: Charge Pump Setting 10h; Disable Charge Pump Recommended components C2,C3: 4.7ȝF/16V.ROHS (Tantalum Capacitors) C1: 1uF-0603-X7R±10%.RoHS R1: 0603 1/10W +/-5% 390Kohm.RoHS R2,R3: 0603 1/10W +/-5% 10Kohm.RoHS 3. Display Control Instruction Refer to SSD1306 IC Specification. 4. Recommended Software Initialization TBD MULTI-INNO TECHNOLOGY CO.,LTD. P.10 MODULE NO.: MI6432AO-W Ver 1.0 ELECTRO-OPTICAL CHARACTERISTICS (Ta=25) TEST ITEM SYMBOL MIN TYPE MAX UNIT CONDITION 2 Normal Mode Brightness Lbr All pixels ON(1) TBD TBD - cd/m VDD=1.65V~3.3V, VCC = 7V~15V ICC,Sleep mode Current ICC,SLEEP - - 10 uA Display OFF, No panel attached VDD=1.65V~3.3V, VCC = 7V~15V IDD,Sleep mode Current IDD,SLEEP - - 10 uA Display OFF, No panel attached Normal Mode Power Consumption(VCC Supplied Pt=(ICC*VCC) All pixels ON(1) - TBD TBD mW Externally) Normal Mode Power Consumption (V CC Generated Pt=(IBAT*VBAT) All pixels ON(1) TBD TBD by Internal DC/DC) (x) TBD TBD TBD - C.I.E(White) x,y(CIE1931) (y) TBD TBD TBD - Dark Room Contrast CR - 2000:1 - - - Response Time - - --- 10 - ­s View Angle - - 160 - - Degree Note(1): Normal Mode test conditions are as follows: - Driving voltage : 7.25V(VCC Supplied Externally) or VBAT:3.7V(VCC Generated by Internal DC/DC). - Contrast setting : TBD - Frame rate : TBD - Duty setting : 1/32 Note(2): Standby Mode test conditions are as follows: - Driving voltage : VCC:7.25V(VCC Supplied Externally) or VBAT:3.7V(VCC Generated by Internal DC/DC). - Contrast setting : TBD - Frame rate : TBD - Duty setting : 1/32 MULTI-INNO TECHNOLOGY CO.,LTD. P.11 MODULE NO.: MI6432AO-W Ver 1.0 INTERFACE PIN CONNECTIONS 1. Function Block Diagram C2P C2N C1P C1N C32-47 VBAT VBREF(NC) 64x32 VSS S32-95 VDD OLED RES# Panel SCL SDA S- IREF VCOMH VCC 2. Panel Layout Diagram &20 &2 6(* &20 &20 6(* &20 6(*/$<287 MULTI-INNO TECHNOLOGY CO.,LTD. P.12 MODULE NO.: MI6432AO-W Ver 1.0 3 Module Interface PIN NO. PIN NAME DESCRIPTION 1 C2P 2 C2N C1P/C1N – Pin for charge pump capacitor; Connect to each other with a capacitor. 3 C1P C2P/C2N – Pin for charge pump capacitor; Connect to each other with a capacitor. 4 C1N 5 VBAT Power supply for charge pump regulator circuit. Table 5.1 6 VBREF(NC) No Connection. 7 VSS This is a ground pin. 8 VDD Power supply pin for core logic operation. This pin is reset signal input. When the pin is low, initialization of the chip is 9 RES# executed. 10 SCL When I²C mode is selected,D2,D1 should be tied together and serve as 11 SDA SDAout,SDAin in application and D0 is the serial clock input,SCL. This pin is segment current reference pin. A resistor should be connected between this 12 IREF pin and VSS. This pin is the input pin for the voltage output high level for COM signals. 13 VCOMH A capacitor should be connected between this pin and VSS. Power supply for panel driving voltage. This is also the most positive power 14 VCC voltage supply pin. When charge pump is enabled, a capacitor should be connected between this pin and VSS. Table 3.1 Status VBAT VDD VCC Enable charge pump Connect to external Connect to external A capacitor should be connected VBAT source VDD source between this pin and VSS Disable charge pump Keep float Connect to external Connect to external VCC source VDD source MULTI-INNO TECHNOLOGY CO.,LTD.
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