DOCSLIB.ORG

14 Recent Attacks and Defenses on FPGA-Based Systems

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
14 Recent Attacks and Defenses on FPGA-Based Systems Recent Attacks and Defenses on FPGA-based Systems JILIANG ZHANG, Hunan University, China GANG QU, University of Maryland, College Park, USA Field-programmable gate array (FPGA) is a kind of programmable chip that is widely used in many areas, including automotive electronics, medical devices, military and consumer electronics, and is gaining more popularity. Unlike the application specific integrated circuits (ASIC) design, an FPGA-based system hasits own supply-chain model and design flow, which brings interesting security and trust challenges. In this sur- vey, we review the security and trust issues related to FPGA-based systems from the market perspective, where we model the market with the following parties: FPGA vendors, foundries, IP vendors, EDA tool ven- dors, FPGA-based system developers, and end-users. For each party, we show the security and trust problems they need to be aware of and the associated solutions that are available. We also discuss some challenges and opportunities in the security and trust of FPGA-based systems used in large-scale cloud and datacenters. CCS Concepts: • Security and privacy → Security in hardware; Hardware security implementation; Hard- ware attacks and countermeasures; • Hardware → Reconfigurable logic and FPGAs; Additional Key Words and Phrases: FPGA security, FPGA trust, hardware security ACM Reference format: 14 Jiliang Zhang and Gang Qu. 2019. Recent Attacks and Defenses on FPGA-based Systems. ACM Trans. Recon- figurable Technol. Syst. 12, 3, Article 14 (August 2019), 24 pages. https://doi.org/10.1145/3340557 1 INTRODUCTION With the rapid development of information technology, ICs have become the base of information systems and been applied widely in various fields such as industrial control, transportation, mo- bile communication, and financial payment. Currently, information security areas mainly focus on system security such as network communication security, operating system security, and data- base security. However, with the wide use of ICs, hardware security issues bring serious threats not only to personal privacy and security but also to the national economy and even national de- fense security. For instance, the intellectual property (IP) infringement to high-end chips such as cloning and reverse engineering brings the loss of approximately $250 billion dollars and 750,000 jobs annually [2]. It was reported by IEEE Spectrum that in 2007 the Syrian radar defense system This work is supported by the National Natural Science Foundation of China under Grant No. 61874042 and 61602107, the Hu-Xiang Youth Talent Program under Grant No. 2018RS3041, the Key Research and Development Program of Hunan Province under Grant No. 2019GK2082, and the Fundamental Research Funds for the Central Universities. Authors’ addresses: J. Zhang (corresponding author), College of Computer Science and Electronic Engineering, Hunan Uni- versity, Changsha, China, and also with Cyberspace Security Research Center, Peng Cheng Laboratory, Shenzhen, China; email: [email protected]; G. Qu, Department of Electrical and Computer Engineering, University of Maryland, College Park, Maryland, USA; email: [email protected]. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]. © 2019 Association for Computing Machinery. 1936-7406/2019/08-ART14 $15.00 https://doi.org/10.1145/3340557 ACM Transactions on Reconfigurable Technology and Systems, Vol. 12, No. 3, Article 14. Pub. date: August 2019. 14:2 J. Zhang and G. Qu did not provide necessary warning against the guided missiles from Israel. According to scientists’ analysis, it was because a commercial chip used in Syrian radar defense systems was implanted with a hardware Trojan or backdoor in the fabrication process. When receiving the predesigned program from an adversary, the chip will occur malfunction, resulting in the failure of radar [3]. According to the report in 2012, a Microsemi chip widely applied in Internet communication, fi- nance, industrial control, and military systems was implanted with a backdoor that can be used to extract sensitive information [4]. In 2014, for the appeal case of “HKIAC/A11022 arbitration” heard by Hong Kong High Court, VIA Technologies Inc. admitted the existence of a backdoor in their VT3421 chip. Customers do not know the backdoor and cannot trigger it by themselves. Nev- ertheless, VIA Technologies can easily start the backdoor to obtain some sensitive data including conversation, address book, credit card, and location information from end devices (e.g., mobile phone, set-top-box). The causes of hardware security issues are multiple and complex, in which the primary causes are outsourcing of IC fabrication and IP reuse. Field Programmable Gate Array (FPGA) is a kind of programmable chip and regarded as a semi- custom circuit in the ASIC area, which is not limited by the number of gates comparing with pre- vious programmable chips while overcoming the shortcomings of the custom circuit. It also brings other advantages such as shorter time-to-market and lower non-recurring engineering costs. FP- GAs have been applied in various areas, including automatic electronics, military, consumer elec- tronics, and medical service, and have recently been adopted in large-scale cloud datacenters and flexible System-on-Chips (SoCs)16 [ ]. The battle between ASIC and FPGA has been around for more than three decades and it will not end in the near future. With the advances in semiconductor technologies and the increased design complexity, FPGA has become a design platform for a large variety of systems, which we refer to as FPGA-based systems. IP is a fundamental part of FPGA systems. Unlike ASIC, an FPGA bitstream is essentially a binary file that is more vulnerable to various attacks: adversaries can easily obtain decrypted FPGA bitstream files by wire-tap7 [ ]; adversaries can reverse engineer FPGA design to steal valuable IP information [78]; adversaries can directly sell cloned IPs/systems or integrate IPs into their own systems; adversaries can replay and attack the previous system version with vulnerabilities [75], which may bring serious threats to security-critical areas using FPGA-based systems; adversaries can even conduct remote side-channel attacks without phys- ical access or proximity to the hardware when FPGAs are adopted in cloud and datacenters or integrated into SoCs [16]. Therefore, with the popularity of FPGA applications, the FPGA sys- tem security issues attract much attention [7–11, 22]. There are many excellent tutorials, surveys, and books on all aspects of the FPGA-based system design. In the next section, we will provide a short description of these works and define the scope of this survey to distinguish our work from theirs. 2 RELATED SURVEYS The fundamentals of FPGA-based system design can be found in a handful of textbooks such as Reference [120]. A survey on the architecture and design challenges of modern commercial FPGA is given in Reference [121]. As the first comprehensive survey on FPGA design automation, Refer- ence [8] elaborates both the basics and new advances in all major phases in the FPGA design flow. These and many other similar works focus on FPGA concepts and design issues of FPGA-based systems, security, and trust are not discussed. The 2004 paper by Wollinger et al. [9] is the first survey on FPGA security covering the fol- lowing three topics: the advantages of using FPGA for cryptographic applications; the security vulnerabilities and existing attacks to FPGAs; and the available countermeasures against these attacks. Drimer’s 2008 report [7] gave a more in-depth discussion and classification of attacks ACM Transactions on Reconfigurable Technology and Systems, Vol. 12, No. 3, Article 14. Pub. date: August 2019. Recent Attacks and Defenses on FPGA-based Systems 14:3 Fig. 1. The supply-and-demand flows in the FPGA-based system market. “→”: service requesting; “→→”: service providing. to FPGA-based systems. It also provided more modern issues such as trust, adversary classifica- tion, and security metrics. Majzoobi et al. [10] presented a complementary view of the problem in their 2011 book chapter entitled “FPGA-Oriented Security.” In addition to a detailed analysis of vulnerabilities in both FPGA synthesis flow and FPGA-based systems, they discuss FPGA se- curity primitives by the examples of physical unclonable functions (PUF), true random number generators (TRNG), and top FPGA security challenges. Another 2011 book [11], Security Trends for FPGAs: From Secured to Secure Reconfigurable Systems, consists of contributions from the following five topics: security FPGA analysis, side-channel attack, countermeasures against physical attacks, FPGA TRNG, and embedded systems security for FPGA. In 2015, Druyer et al. [1, 12] summarized security features in Modern FPGAs and compared relevant functionalities of the most advanced products of Altera, Microsemi, and Xilinx to evaluate whether the security features in the current FPGAs address the threats. Besides the above survey
Load more

Recommended publications
  • A Thesis Entitled Design of a Hardware Security PUF Immune To
    A Thesis Entitled Design of a Hardware Security PUF Immune to Machine Learning Attacks By Nitin K. Pundir Submitted to the Graduate Faculty as partial fulfillment of the requirements for the Master of Science Degree in Electrical Engineering ________________________________________ Dr. Mohammed Niamat, Committee Chair ________________________________________ Dr. Mansoor Alam, Committee Member ________________________________________ Dr. Hong Wang, Committee Member ________________________________________ Dr. Amanda Bryant-Friedrich, Dean College of Graduate Studies The University of Toledo December 2017 Copyright 2017, Nitin K. Pundir This document is copyrighted material. Under copyright law, no parts of this document may be reproduced without the expressed permission of the author. An Abstract of Design of a Hardware Security PUF Immune to Machine Learning Attacks By Nitin K. Pundir Submitted to the Graduate Faculty as partial fulfillment of the requirements for the Master of Science Degree in Electrical Engineering The University of Toledo December 2017 The technology and cyberspace sector is losing billions each year to hardware security threats. The incidents of usage of counterfeiting chips are doubling each year. The Electronic Resellers Association International (ERAI) reported that in the year 2011 more than 1300 counterfeits were reported. The incidents were double of what were reported in 2008. The report from Federal Contracts acknowledges the threats emanating from counterfeit chips and says it threatens the successful operations of US Weapon Systems. Meanwhile, electronic counterfeiting of chips continues to be a very profitable business on the dark web by crooked operatives. Physical Unclonable Functions (PUFs) are emerging as hardware security primitives to deal with security issues such as cloning, hacking, copying, and detection of Trojans.
    [Show full text]
  • Infrastructure and Primitives for Hardware Security in Integrated Circuits
    INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS by ABHISHEK BASAK Submitted in partial fulfillment for the degree of Doctor of Philosophy in Electrical Engineering and Computer Science CASE WESTERN RESERVE UNIVERSITY May 2016 CASE WESTERN RESERVE UNIVERSITY SCHOOL OF GRADUATE STUDIES We hereby approve the dissertation of ABHSIHEK BASAK Candidate for the degree of Doctor of Philosophy Committee Chair Swarup Bhunia Committee Member Frank Merat Committee Member Soumyajit Mandal Committee Member Ming-Chun Huang Committee Member Sandip Ray Date of Defense 03/15/2016 We also certify that any written approval has been obtained for any proprietary material contained therein. To my Family and Friends i Contents List of Tables vi List of Figures viii Abbreviations xii Acknowledgements xiv Abstract xvi 1 Introduction 1 1.1 What are Counterfeit ICs? . 3 1.2 Related Work on Countermeasures against Counterfeit ICs . 6 1.3 Major Contributions of Research (Part I) . 8 1.4 System-on-Chip (SoC) Security . 11 1.4.1 Background on SoC Security Policies . 13 1.4.2 Issues with Current SoC Design Trends . 15 1.4.3 Related Work . 17 1.5 Major Contributions of Research (Part II) . 18 1.6 Organization of Thesis . 21 2 Antifuse based Active Protection against Counterfeit ICs 22 2.1 C-Lock Methodology . 23 2.1.1 Business Model . 25 2.1.2 Pin Lock Structure . 26 2.1.3 Lock Insertion in I/O Port Circuitry . 27 2.1.4 Programming the Key . 28 2.1.5 Design Circuitry for Chip Unlocking . 29 2.1.5.1 Lock/Unlock Controller State Transitions .
    [Show full text]
  • Is Hardware More Secure Than Software?
    Is Hardware More Secure than Software? Lianying Zhao Carleton University David Lie University of Toronto Abstract—Computer hardware is usually perceived as more secure than software. However, recent trends lead us to reexamine this belief. We draw attention to the “firmwarization” of hardware and argue for revisiting the role of hardware and software in systems security. TRADITIONALLY, computer systems can be quick search on Google Scholar returns at least thought of as composed of two types of compo- 1,750 academic papers with the title containing nents: hardware and software. Hardware refers to both “hardware” and “security” as of the time the physical components that perform a fixed set of writing. While this is a conservative under- of operations. Software on the other hand, defines approximation of the actual number of such pa- logical components, instantiated as data and in- pers (as it only checks the title), and regardless structions, which can specify arbitrary sequences of whether these papers propose a larger role of hardware operations, as well as inputs to those of hardware in security, or seek to examine the operations. A function can be implemented using vulnerability of hardware to security attacks, the a various mixes of hardware and software compo- sheer number informally illustrates that the se- nents (or even entirely in hardware). The mix of curity community has a strong interest in the hardware and software can have implications on relationship between computer hardware and se- certain properties of the function implementation curity. Another recent trend is the implementation (e.g., performance or security). of hardware mechanisms to address well-known Hardware Security.
    [Show full text]
  • Introduction to Hardware Security
    Electronics 2015, 4, 763-784; doi:10.3390/electronics4040763 OPEN ACCESS electronics ISSN 2079-9292 www.mdpi.com/journal/electronics Review Introduction to Hardware Security Yier Jin Department of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32765, USA; E-Mail: [email protected]; Tel.: +1-407-823-5321; Fax: +1-407-823-5835 Academic Editor: Dhananjay S. Phatak Received: 3 August 2015 / Accepted: 5 October 2015 / Published: 13 October 2015 Abstract: Hardware security has become a hot topic recently with more and more researchers from related research domains joining this area. However, the understanding of hardware security is often mixed with cybersecurity and cryptography, especially cryptographic hardware. For the same reason, the research scope of hardware security has never been clearly defined. To help researchers who have recently joined in this area better understand the challenges and tasks within the hardware security domain and to help both academia and industry investigate countermeasures and solutions to solve hardware security problems, we will introduce the key concepts of hardware security as well as its relations to related research topics in this survey paper. Emerging hardware security topics will also be clearly depicted through which the future trend will be elaborated, making this survey paper a good reference for the continuing research efforts in this area. Keywords: hardware security; hardware trojan; proof-carrying hardware; trusted hardware platform 1. Introduction Hardware has long been viewed as a trusted party supporting the whole computer system and is often treated as an abstract layer running instructions passed from the software layer.
    [Show full text]
  • Design and Implementation of the Ascend Secure Processor
    204 IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING, VOL. 16, NO. 2, MARCH/APRIL 2019 Design and Implementation of the Ascend Secure Processor Ling Ren , Christopher W. Fletcher, Albert Kwon, Marten van Dijk, and Srinivas Devadas Abstract—This paper presents post-silicon results for the Ascend secure processor, taped out in a 32 nm SOI process. Ascend prevents information leakage over a processor’s digital I/O pins—in particular, the processor’s requests to external memory—and certifies the program’s execution by verifying the integrity of the external memory. In secure processor design, encrypting main memory is not sufficient for security because where and when memory is accessed reveals secret information. To this end, Ascend is equipped with a hardware Oblivious RAM (ORAM) controller, which obfuscates the address bus by reshuffling memory as it is accessed. To our knowledge, Ascend is the first prototyping of ORAM in custom silicon. Ascend has also been carefully engineered to ensure its timing behaviors are independent of user private data. In 32 nm silicon, all security components combined (the ORAM controller, which includes 12 AES rounds and one SHA-3 hash unit) impose a moderate area overhead of 0.51 mm2. Post tape-out, the security components of the Ascend chip have been successfully tested at 857 MHz and 1.1 V,at which point they consume 299 mW of power. Index Terms—Computation outsourcing, secure processors, oblivious RAM, integrity verification, ASIC design Ç 1INTRODUCTION S embedded and mobile devices become ubiquitous, protects the user’s private data while it is being computed Ausers have become more computationally limited and upon.
    [Show full text]
  • Using Emerging Technologies for Hardware Security Beyond Pufs an Chen1, X
    Using Emerging Technologies for Hardware Security Beyond PUFs An Chen1, X. Sharon Hu2, Yier Jin3, Michael Niemier2, Xunzhao Yin2 (1) ITRS ERD, (2) University of Notre Dame, (3) University of Central Florida Abstract—We discuss how the unique I-V characteristics The first category of I-V characteristics of interest (Sec. offered by emerging, post-CMOS transistors can be used to III) are those exhibiting tunable polarity, which appear in enhance hardware security. Different from most existing work devices such as carbon nanotube [5], graphene [6], silicon that exploits emerging technologies for hardware security, we (i) focus on transistor characteristics that either do not exist nanowire (SiNW) transistors [7], and most recently transition in, or are difficult to duplicate with MOSFETs, and (ii) aim to metal dichalcogenide (TMD) tunnel FETs (TFETs) [8], all of move beyond hardware implementations of physically unclonable which have already been fabricated experimentally. Tunable functions (PUFs) and random number generators (RNGs). polarity could be exploited for IP protection and hence would help prevent the counterfeiting of IC components. I. INTRODUCTION The second category of I-V characteristics (Sec. IV) can be Like performance, power, and reliability, hardware security broadly classified as devices with atypical switching behaviors. is becoming a critical design consideration. Hardware security We consider I-V curves that either have tunable hysteresis threats in the IC supply chain, include counterfeiting of semi- or are bell shaped. Devices such as the negative capacitance conductor components, side-channel attacks, invasive/semi- FETs (NCFETs) [9] and ionic FETs [10] display tunable invasive reverse engineering, and IP piracy.
    [Show full text]
  • HARDWARE SECURITY KNOWLEDGE AREA Issue 1.0
    HARDWARE SECURITY KNOWLEDGE AREA Issue 1.0 AUTHOR: Ingrid Verbauwhede – KU Leuven EDITOR: Andrew Martin – Oxford University George Danezis – University College London REVIEWERS: Srinivas Devadas – Massachusetts Institute of Technology Paul England – Microsoft Elisabeth Oswald – University of Bristol Mark Ryan – University of Birmingham © Crown Copyright, The National Cyber Security Centre 2019. This information is licensed under the Open Government Licence v3.0. To view this licence, visit http://www.nationalarchives.gov.uk/doc/open-government-licence/ When you use this information under the Open Government Licence, you should include the following attribution: CyBOK Hardware Security Knowledge Area Issue 1.0 © Crown Copyright, The National Cyber Security Centre 2019, licensed under the Open Government Licence http://www.nationalarchives.gov.uk/doc/open-government-licence/. The CyBOK project would like to understand how the CyBOK is being used and its uptake. The project would like organisations using, or intending to use, CyBOK for the purposes of education, training, course development, professional development etc. to contact it at [email protected] to let the project know how they are using CyBOK. Issue 1.0 is a stable public release of the Hardware Security Knowledge Area. However, it should be noted that a fully collated CyBOK document which includes all the Knowledge Areas is anticipated to be released in October 2019. This will likely include updated page layout and formatting of the individual Knowledge Areas. Hardware Security Ingrid Verbauwhede October 2019 INTRODUCTION Hardware security covers a broad range of topics from trusted computing to Trojan circuits. To classify these topics we follow the different hardware abstraction layers as introduced by the Y-chart of Gajski & Kuhn.
    [Show full text]
  • Iotcp: a Novel Trusted Computing Protocol for Iot
    Journal of The Colloquium for Information System Security Education (CISSE) Edition 6, Issue 1 - September 2018 IoTCP: A Novel Trusted Computing Protocol for IoT Shuangbao (Paul) Wang, Amjad Ali, Ujjwal Guin, Anthony (Tony) Skjellum Abstract - The ability to understand, predict, secure and exploit the vast array of heterogeneous network of things is phenomenal. With the ever-increasing threats to cyber physical systems and Internet of Things, security on those networks of data-gathering sensors and systems has become a unique challenge to industries as well as to military in the battlefield. To address those problems, we propose a trusted computing protocol that employs discrete Trusted Platform Modules and Hardware Security Modules for key management, a blockchain-based package verification algorithm for over-the-air security, and a secure authentication mechanism for data communication. The IoT-based Trusted Computing Protocol implements integrated hardware security, strong cryptographic hash functions, and peer-based blockchain trust management. We have tested the protocol under various circumstances where devices have built-in securities while others do not. We apply the new protocol to a SCADA system that contains more than 3,000 edge devices. The preliminary results show that proposed protocol establishes trust, improves security, integrity, and privacy. Keywords Trusted Computing, IoT, IoBT, Blockchain, TPM 1 Journal of The Colloquium for Information System Security Education (CISSE) Edition 6, Issue 1 - September 2018 1 INTRODUCTION The Internet of Things (IoT) is fed with billions of devices and trillions of sensors. IoT networks undergird critical infrastructure, such as electric grids, transportation hubs, and nuclear power plants. They also link to systems containing valuable and sensitive personal information, such as hospitals, schools, and government institutions.
    [Show full text]
  • Hardware Security, Vulnerabilities, and Attacks: a Comprehensive Taxonomy∗
    Hardware Security, Vulnerabilities, and Attacks: A Comprehensive Taxonomy∗ Paolo Prinetto and Gianluca Roascio Cybersecurity National Laboratory, Consorzio Interuniversitario Nazionale per l'Informatica Dipartimento di Automatica e Informatica, Politecnico di Torino, Turin, Italy [email protected] [email protected] Abstract Information Systems, increasingly present in a world that goes towards complete dig- italisation, can be seen as complex systems at the base of which is the hardware. When dealing with the security of these systems to stop possible intrusions and malicious uses, the analysis must necessarily include the possible vulnerabilities that can be found at the hardware level, since their exploitation can make all defences implemented at web or soft- ware level ineffective. In this paper, we propose a meaningful and comprehensive taxonomy for the vulnerabilities affecting the hardware and the attacks that exploit them to compro- mise the system, also giving a definition of Hardware Security, in order to clarify a concept often confused with other domains, even in the literature. 1 Introduction Every process and even every object that surrounds us is today managed by computing systems, and every day an endless amount of data is produced by these devices and exchanged with the external world, thanks to advanced connection capabilities. Yet, right because of this deep digitisation of our lives, this information sea is full of sensitive data that reveal our most private aspects. Innovation, at least initially, has not taken into account security and privacy issues, which instead must be seriously addressed. According to US National Institute of Standards and Technology (NIST)1, information security is defined as \the protection of information and information systems from unauthorised access, use, disclosure, disruption, modification, or destruction"[3], i.e., the protection against any misuse of Information Systems assets, which can be information itself or properties of the system.
    [Show full text]
  • Hardware Security Knowledge Area Issue 1.0
    Hardware Security Knowledge Area Issue 1.0 Ingrid Verbauwhede KU Leuven EDITOR Andrew Martin Oxford University George Danezis University College London REVIEWERS Srinivas Devadas Massachusetts Intitute of Technology Paul England Microsoft Elisabeth Oswald University of Bristol Mark Ryan University of Birmingham The Cyber Security Body Of Knowledge www.cybok.org COPYRIGHT © Crown Copyright, The National Cyber Security Centre 2019. This information is licensed under the Open Government Licence v3.0. To view this licence, visit: http://www.nationalarchives.gov.uk/doc/open-government-licence/ When you use this information under the Open Government Licence, you should include the following attribution: CyBOK © Crown Copyright, The National Cyber Security Centre 2018, li- censed under the Open Government Licence: http://www.nationalarchives.gov.uk/doc/open- government-licence/. The CyBOK project would like to understand how the CyBOK is being used and its uptake. The project would like organisations using, or intending to use, CyBOK for the purposes of education, training, course development, professional development etc. to contact it at con- [email protected] to let the project know how they are using CyBOK. Issue 1.0 is a stable public release of the Hardware Security Knowledge Area. However, it should be noted that a fully-collated CyBOK document which includes all of the Knowledge Areas is anticipated to be released by the end of July 2019. This will likely include updated page layout and formatting of the individual Knowledge Areas KA Hardware Security j October 2019 Page 1 The Cyber Security Body Of Knowledge www.cybok.org INTRODUCTION Hardware security covers a broad range of topics from trusted computing to Trojan circuits.
    [Show full text]
  • A Security Assessment of Trusted Platform Modules
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Dartmouth Digital Commons (Dartmouth College) Dartmouth College Dartmouth Digital Commons Dartmouth College Undergraduate Theses Theses and Dissertations 6-28-2007 A Security Assessment of Trusted Platform Modules Evan R. Sparks Dartmouth College Follow this and additional works at: https://digitalcommons.dartmouth.edu/senior_theses Part of the Computer Sciences Commons Recommended Citation Sparks, Evan R., "A Security Assessment of Trusted Platform Modules" (2007). Dartmouth College Undergraduate Theses. 53. https://digitalcommons.dartmouth.edu/senior_theses/53 This Thesis (Undergraduate) is brought to you for free and open access by the Theses and Dissertations at Dartmouth Digital Commons. It has been accepted for inclusion in Dartmouth College Undergraduate Theses by an authorized administrator of Dartmouth Digital Commons. For more information, please contact [email protected]. A Security Assessment of Trusted Platform Modules Computer Science Technical Report TR2007-597 Evan R. Sparks [email protected] Senior Honors Thesis http://www.cs.dartmouth.edu/∼pkilab/sparks/ Department of Computer Science Dartmouth College Advisor: Dr. Sean W. Smith June 28, 2007 1 Contents 1 Introduction 4 2 Motivation 6 3 Background 7 3.1 The TCG Architecture . 7 3.2 Trusted Platform Modules . 7 3.3 The Low Pin Count Bus . 9 4 Experimental setup 9 4.1 Software attack . 10 4.2 Reset attack . 10 4.3 Timing attack . 11 5 Discussion of attacks 11 5.1 Software attack . 12 5.2 Reset attack . 16 5.3 Timing attack . 19 6 Countermeasures 21 6.1 Software defenses .
    [Show full text]
  • Security of Cloud Fpgas: a Survey
    Security of Cloud FPGAs: A Survey CHENGLU JIN, New York University VASUDEV GOHIL, Texas A&M University RAMESH KARRI, New York University JEYAVIJAYAN RAJENDRAN, Texas A&M University Integrating Field Programmable Gate Arrays (FPGAs) with cloud computing instances is a rapidly emerging trend on commercial cloud computing platforms such as Amazon Web Services (AWS), Huawei cloud, and Alibaba cloud. Cloud FPGAs allow cloud users to build hardware accelerators to speed up the computation in the cloud. However, since the cloud FPGA technology is still in its infancy, the security implications of this integration of FPGAs in the cloud are not clear. In this paper, we survey the emerging field of cloud FPGA security, providing a comprehensive overview of the security issues related to cloud FPGAs, and highlighting future challenges in this research area. CCS Concepts: • Computer systems organization ! Cloud computing; • Hardware ! Reconfigurable logic and FPGAs; • Security and privacy ! Systems security. Additional Key Words and Phrases: Cloud FPGAs, FPGAs in Data Centers, Cloud FPGA Security ACM Reference Format: Chenglu Jin, Vasudev Gohil, Ramesh Karri, and Jeyavijayan Rajendran. 2020. Security of Cloud FPGAs: A Survey. ACM Comput. Surv. 0, 0, Article 0 ( 2020), 32 pages. 1 INTRODUCTION The last few decades have witnessed tremendous growth in the need for high-speed computation in the clouds. Solely using CPUs and GPUs can no longer meet the increasing performance demand, in terms of latency, throughput, and efficiency. Due to this, FPGAs have been integrated into cloud computation platforms to allow users to customize their hardware accelerators (to accelerate computationally intensive tasks) in the clouds.
    [Show full text]