COMPUTER SYSTEMS ORGANIZATION Central Processing Unit (CPU)

Home , Sound card

COMPUTER SYSTEMS ORGANIZATION Central processing unit (CPU)

Control unit

Arithmetic logical unit (ALU) I/O devices

Registers Main … … memory Disk Printer

Bus

Fig. 2-1. The organization of a simple computer with one CPU and two I/O devices. A + B

A Registers

ALU input register A B ALU input bus

ALU

ALU output register A + B

Fig. 2-2. The data path of a typical von Neumann machine. public class Interp { static int PC; // program counter holds address of next instr static int AC; // the accumulator, a register for doing arithmetic static int instr; // a holding register for the current instruction static int instr3type; // the instruction type (opcode) static int data3loc; // the address of the data, or −1 if none static int data; // holds the current operand static boolean run3bit = true; // a bit that can be turned off to halt the ma

public static void interpret(int memory[ ], int starting3address) { // This procedure interprets programs for a simple machine with instructions // one memory operand. The machine has a register AC (accumulator), used // arithmetic. The ADD instruction adds an integer in memory to the AC, for e // The interpreter keeps running until the run bit is turned off by the HALT ins // The state of a process running on this machine consists of the memory, the // program counter, the run bit, and the AC. The input parameters consist of // of the memory image and the starting address.

PC = starting3address; while (run3bit) { instr = memory[PC]; // fetch next instruction into instr PC = PC + 1; // increment program counter instr3type = get3instr3type(instr); // determine instruction type data3loc = find3data(instr, instr3type);// locate data (−1 if none) if (data3loc >= 0) // if data3loc is −1, there is no operand data = memory[data3loc]; // fetch the data execute(instr3type, data); //execute instruction }

}

private static int get3instr3type(int addr) { ... } private static int find3data(int instr, int type) { ... } private static void execute(int type, int data){ ... } }

Fig. 2-3. An interpreter for a simple computer (written in Java). S1 S2 S3 S4 S5 Instruction Instruction Operand Instruction Write fetch decode fetch execution back unit unit unit unit unit

(a)

S1: 1 2 3 4 5 6 7 8 9 S2: 1 2 3 4 5 6 7 8 S3: 1 2 3 4 5 6 7 … S4: 1 2 3 4 5 6 S5: 1 2 3 4 5

123456789 Time (b)

Fig. 2-4. (a) A five-stage pipeline. (b) The state of each stage as a function of time. Nine clock cycles are illustrated. S1 S2 S3 S4 S5

Instruction Operand Instruction Write decode fetch execution back Instruction unit unit unit unit fetch unit Instruction Operand Instruction Write decode fetch execution back unit unit unit unit

Fig. 2-5. (a) Dual five-stage pipelines with a common instruction fetch unit. S4

ALU

ALU S1 S2 S3 S5

Instruction Instruction Operand Write fetch decode fetch LOAD back unit unit unit unit

STORE

Floating point

Fig. 2-6. A superscalar processor with five functional units. Control unit

Broadcasts instructions

8 × 8 Processor/memory grid Processor

Memory

Fig. 2-7. An array processor of the ILLIAC IV type. Local memories

Shared Shared memory memory

CPU CPU CPU CPU CPU CPU CPU CPU

Bus Bus (a) (b)

Fig. 2-8. (a) A single-bus multiprocessor. (b) A multicomputer with local memories. AddressAddress 1 Cell Address

0 0 0 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 16 bits 7 7 (c) 8 12 bits 9 (b) 10 11 8 bits (a)

Fig. 2-9. Three ways of organizing a 96-bit memory. 2222222222222222222222222222222222 22222222222222222222222222222222221 Computer1 Bits/cell 1 1 1 1 12222222222222222222222222222222222Burroughs B17001 1 1 22222222222222222222222222222222221 IBM PC1 8 1 1 1 1 12222222222222222222222222222222222DEC PDP-81 12 1 22222222222222222222222222222222221 IBM 11301 16 1 1 1 1 12222222222222222222222222222222222DEC PDP-151 18 1 12222222222222222222222222222222222XDS 9401 24 1 22222222222222222222222222222222221 Electrologica X81 27 1 1 1 1 12222222222222222222222222222222222XDS Sigma 91 32 1 22222222222222222222222222222222221 Honeywell 61801 36 1 1 1 1 12222222222222222222222222222222222CDC 36001 48 1 22222222222222222222222222222222221 CDC Cyber1 60 1

Fig. 2-10. Number of bits per cell for some historically interesting commercial computers. AddressBig endian Little endian Address 0 0 1 2 3 3 2 1 0 0 4 4 5 6 7 7 6 5 4 4 8 8 9 10 11 11 10 9 8 8 12 12 13 14 15 15 14 13 12 12

Byte Byte 32-bit word 32-bit word (a) (b)

Fig. 2-11. (a) Big endian memory. (b) Little endian memory. Transfer from big endian to Transfer and Big endian Little endian little endian swap 0 J I M M I J 0 M I J J0I M 4 S M I T TI M S 4 T I M S S4M I T 8 H 0 0 0 00 0 H 8 0 0 0 H H80 0 0 12 0 0 0 21 00 0 21 12 21 0 0 0 0120 0 21 16 0 0 1 4 00 1 4 16 4 1 0 0 0160 1 4

(a) (b) (c) (d)

Fig. 2-12. (a) A personnel record for a big endian machine. (b) The same record for a little endian machine. (c) The result of transferring the record from a big endian to a little endian. (d) The result of byte-swapping (c). 22222222222222222222222222222222222222222222222222222 122222222222222222222222222222222222222222222222222222Word size1 Check bits1 Total size1 Percent overhead 1 1 1 1 1 1 12222222222222222222222222222222222222222222222222222281 41 121 50 1 222222222222222222222222222222222222222222222222222221 161 51 211 31 1 1 1 1 1 1 122222222222222222222222222222222222222222222222222222321 61 381 19 1 222222222222222222222222222222222222222222222222222221 641 71 711 11 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222222221281 81 1361 6 1 1222222222222222222222222222222222222222222222222222222561 91 2651 4 1 222222222222222222222222222222222222222222222222222221 5121 101 5221 2 1

Fig. 2-13. Number of check bits for a code that can correct a single error. A A A

Error 0 0 0 0 1 C C C 1 1 1 1 1 1 11 0 0 0 0 0 Parity bits B B B (a) (b) (c)

Fig. 2-14. (a) Encoding of 1100. (b) Even parity added. (c) Error in AC. Memory word 1111000010101110 0 0 1 0 1 1 1 0 0 0 0 0 1 0 1 1 0 1 1 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Parity bits

Fig. 2-15. Construction of the Hamming code for the memory word 1111000010101110 by adding 5 check bits to the 16 data bits. Main memory CPU

Cache

Bus

Fig. 2-16. The cache is logically between the CPU and main memory. Physically, there are several possible places it could be located. 4-MB memory chip

Connector

Fig. 2-17. A single inline memory module (SIMM) holding 32 MB. Two of the chips control the SIMM. Registers

Cache

Main memory

Magnetic disk

Tape Optical disk

Fig. 2-18. A five-level memory hierarchy. Intersector gap D or irec ct E tion se C Pream o 1 s ble f ta bit C di 6 da sk 409 r ot 40 a 96 tio da n Read/write ta b e it bl head s am Direction re E P of arm C C motion Width of 1 bit is Disk Track 0.1 to 0.2 microns arm width is 5Ð10 microns

Fig. 2-19. A portion of a disk track. Two sectors are illustrated. Read/write head (1 per surface) Surface 7

Surface 6 Surface 5

Surface 4 Surface 3 Direction of arm motion Surface 2 Surface 1

Surface 0

Fig. 2-20. A disk with four platters. 222222222222222222222222222222222222222222222222222222222222 2222222222222222222222222222222222222222222222222222222222221 Parameters1 LD 5.25′′ 1 HD 5.25′′ 1 LD 3.5′′ 1 HD 3.5′′ 1 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222222222222222Size (inches)1 5.251 5.251 3.51 3.5 1 2222222222222222222222222222222222222222222222222222222222221 Capacity (bytes)1 360K1 1.2M1 720K1 1.44M 1 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222222222222222Tracks1 401 801 801 80 1 2222222222222222222222222222222222222222222222222222222222221 Sectors/track1 91 151 91 18 1 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222222222222222Heads1 21 21 21 2 1 1222222222222222222222222222222222222222222222222222222222222Rotations/min1 3001 3601 3001 300 1 2222222222222222222222222222222222222222222222222222222222221 Data rate (kbps)1 2501 5001 2501 500 1 1 1 1 1 1 1 2222222222222222222222222222222222222222222222222222222222221 Type1 Flexible1 Flexible1 Rigid1 Rigid 1

Fig. 2-21. Characteristics of the four kinds of floppy disks. 222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222Name1 Data bits1 Bus MHz1 MB/sec 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222SCSI-11 81 51 5 1 1222222222222222222222222222222222222222222222222Fast SCSI1 81 101 10 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222Wide Fast SCSI1 161 101 20 1 1222222222222222222222222222222222222222222222222Ultra SCSI1 81 201 20 1 1 1 1 1 1 1222222222222222222222222222222222222222222222222Wide Ultra SCSI1 161 201 40 1 1222222222222222222222222222222222222222222222222Ultra2 SCSI1 81 401 40 1 2122222222222222222222222222222222222222222222222Wide Ultra2 SCSI1 161 401 80 1

Fig. 2-22. Some of the possible SCSI parameters. Strip 0 Strip 1 Strip 2 Strip 3 (a) Strip 4 Strip 5 Strip 6 Strip 7 RAID level 0 Strip 8 Strip 9 Strip 10 Strip 11

Strip 0 Strip 1 Strip 2 Strip 3 Strip 0 Strip 1 Strip 2 Strip 3 RAID (b) Strip 4 Strip 5 Strip 6 Strip 7 Strip 4 Strip 5 Strip 6 Strip 7 level 1 Strip 8 Strip 9 Strip 10 Strip 11 Strip 8 Strip 9 Strip 10 Strip 11

Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 (c) RAID level 2

Bit 1 Bit 2 Bit 3 Bit 4 Parity (d) RAID level 3

Strip 0 Strip 1 Strip 2 Strip 3 P0-3 (e) Strip 4 Strip 5 Strip 6 Strip 7 P4-7 RAID level 4 Strip 8 Strip 9 Strip 10 Strip 11 P8-11

Strip 0 Strip 1 Strip 2 Strip 3 P0-3 Strip 4 Strip 5 Strip 6 P4-7 Strip 7

(f) Strip 8 Strip 9 P8-11 Strip 10 Strip 11 RAID level 5 Strip 12 P12-15 Strip 13 Strip 14 Strip 15 P16-19 Strip 16 Strip 17 Strip 18 Strip 19

Fig. 2-23. RAID levels 0 through 5. Backup and parity drives are shown shaded. Spiral groove

Pit Land

2K block of user data

Fig. 2-24. Recording structure of a Compact Disc or CD-ROM. Symbols of … 14 bits each

42 Symbols make 1 frame Frames of 588 bits, … each containing 24 data bytes Preamble 98 Frames make 1 sector Mode 1 Data ECC sector (2352 bytes) Bytes 16 2048 288

Fig. 2-25. Logical data layout on a CD-ROM. Printed label

Protective lacquer Dark spot in the Reflective gold layer dye layer burned Dye layer by laser when 1.2 mm writing

Polycarbonate Substrate

Direction of motion Lens

Photodetector Prism

Infrared laser diode

Fig. 2-26. Cross section of a CD-R disk and laser (not to scale). A silver CD-ROM has a similar structure, except without the dye layer and with a pitted aluminum layer instead of a gold layer. Polycarbonate substrate 1 Semireflective 0.6 mm layer Single-sided disk Aluminum reflector Adhesive layer Aluminum 0.6 mm reflector Single-sided disk Semireflective Polycarbonate substrate 2 layer

Fig. 2-27. A double-sided, dual layer DVD disk. SCSI controller Sound card

Modem

Card cage Edge connector

Fig. 2-28. Physical structure of a personal computer. Monitor Floppy Hard Keyboard disk drive disk drive

Floppy Hard Video Keyboard CPU Memory disk disk controller controller controller controller

Bus

Fig. 2-29. Logical structure of a simple personal computer. Memory bus

CPU PCI Main SCSI cache bridge memory bus

SCSI SCSI SCSI Video Network scanner disk controller controller controller

PCI bus

Sound Printer ISA Modem card controller bridge

ISA bus

Fig. 2-30. A typical modern PC with a PCI bus and an ISA bus. The modem and sound card are ISA devices; the SCSI controller is a PCI device. Horizontal scan Grid Screen Electron gun Spot on screen

Vacuum Vertical deflection plate Vertical retrace Horizontal retrace (a) (b)

Fig. 2-31. (a) Cross section of a CRT. (b) CRT scanning pattern. Liquid crystal Rear glass plate Rear Front glass plate electrode Front electrode Rear polaroid Front polaroid

@À Dark z Bright Light source

@À

Notebook computer (b) (a)

Fig. 2-32. (a) The construction of an LCD screen. (b) The grooves on the rear and front plates are perpendicular to one another. Character Attribute Analog video signal Main Video CPU memory board Monitor Video A2B2C2 RAM ABC

Bus

Fig. 2-33. Terminal output on a personal computer. Serial I/O card CPU Memory UART RS-232-C connector Terminal Telephone line (analog) ABC ABC Modem Modem

Keyboard

Some signals: Protective ground (1) Transmit (2) Receive (3) Request to send (4) Clear to send (5) Data set ready (6) Common return (7) Carrier detect (8) Data terminal ready (20)

Fig. 2-34. Connection of an RS-232-C terminal to a computer. The numbers in parentheses in the list of signals are the pin numbers. Pointer controlled by mouse

Window Menu

Cut Paste Copy

Mouse buttons

Mouse

Rubber ball

Fig. 2-35. A mouse being used to point to menu items. (a) (b)

Fig. 2-36. (a) The letter ‘‘A’’ on a 5 × 7 matrix. (b) The letter ‘‘A’’ printed with 24 overlapping needles. Laser Rotating octagonal mirror

Drum sprayed and charged

Light beam strikes drum Drum

Toner Scraper Discharger

Heated rollers Blank Stacked paper output

Fig. 2-37. Operation of a laser printer. (a) (b) (c) (d) (e) (f)

Fig. 2-38. Halftone dots for various gray scale ranges. (a) 0–6. (b) 14–20. (c) 28–34. (d) 56–62. (e) 105–111. (f) 161–167. Time 01001011000100 V2 (a) V1 High Low amplitude amplitude Voltage

(b) High Low frequency frequency

(c)

(d)

Phase change

Fig. 2-39. Transmission of the binary number 01001011000100 over a telephone line bit by bit. (a) Two-level signal. (b) Amplitude modulation. (c) Frequency modulation. (d) Phase modulation. ISDN terminal

Digital bit pipe TU To ISDN carrier's NT1 exchange internal ISDN ISDN ISDN network telephone terminal alarm

Customer's equipment Carrier's equipment

Fig. 2-40. ISDN for home use. 2222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222Hex Name Meaning1 Hex Name Meaning 2 1 1 1 0 NUL Null1 10 DLE Data Link Escape 1 1 SOH Start Of Heading1 11 DC1 Device Control 1 1 2 STX Start Of Text1 12 DC2 Device Control 2 1 3 ETX End Of Text1 13 DC3 Device Control 3 1 1 1 4 EOT End Of Transmission1 14 DC4 Device Control 4 1 5 ENQ Enquiry1 15 NAK Negative AcKnowledgem 1 6 ACK ACKnowledgement1 16 SYN SYNchronous idle 1 7 BEL BELl1 17 ETB End of Transmission Bloc 1 1 1 8 BS BackSpace1 18 CAN CANcel 1 9 HT Horizontal Tab1 19 EM End of Medium 1 A LF Line Feed1 1A SUB SUBstitute 1 B VT Vertical Tab1 1B ESC ESCape 1 C FF Form Feed1 1C FS File Separator 1 1 1 D CR Carriage Return1 1D GS Group Separator 1 E SO Shift Out1 1E RS Record Separator 1222222222222222222222222222222222222222222222222222222222222222222222222F SI Shift In1 1F US Unit Separator 2 2222222222222222222222222222222222222222222222222222222222222222222222222 1222222222222222222222222222222222222222222222222222222222222222222222222Hex Char1 Hex Char1 Hex Char1 Hex Char1 Hex Char1 Hex2 1 1 1 1 1 1 1 20 (Space)1 30 01 40 @1 50 P1 60 ‘ 1 70 1 21 !1 31 11 41 A1 51 Q1 61 a1 71 1 22 "1 32 21 42 B1 52 R1 62 b1 72 1 23 #1 33 31 43 C1 53 S1 63 c1 73 1 1 1 1 1 1 1 24 $1 34 41 44 D1 54 T1 64 d1 74 1 25 %1 35 51 45 E1 55 U1 65 e1 75 1 26 &1 36 61 46 F1 56 V1 66 f1 76 1 27 ’ 1 37 71 47 G1 57 W1 67 g1 77 1 1 1 1 1 1 1 28 (1 38 81 48 H1 58 X1 68 h1 78 1 29 )1 39 91 49 I1 59 Y1 69 i1 79 1 2A *1 3A :1 4A J1 5A Z1 6A j1 7A 1 2B + 1 3B ;1 4B K1 5B [1 6B k1 7B 1 2C ,1 3C <1 4C L1 5C \1 6C l1 7C 1 1 = 1 1 1 1 1 2D -1 3D 1 4D M1 5D ]1 6D m1 7D 1 2E .1 3E >1 4E N1 5E ˆ 1 6E n1 7E 12222222222222222222222222222222222222222222222222222222222222222222222222F /1 3F ?1 4F O1 5F 2 1 6F o1 7F 2

Fig. 2-41. The ASCII character set.