To appear in the 22nd International Symposium on Computer Architecture, Santa Magherita Ligure, Italy, June, 1995. Instruction Fetching: Coping with Code Bloat Richard Uhlig David Nagle German National Research Center for Computer Science ECE Department, Carnegie Mellon University Schloβ Birlinghoven, 53757 Sankt Augustin, Germany 4902 Forbes Ave, Pittsburgh, PA 15213
[email protected] [email protected] Trevor Mudge and Stuart Sechrest Joel Emer EECS Department, University of Michigan Digital Equipment Corporation 1301 Beal Ave., Ann Arbor, Michigan 48109-2122 77 Reed Road HLO2-3/J3, Hudson, MA 01749 {tnm,sechrest}@eecs.umich.edu
[email protected] Abstract trends on one important aspect of memory-system design: the fetching of instructions. Previous research has shown that the SPEC benchmarks As application and operating system software evolves to achieve low miss ratios in relatively small instruction caches. This include more features and to become more portable, maintainable paper presents evidence that current software-development prac- and reliable, it also tends to consume more memory resources. tices produce applications that exhibit substantially higher The “bloating” of code affects a memory-system hierarchy at all instruction-cache miss ratios than do the SPEC benchmarks. To levels and in a variety of ways: the larger static sizes of program represent these trends, we have assembled a collection of applica- executables occupy more disk space; the larger working sets of tions, called the Instruction Benchmark Suite (IBS), that provides bloated programs require more physical main memory; bloated a better test of instruction-cache performance. We discuss the programs use virtual memory in a more sparse and fragmented rationale behind the design of IBS and characterize its behavior manner, making their page-table entries less likely to fit in TLBs; relative to the SPEC benchmark suite.