ITRS Past, Present and Future PaoloPaolo GarginiGargini ChairmanChairman ITRSITRS FellowFellow IEEE,IEEE, FellowFellow II--JSAPJSAP
May, 2015 ConFab P.Gargini 1 AgendaAgenda
InIn thethe beginningbeginning
GeometricalGeometrical ScalingScaling
ITRSITRS 1.01.0
EquivalentEquivalent ScalingScaling
PostPost CMOSCMOS
ITRSITRS 2.02.0
3D3D PowerPower ScalingScaling
HeterogeneousHeterogeneous IntegrationIntegration
May, 2015 ConFab P.Gargini 2 TheThe FirstFirst PlanarPlanar IntegratedIntegrated CircuitCircuit ~1961~1961
May, 2015 ConFab P.Gargini 3 Integrated Circuits Economics
Gordon Moore at Fairchild Semiconductors
May, 2015 ConFab P.Gargini 4 MooreMoore’’ss LawLaw -- 19651965
2X/Year ~65,000
May, 2015 ConFab P.Gargini 5 Question April 19, 1965
With unit cost falling as the number of components per circuit rises, by 1975 economics may dictate squeezing as many as 65,000 components on a single silicon chip
What could you do with 65,000 components?
Gordon Moore
May, 2015 ConFab P.Gargini 6 May, 2015 ConFab P.Gargini 7 ENIAC (Electronic Numerical Integrator and Computer)
ENIAC weighted 30 tons and occupied 1500 squared feet of space. May, 2015 ConFab P.Gargini 8 The Semiconductor Business in the 70s
System Designer Product Proprietary Definition
Product Definition Open Semiconductor Market Company
Custom Standard Components Components
System Integration
May, 2015 ConFab P.Gargini 9 The SX-70 The story of the struggle between Fairchild Instruments and Texas Instruments for the contract to supply the integrated circuitry for Polaroid's SX-70 camera, introduced in 1972, is related. Research and development work by both companies is described. The problems caused by Polaroid's secrecy regarding the overall camera design are highlighted
IEEE Spectrum archive Volume 26 Issue 5, May 1989
May, 2015 ConFab P.Gargini 10 Phase 1 First Age of Scaling (Self-aligned Silicon Gate)
May, 2015 ConFab P.Gargini 11 Basic MOS Device (1968-2003)
Gate
Source Drain
Substrate
May, 2015 ConFab P.Gargini 12 MOSMOS TransistorTransistor ScalingScaling (1972)
Scaled Constant Parameter Voltage Voltage S < 1 Supply Voltage (Vdd) S 1 Channel Length (Lg, Le) S S Channel Width (W) S S Gate Oxide Thickness (Tox) S S Substrate Doping (N) 1/s 1/s Drive Current (Id) S 1/s * Gate Capacitance (Cg) S S Gate Delay S S 2 Active Power S 3 S
* Does Not Include Carrier Velocity Saturation
R. H. Dennard et Others, “Design of Micron MOS Switching Devices”, IEDM, 1972
May, 2015 ConFab P.Gargini 13 MOSMOS TransistorTransistor ScalingScaling (1970s)(1970s) S=0.7 [0.5x per 2 nodes]
Pitch Gate
May, 2015 ConFab P.Gargini 14 MooreMoore’’ss LawLaw andand DennardDennard’’ss ScalingScaling LawsLaws ConvergenceConvergence
50% AREA READUCION GENERATION TO GENERATION
=> 30% LINEAR FEATURE REDUCTION
0.5 = 0.7
50%
May, 2015 ConFab P.Gargini 15 May, 2015 ConFab P.Gargini 16 Memory Cell Evolution
May, 2015 ConFab P.Gargini 17 Second Update of Moore’s Law
20 19 2X/2Year 18 17 1975 16 15 14 13 12 11 10 9 8 of the number 7 2 1965 6 2X/Year 5 Log 4 3 2 1 components per integrated function integrated per components 0 1976 1977 1978 1979 1966 1968 1970 1971 1972 1973 1967 1969 1974 1975 1980 1959 1960 1961 1962 1963 1964 1965 Year International Electron Device Meeting, December 1975
May, 2015 ConFab P.Gargini 18 ICIC IndustryIndustry atat aa GlanceGlance (1975)(1975)
Driver Cost/transistor -> 50% Reduction
How 2x Density/2 years (Moore)
Method Geometrical Scaling (Dennard)
May, 2015 ConFab P.Gargini Let’s Have a Start up!
1948 1955 1957 1965 1968 1973
May, 2015 ConFab P.Gargini 20 The Computer Hobbyists
May, 2015 ConFab P.Gargini 21 IBM Total Solution
May, 2015 ConFab P.Gargini 22 Operating system IBM BASIC / PC DOS 1.0 CP/M-86 UCSD p-System CPU Intel 8088 @ 4.77 MHz Memory 16 kB ~ 256 kB Sound 1-channel PWM August 12, 1981 May, 2015 ConFab P.Gargini 23 First Moore’s Law Acceleration
May, 2015 ConFab P.Gargini 24 May, 2015 ConFab P.Gargini 2525 Over 40 years of Moore’s Law
34 16G 32 30 1G DRAM 28 MPU 26 64M EPROM 24 FLASH 1 22 4M FLASH 2 20 18 256K 16 14 16K 4X/3Y 12 2X/1Y 10 1K 8 2X/2Y components per integrated function integrated per components
2 6 64 4 Log 2 1970 1980 1990 2000 0 1996 1997 2000 2001 2002 2003 2005 1993 1994 1995 1998 1999 2004 1959 1961 1962 1963 1965 1966 1967 1968 1971 1972 1973 1974 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1960 1964 1969 1970 1975 1976 May, 2015 ConFab P.Gargini 26 Wintel
Windows
May, 2015 ConFab P.Gargini 27 The Semiconductor Business in the 80-90s
Wintel Product Proprietary Definition
Product Software Design OS and Apps
Semiconductor Open Company Market
Standard Standard Components Components
System Integration
May, 2015 ConFab P.Gargini 28 1994 NTRS
1998 2001 2004 2007 2010 1995 0.25 µm 0.18 µm 0.13 µm 0.10 µm 0.07 µm 0.35 µm
Isolation LOCOS/ STI †/SOI STI †/SOI Gate thermal thermal/rapid thermal oxidation oxide Gate n; n/p poly; poly/ silicide electrode Source/dr LDD*/MD same + raised S/D ain D ‡; S/D ext Interconn planar ect Wires Al based Al, Cu ( thick) Interlevel oxide oxide; air; polyimide; low dielectric dielectric Via studs W W/Al/Cu
May, 2015 ConFab P.Gargini 29 May, 2015 ConFab P.Gargini GateGate DielectricDielectric ScalingScaling
You Are Here! 4
3 1999 2 2001 Gate
1.2nm SiO Tox equivalent (nm) 2 1 2003
Silicon substrate 2005 0 4 8 12 Monolayers From My Files 1997 NTRS May, 2015 ConFab P.Gargini 31 1998 ITRS Update
•Participation extended to: EECA, EIAJ, KSIA, TSIA at WSC on April 23,1998 •1st Meeting held on July 10/11,1998in San Francisco •2nd meeting held on December 10/11,1998at SFO •50% of tables in 1997 NTRS required some changes •1998 ITRS Update posted on web in April 1999
Tutorial for SEMI P.Gargini
May, 2015 ConFab P.Gargini 32 CMOSCMOS FutureFuture DirectionsDirections 1970-2004 Traditional Scaling 70%/2-3year Features 2005-2014 More Moore Equivalent Scaling 70% / 2-3year
2000-2014 SOC, SIP,3D Integrated Solutions 2X Performance/2-3year
2010-20XX From My Files New Devices ??/2-3yearNanotech
ITRS 7/11/1998
May, 2015 ConFab P.Gargini 33 ITRS 7/11/1998
May, 2015 ConFab P.Gargini 34 Phase 2 Second Age of Scaling (Equivalent Scaling)
May, 2015 ConFab P.Gargini 35 ITRS 1.0
May, 2015 ConFab P.Gargini TheThe IdealIdeal MOSMOS TransistorTransistor Metal Gate Insulator Source Drain
Fully Surrounding Fully Enclosed, Metal Electrode Depleted Semiconductor
High-K Low Resistance Gate Insulator Source/Drain Band Engineered Semiconductor From My Files
May, 2015 ConFab P.Gargini 37 EquivalentEquivalent ScalingScaling
StrainedStrained SiliconSilicon
HighHigh--K/MetalK/Metal GateGate
MultiMulti--gategate
HigherHigher PerformancePerformance
May, 2015 ConFab P.Gargini 38 ICIC IndustryIndustry atat aa GlanceGlance From Geometrical to Equivalent Scaling (1998(1998-->2003)>2003)
Driver Cost/transistor-> 50% Reduction
How 2x Density/2 years (Moore)
Method Equivalent Scaling (ITRS1.0)
May, 2015 ConFab P.Gargini 39 May, 2015 ConFab P.Gargini 40 High-k/Metal-Gate (year 2000)
May, 2015 ConFab P.Gargini 41 MobilityMobility InnovationInnovation Strained Strained N-Channel P-Channel 2003 Transistor Transistor High Stress Film
SiGe SiGe
May, 2015 ConFab Source: Intel P.Gargini 42 Improved Transistor Performance
1000 1.0 V PMOS NMOS
100
IOFF (nA/um) 90 nm 65 nm 10 2002 2004 2004
1 0.2 0.4 0.6 0.8 1.0 1.2
ION (mA/um)
65 nm transistors increase drive current 10-15% with enhanced strain
IntelIntel May, 2015 ConFab P.Gargini GateGate OxideOxide LeakageLeakage 10 1000
100
SiO2 Physical 10 Gate Tox Leakage (nm) 1 (relative.)
0.1
1 0.01
.50um .35um .25um .18um .13um 90nm 65nm 45nm 32nm Technology Generation Gate oxide scaling stopped due to leakage
2008 ISS US 44 May, 2015 ConFab P.Gargini May, 2015 ConFab2007 P.Gargini 4545 GateGate OxideOxide LeakageLeakage 10 1000
100
SiO2 Physical 10 Gate Hi-k Tox Leakage (nm) 1 (relative.)
Hi-k 0.1
1 0.01
.50um .35um .25um .18um .13um 90nm 65nm 45nm 32nm Technology Generation High-k dielectric breaks through this barrier
2008 ISS US 46 May, 2015 ConFab P.Gargini HighHigh--k+Metalk+Metal GateGate PerformancePerformance // PowerPower BenefitsBenefits Transistor Performance vs. S/D Leakage
1000 65 nm 45 nm
Leakage Current 100 >20% (nA/um) Higher Drive >5x Lower Leakage 10 0.5 1.0 1.5 Transistor Drive Current (rel.) Source: Intel Internal 25% Idsat gain demonstrated for 45nm CMOS vs. 65nm CMOS at fixed Ioff
Transistor Scailing / Tahir Ghani May, 2015 ConFab P.Gargini SurroundingSurrounding thethe SemiconductorSemiconductor
Metal Gate Insulator Source Drain
Drain
Source Drain Gate Gate Source
Source Drain
BOX Si fin - Body!
FinFET Tri-Gate
May, 2015 ConFab P.Gargini 48 22 nm Tri-Gate Transistor
Gates Fins
Mark Bohr, Kaizad Mistry, May 2011 May, 2015 ConFab P.Gargini 49 IncubationIncubation TimeTime
StrainedStrained SiliconSilicon Metal Gate Insulator •• 19921992-->>20032003 Source Drain HKMGHKMG
•• 19961996-->2007>2007 1998 RaisedRaised S/DS/D •• 19931993-->2009>2009 MultiGatesMultiGates •• 19971997-->2011>2011 ~ 12-15 years
May, 2015 ConFab P.Gargini 50 NRINRI FundedFunded UniversitiesUniversities FindingFinding thethe NextNext SwitchSwitch Notre Dame Purdue Illinois-UC Penn State Michigan UT-Dallas SUNY-Albany GIT Harvard Cornell GIT Purdue RPI Columbia Caltech MIT NCSU Yale UVA
TUNNEL GRAPHENE FET SPIN LOGIC
Columbia Harvard SPIN Purdue UVA Yale UC Santa Barbara UC Los Angeles GRAPHENE Stanford C Berkeley Notre Dame UC Irvine U. Nebraska/Lincoln UC Sana Barbara U. Maryland Stanford Cornell Illinois UC U Denver Caltech Portland State UT-Austin Rice Texas A&M UC Berkeley U Iowa UT-Dallas ASU Notre Dame MIT U. Maryland NCSU Illinois UC Northwestern Brown U Alabama Over 30 Universities in 20 States May, 2015 ConFab P.Gargini 51 Dec 2010
May, 2015 ConFab P.Gargini 52 May, 2015 ConFab P.Gargini 53 STARnetSTARnet ProgramProgram LaunchedLaunched 2015 MISSION: Long-term breakthrough research that results in paradigm shifts and multiple technology options. Focused on beyond CMOS technology options and systems integration and discovery to enable both CMOS and beyond CMOS components. Collaborative network of six multi-university centers involving 39 U.S. universities
$194 million over 5 years from industry and DARPA Supports 145 research faculty and 400 graduate students Member companies from semiconductor and defense industry
GLOBALFOUNDRIES Micron Technology IBM Raytheon
Intel Corporation Texas Instruments
United Technologies
http://www.src.org/program/starnet/
May, 2015 ConFab P.Gargini 54 NRI Nanoelectronics Research Initiative "Future generations of electronics will be based on new devices and circuit architectures, operating on physical principles that cannot be exploited by conventional transistors. NRI seeks the next device that will propel computing beyond the limitations of current technology."
NRI Mission and Description Program Mission Demonstrate non-conventional, low-energy technologies which can outperform CMOS on critical applications in ten years and beyond.
May, 2015 ConFab P.Gargini 55 May, 2015 ConFab P.Gargini 56 Intermission
May, 2015 ConFab P.Gargini 2D 3D
May, 2015 ConFab P.Gargini 58 22 nm Tri-Gate Transistor
Gates Fins
Mark Bohr, Kaizad Mistry, May 2011 May, 2015 ConFab P.Gargini 59 Question
How many more technology generations can Equivalent Scaling be extended for ?
May, 2015 ConFab P.Gargini 60 Multigate FET Offers a Simple Way for Scaling and Improving Performance
5 4 3
Semicon Japan, December 6, 2013
May, 2015 ConFab P.Gargini 61 Mark Bohr, August 11, 2014 May, 2015 ConFab P.Gargini 62 Mark Bohr, August 11, 2014
May, 2015 ConFab P.Gargini 63 Second Moore’s Law Acceleration
May, 2015 ConFab P.Gargini 64 Mark Bohr, August 11, 2014
May, 2015 ConFab P.Gargini 65 Mark Bohr, August 11, 2014
May, 2015 ConFab P.Gargini 66 TechnologyTechnology NodeNode ScalingScaling
Today’s Challenge 14
10
7
5 Technology Node (nm) 3
2021 2019 2017 2015 2013 1 2013 ITRS May, 2015 ConFab P.Gargini 67 Apr 19th 2015
May, 2015 ConFab P.Gargini 68 Phase 3 Third Age of Scaling (3D Power Scaling)
May, 2015 ConFab P.Gargini 69 May, 2015 ConFab P.Gargini May, 2015 ConFab P.Gargini May, 2015 ConFab P.Gargini Vertical Memory Architecture
May, 2015 ConFab P.Gargini 73 May, 2015 ConFab P.Gargini May, 2015 ConFab P.Gargini 75 May, 2015 ConFab P.Gargini 76 May, 2015 ConFab P.Gargini Kinam Kim, ISSCC, Feb 23, 2015 May, 2015 ConFab P.Gargini 78 Toshiba Develops World's First 48-Layer BiCS (Three Dimensional Stacked Structure Flash Memory) Toshiba, and sample shipments of the 3D structure adopted NAND-type flash memory of 48-layer
Date March 27, 2015 Toshiba has announced that the 26th, began sample shipments of NAND-type flash memory that employs a three-dimensional (3D) structure of stacking the storage element vertically. First of the 3D flash memory for the company. At 48 the number of influences layer performance, it exceeded the existing products of competing Korea Samsung Electronics (32 layers). Compared to existing planar structure product, and appeal to the point of excellent writing speed and reliability of data to be proposed, such as enterprise data centers (DC). (Nobuyuki Goto)
May, 2015 ConFab P.Gargini 79 3D NAND
May, 2015 ConFab P.Gargini 80 Vertical Logic Architecture
May, 2015 ConFab P.Gargini 81 ICIC IndustryIndustry atat aa GlanceGlance FromFrom EquivalentEquivalent toto 3D3D PowerPower ScalingScaling (2015(2015-->2021)>2021)
Driver Cost/transistor & power reduction
How 2x Density/2 years (Moore)
Method 3D Power Scaling (ITRS2.0)
May, 2015 ConFab P.Gargini but the World has changed under are very own eyes
May, 2015 ConFab P.Gargini 83 MM+MtMMM+MtM=Heterogeneous=Heterogeneous IntegrationIntegration
2006 More than Moore: Diversification
HV Sensors Analog/RF Passives Biochips Power Actuators
130nm Interacting with people and environment
90nm Non-digital content Co System-in-package m bi (SiP) 65nm nin g S Information oC an d 45nm Processing SiP : He ter Digital content og 32nm en More Moore: Miniaturization e System-on-chip ou s (SoC) Int 22nm eg rat ion Baseline CMOS: CPU, Memory, Logic 16 nm . . . V Beyond CMOS 2006
May, 2015 ConFab P.Gargini 84 Customized Functionality
2007
May, 2015 ConFab P.Gargini 85 Tablet April 2010
A WiFi-only model of the tablet was released in April 2010, and a WiFi+3G model was introduced about a month later May, 2015 ConFab P.Gargini 86 May, 2015 ConFab P.Gargini 87 May, 2015 ConFab P.Gargini 88 21th Anniversary of TRS http://www.itrs.net 1991 Micro Tech 2000 1992NTRS 1994NTRS 1997NTRS Workshop Report Europe Japan Korea Taiwan USA
1998 ITRS 2000 ITRS 2002 ITRS 1999 ITRS 2001 ITRS Update Update Update
2004 ITRS 2006 ITRS 2003 ITRS 2005 ITRS 2007 ITRS Update Update
2008 ITRS 2010 ITRS 2012 ITRS 2009 ITRS 2011 ITRS Update Update Update
2013 ITRS The Last ITRS 1.0
May, 2015 ConFab P.Gargini 89 20132013 ITRSITRS ITWGsITWGs
1. System Drivers 2. Design 3. Test & Test Equipment 4. Process Integration, Devices, & Structures 5. RF and A/MS Technologies 6. Emerging Research Devices 7. Emerging Research Materials 8. Front End Processes 9. Lithography 10. Interconnect 11. Factory Integration 12. Assembly & Packaging 13. Environment, Safety, & Health 14. Yield Enhancement 15. Metrology 16. Modeling & Simulation 17. MEMs
90 Restructuring the ITRS to represent the New Ecosystem
May, 2015 ConFab P.Gargini Beyond 2020
O P Customized Functionality A P S Outside System Connectivity P Y L S E T System Integration T E S M Heterogeneous Integration
More than Moore
More Moore Beyond Moore
ITRS 2012
May, 2015 ConFab P.Gargini 92 ITRS 2.0
May, 2015 ConFab P.Gargini BeyondBeyond 20202020 Themes April 2014 Focus Teams
System Integration System Integration
Outside System Connectivity Outside System Connectivity
Heterogeneous Integration Heterogeneous Integration
More than Moore Heterogeneous Components
Beyond Moore Beyond CMOS
More Moore More Moore
Manufacturing Factory Integration
May, 2015 ConFab P.Gargini 94 May, 2015 ConFab P.Gargini 95 IncreasingIncreasing DegreeDegree ofof IntegrationIntegration
Qualcomm Snapdragon TM Family
May, 2015 ConFab P.Gargini 96 Inside the Apple A7 from the iPhone 5s (Courtesy of Chipworks)
1 billion transistors on a die 102 mm2
May, 2015 ConFab P.Gargini 97 ExampleExample ofof Segregating:Segregating: SensorSensor HubHub
• To monitor user behavior, sensors must be always-on • Power penalty is high for main processor • Reverse trend against integration • (WAS) Main processor controls sensors directly • (IS) Low power sensor hub coprocessor controls sensors instead (WAS) (IS)
May, 2015 ConFab P.Gargini 98 iPhone 6
May, 2015 ConFab P.Gargini 99 A 8 (2 Billion Transistors)
The Apple A8 is, of course, the most interesting element in the new iPhone 6. All clues point to it being manufactured by TSMC on a 20nm node, and that makes it one of the first 20nm chips out there. The A8 is also some 13% smaller than last year’s A7, while packing nearly double the amount of transistors - up from around 1 billion to some 2 billion transistors in the Apple A8. And yes, RAM is still 1GB on the iPhone May,6. 2015 ConFab P.Gargini 100 ~6.5B
May, 2015 ConFab P.Gargini 101 Leakage and Power Reduction
May, 2015 ConFab P.Gargini 102 May, 2015 ConFab P.Gargini 103 IEEE Rebooting Computing
RebootingRebooting Computing:Computing: RethinkingRethinking AllAll LevelsLevels ofof HowHow WeWe ComputeCompute
Tom Conte Professor of ECE & CS Georgia Institute of Technology 2015 President, Computer Society
104 IEEE Rebooting Computing
Goal: Rethink Everything: Turing & Von Neumann to now
Why IEEE? Pre-competitve, Inclusive, Worldwide
Circuits & Systems Society
Council on Electronic Design Automation
105 Q:Q: HowHow dodo wewe getget backback toto exponentialexponential performanceperformance scaling?scaling?
IEEEIEEE RebootingRebooting ComputingComputing InitiativeInitiative
May, 2015 ConFab P.Gargini 106 May, 2015 ConFab P.Gargini 107 May, 2015 ConFab P.Gargini 108 Recurring Questions April 19, 1965 With unit cost falling as the number of components per circuit rises, by 1975 economics may dictate squeezing as many as 65,000 components on a single silicon chip
What could you do with 65,000 components?
Gordon Moore
February 26, 2015 With unit cost falling as the number of components per circuit rises, by 2015 economics may dictate squeezing as many as 6,500,000,000 components on a single silicon chip
What could you do with 6,500,000,000 components?
Paolo Gargini
May, 2015 ConFab P.Gargini 109 May, 2015 ConFab P.Gargini 110 Figure MEMS Sensors trends for “Wearable” technologies – The MEMS TWG has adopted this application as a case study for More than Moore roadmapping.
May, 2015 ConFab P.Gargini 111 May, 2015 ConFab P.Gargini 112 InsideInside thethe AppleApple WatchWatch
[source] https://www.abiresearch.com/press/apple-watch-insides-pcb-details- revealed-for-the-f/ May, 2015 ConFab P.Gargini 113 Figure MEMS illustrates the many inertial sensors used in a fully featured car today. In some cases, there are up to 15 axes of inertial sensors (accelerometer and gyro) used. As there are only six possible degrees of mechanical freedom, it is obvious that many of these sensors are redundant. We have arrived at this situation because historically each system has been purchased from different suppliers. But today the concept of a cluster of inertial sensors sending their information to whatever system needs it is becoming the goal of many automotive OEMs. Can you say “Plug and Play”?
May, 2015 ConFab P.Gargini 114 May, 2015 ConFab P.Gargini 115 May, 2015 ConFab P.Gargini 116 ConclusionsConclusions
“Geometrical Scaling” led the IC Industry for 3 decades
ITRS 1.0
Cooperative and distributed research and manufacturing methods highlighted by ITRS emerged as cost effective means of reducing costs since the mid-90s
FCRP, NRI, Sematech, IMEC and Government organizations actively cooperated in advanced research
“Equivalent Scaling” saved the Semiconductor Industry since the beginning of the previous decade
Preliminary evaluation of post-CMOS candidates published in 2010
ITRS 2.0
“3D Power Scaling” is the next phase of (accelerated) scaling
Post CMOS devices and emerging architectures are being jointly evaluated->ITRS/RC
May, 2015 ConFab P.Gargini 117