( ( GPU ) ( )

: :

: :

1389 | أ

: :

1 ...... 1 ...... GPU : 2 ...... 1 1 3 ...... GPU 1 1 1 3 ...... 2 1 1 6 ...... 3 1 1 7 ...... 4 1 1 8 ...... 5 1 1 9 ...... 6 1 1 10 ...... 7 1 1 14 ...... 8 1 1 16 ...... GPU 2 1 21 ...... GPU 3 1 21 ...... ( 1996 ) 1 3 1 22 ...... – ( 1998 ) 2 3 1 22 ...... – ( 2001 ) 3 3 1 23 ...... – ( 2003 ) 4 3 1 23 ...... – ( 2005 ) 5 3 1 24 ...... – ( 2006 ) 6 3 1 27 ...... NV40 : 30 ...... 1 2 | ب

32 ...... 2 2 34 ...... 3 2 38 ...... 4 2 39 ...... 5 2 41 ...... G80 : 45 ...... 1 3 46 ...... / 2 3 47 ...... 3 3 48 ...... SM 1 3 3 49 ...... 2 3 3 53 ...... 3 3 3 54 ...... SM 4 3 3 56 ...... 5 3 3 57 ...... 6 3 3 58 ...... 4 3 58 ...... 5 3 59 ...... 6 3 61 ...... GPU CPU : 61 ...... 1 4 61 ...... 2 4 62 ...... 3 4 62 ...... 4 4 62 ...... 5 4 63 ...... 6 4 | ج

63 ...... 7 4 63 ...... 8 4 64 ...... 66 ......

. CPU . . CPU GPU . : : . GPU 1. . 2. . . . 3. . . . 4. . . 5. . . . . GPU . . . GPU . 2 |

GPU . . . 2000 . GPU GPU Stream Processor . ..(. ) SP . . GPU . GPU « » . . . GPU . GPU . . . GPU ... . GPU . . 2006 GPU . . CPU GPU

GPU :

GPU GPU . . . . ( ) . 1 . . 2 : :

1

Vertex Smoother 2 |

. 1 2 .( 3 ) . GPU 4 . .

5 1 1

6 . . . . . OpenGL Direct3D GPU . GPU 7 . GPU . .

GPU

Computer Generated Scene Pixel (Picture Cell) Render Frame Buffer Graphics Pipeline Stage Typical 3 |

. .

GPU 11 1

GPU GPU . . .

1 12 1

2 . 3 . . . 4 . . . z x,y,z . . 5 6 . . 4 7

Vertex Object Spce World Space Camera Space Model-view Projection Homogeneous Coordinate 4 |

x,y,z . 1 . . [-1,1]

2

. 2 . . . [0,1] z . . . [21] 3 . .

( ( [14] )

Homogeneous Clip Space Viewport Transformations Window Space 5 |

1 . . . ( ) 2

3 3

. « » GPU . 3 ) GPU .( . . . .

Culling Red Green Blue Alpha (RGBA) Texture Coordinate 6 |

1 113

. 2 GPU . . . 3 . ( ) . . ( ) (. ) . .

( ( [14] )

. GPU ) . . . (

Geometry Shader Primitive Assembly Primitive 7 |

1 114

. ) . 2 ( ( ) . . . ( « » . 3 . . .

( ) ( ) ( ( [14] ) .

. 4 . 5 ) . .( [8]

Rasterizer Fragment Fixed-Function Aliasing Anti-Aliasing (AA) 8 |

. GPU . . 4

4 4

. . 118

1 115 . . 2 . . 3 ( ) . 17 17 01) . . . (

Pixel Shader Texture Mapping Bump mapping 9 |

1 116

. . . . . 2 . . . ) . 3 . ( 4 . . . . . 5 . . . . 6 . . . ( ) . . 7 . ( depth buffering ) z-buffer . .

Final Composition (Blending) Pixel Ownership Test Scissor Test Scissor rectangle Alpha Test Stencil Test Depth Test 10 |

5

. . . « 1 » GPU . . [13]

117

. . . . . . . [20] . . . .

Raster Operation Unit 11 |

1 x,y ) : . 3 2 ( ( u,y SCREEN SCANNING: for y for x compute u(x,y) and v(x,y) copy TEX[u,v] to SCR[x,y]

TEXTURE SCANNING: for v for u compute x(u,v) and y(u,v) copy TEX[u,v] to SCR[x,y]

TWOPASS: for v for u compute x(u,v) copy TEX[u,v] to TEMP[x,v] for x for v compute y(x,v) copy TEMP[x,v] to SCR[x,y] . . TEMP ( ) SCR TEX . 4 ) 5 .( . . 6 .

Scan in screen space Scan in texture space Two-pass Inverse Mapping Sequential Random Access 12 |

. 1 . . . . . ( TEMP ) . . ) . ( RGBA ) .( [8] . .

( ( [21] ) 2 . . . ( 4 ) 3 . . .

Affine (linear) mapping Texture Filtering Point Sampling Nearest-neighbor Filtering 13 |

1 . . [21] . . 2 . 3 . . .

( ( [21] ) 6

) 25 25* 64 64* 32 32* 16 16* 8*8 4 .( 16 16* 32 32* . . 8 4 .

Bilinear Filtering Trilinear filtering Mipmaps Anisotropic filtering 14 |

. . 4:1 2:1 . 16:1 8:1 . .

. 7 ( ( )

118

1 : . . . 2 8 . .

( ( [30] ) 8 : : 9

Supersampling Multisampling 15 |

( ( [30] ) 9

10 4 : :

( ( [30] ) 10

. 8 10 4 : : 11 . 8

( ( [30] ) 11

nx n . ) . 16x 8x 4x 2x . . ( . . . 16 |

GPU 12 ( ) 1 . ( ) 2 . . SIMD ) CPU . 3 ( CPU . GPU GPU . . . . . . . GPU . . . . . . GPU GPU GPU . .

Task Task Parallelism Data Parallelism 17 |

. . 1 2 . GPU . . ALU ALU . GPU . .

) . 12 ( ( [11]

3 . 4 .

Bottleneck Load Balancing Instruction Set Architecture Unified Shader 18 |

. 360 AMD Xenos GPU . .

13 . ( ( [11] ) .

. . ( ) » GPU . . [9] « » « . GPU . . GPU 14 19 |

. : . . 14 ) . CPU GPU . : ([ ([ 10 ]

CPU GPU . . GPU . . GPU 15 . 20 |

( Programmable ) GPU 15 . . . .

. . 1 . GPU . . .

Configurable 21 |

GPU 13

1981 . IBM . CGA 1 IBM PC . 16Kbyte . . ( 16 ) 4 640*200 CPU ( ) RAMDAC 2 EGA 3 1984 . . 640*350 16 IBM AT . . VGA IBM 1987 256Kbyte . . . 256 16 Matrox Impression 3 . ( PC CAD ) Voodoo . OpenGL SGI . GPU . . . GPU

( 1996 ) 131

4 ) . 3dfx CPU . (

Color Graphics Adapter Random Access Memory Digital-to-Analog Converter Enhanced Graphic Adapter Raster Operation 22 |

. GPU PCI . z-buffer . . .

PCI

CPU GPU

– ( 1998 ) 132

CPU GPU . . GPU . . PCI AGP GPU CPU . . Radeon7500 GeForce

AGP

– ( 2001 ) 133

. ) . . Radeon8500 GeForce3 . (

23 |

AGP

– ( 2003) 134

. GPU GPU 9800 GeForce FX 5800 . . . GPU DirectX9 .

AGP

– ( 2005) 135

GPU 2005 ATI Xenoss GPU . Xbox360 GPU . R600 ) ) . : (

24 |

CPU ( )

1 . . 2007 2005 GeForce . GPU . Radeon X800 6800 . .

– ( 2006) 136

2006 GeForce 8800 G80 GPU . GPU 2007 . GPU R600 . ATI R600 GPU . . . Radeon HD 2900

CPU ( )

North Bridge 25 |

DirectX10 . . 1 2 . . 3 . . GPU GPU GPGPU 4 . . . GPU

( ( msdn..com ) . DirectX10 16

Stream-Output Stage Read-Only Write-Only General-Purpose GPU 26 |

NV40 :

2004 GPU . NV40 GPU NV40 . GeForce 6800 . . GPU : : NV40 17

FSB CPU . NV40 17 ( ( [18] .) 800MHz

NV40 GPU (. 1 GPU ) GPU . PCI-Express AGP GPU CPU . ( )

Integrated GPU (IGP) 28 |

GPU . 17 . . 35GB/s . GPU GPU . GPU CPU 1 GPU GPU 3 2 . 90 GPU 4 : ) .( [16] ) : . (( (( [17] ) . NV40 64 . . . : NV40 . . 5 . . .

Hit-Ratio Principle of Locality Locality in Time Locality in Space Thread 29 |

) 1 . . 2 ( . . GPU 18 . NV40 : :

. NV 18 ( ( ) .

. 6 . data fetcher . Tringle setup rasterizer

Private Temporary Register Texture map 30 |

. . 16 . crossbar . (x,y) . . 1 16 . .

21

VLIW 2 . ( ) 6 NV40 ) ALU VLIW 123 (. ( ALU ALU ) . 512 Instruction RAM 5 4 3 3 . . . : : 19

Pixel-Blending Unit Very Large Instruction Word Vector multiply-add unit Scalar special-function unit Vertex Texture Unit 31 |

( ( [16] ) 19

4 SIMD 1 ) . 32 IEEE ( 128 32*4 . . 32 . 1/x 32*128bit Temporary Registers 512*128bit Constant RAM 16*128bit Output 16*128bit Input Register . . Register SIMD MIMD 2 . . . Error! Reference source not found. . .

Single Instruction Multiple Data Multiple Instruction Multiple Data 32 |

. 4 4 . . .

( ( [18] ) . 20

20 . ( ) . . Texture Cache . 1

22

(OpenGL DirectX ) API 2 . . .

Instancing Application Programming Interface 33 |

( ( [18] ) 21

21 . . 2 1 . . . . Setup . . . Page-friendly

( ( [16] ) 22

Cull Clip 34 |

. . Z-Cull . . Z-Cull

23

. . . . . 32 16 NV40 ) 1 (. . .

( ( [16] ) 23

Fog 35 |

1 4 16 NV40 16 . SIMD . ( ) 32 4 ) 4 23 (. 4 . . . ( ) DRAM . 2 . . 24 : : . = * + *( 1 – )

4 . 4 SIMD .( .( RGB )

Quad-Pixel Unit Hide the latency 36 |

24

. Shader Unit 2 Shader Unit 1 : : . . Shader SIMD 25 ( Superscalar ) . . . 4

( ( [16] ) 25

Shader . . 4 NV40 . ( )117 . . 16:1 . API . . 37 |

26 . Shader Unit . .

( ( [22] ) Shader Unit 2 Shader Unit 1 26

) LOD 1 . (... LOD ) .( .( 3 2 SU1 . . SU1 . . SU2 . . SU2 2 SU2 . . . 5

Level of Detail Dot product 38 |

24

NV40 16 . . 16 16 . .

27

. 1 ) .

Lossless 39 |

) ( ( . . .2 .2 . . 8 4 . .

25

1 NV40 . . . 4 5 6 6 NV40 . 1 . 30=5*6 VertexProcessorsOps=6*(VectorUnitOps(4)+SpecialFuncUnitOps(1))=30

4 8 16 16 =8* 128 16 . SU2 4 SU1 . FragmentProcessorsOps=16*(ShaderUnit1Ops(4)+ShaderUnit2Ops(4))=128

: : NV40 TotalFLOPs=(VertexProcessorsOps+FragmentProcessorsOps)*ClockFreq . . 67.150 GFLOPs 425MHz

Floating Operation Per Second (FLOPs) 40 |

. . GFLOPs 2 SU2 : : VertexProcessorsOps=6*(2*VectorUnitOps(4)+SpecialFuncUnitOps(1))=54 FragmentProcessorsOps=16*(ShaderUnit1Ops(4)+2*ShaderUnit2Ops(4))=192 TotalFLOPs=(VertexProcessorsOps+FragmentProcessorsOps)*ClockFreq . . 104.55 GFLOPs

G80 :

GeForce 8800 2006 GPU G80 GPU . . . 1 C ) . NV40 ( ( ) ( . ) 2002 . . ( GPU (. ) . . . . . . . . . 28 .

Compute Unified Device Architecture (CUDA) 42 |

( ( [24] ) 28

GPU ( ) . . .

( ( [25] ) 29

G80 ) . DirectX10 . (... . . G80 43 |

( ( [23] ) G80 30

SM . 2 16 1 128 G80 NV40 . 3 / G80 . 30 . . . GPU 4 ) 5 DRAM . ( ROP SPA 6 .

Stream Processor (SP) Stream Multiprocessor (SM) Texture/Processor Cluster (TPC) Stream Processor Array (SPA) Raster Operation Processor (ROP) Interconnect Network 44 |

DRAM SPA . Error! Reference . SPA ( ) DRAM . . SPA source not found. 1 SPA TPC 2 . TPC . viewport/clip/setup/raster/zcull . . 3 (. ) NV40 . TPC . . ROP 4 . G80 SPA . TPC ( ) . DRAM . . ( G80 ) 5 CPU . 6 ) ( )

Input Assembler Vertex Work Distribution Pixel Work Distribution Compute Work Distribution Host Interface Context Switching 45 |

GPU 1 (. . . 600MHz « » . . round-robin . . x,y G80 . .

( ( [26] ) G80 31

31

. . SPA ) NV40 SPA TPC . GPU TPC (. 8 G80 GPU TPC . .

Core Clock 46 |

/ 32

SM TPC 32 . . ( SM )

TPC 32

. SM . TPC ) . . ( ( SMC ) SM SM . G80 ( ) SM SM SMC . . . 47 |

. . .

33

SM 33 . ( SM ) ( ( MT Issue ) (SFU ) (SP ) 16 (C cache ) (I cache ) . . / 1

SM 33

SM )

Shared Memory 48 |

SM (. . . SM . SM MAD 8 ( MAD ) SP ) ... SFU SFU . ( . . [23] . . ROP SMC SM . . SP

SM 1 331

. G80 2 . . . . . SP ( SM ) . . . .

Multithreading System Kernel 49 |

332

. SM . . . . SIMD MIMD SM SIMD SIMT . SIMT 1 SIMT . SIMD SIMD . SIMT . SIMT SIMT . SIMD ( ) . . . 2 34 . 3 32 . .

Single Instruction Multiple Thread Multithreaded instruction unit Warp 50 |

SIMT 34

. 768 24 SM ( ) . . . . . SP 32 SIMT . . SM . 51 |

. 1 . . 4 NV40 8 SM G80 . 8 4 SMC . . ( 32 ) 32 SIMT . . . 32 24 ( SP ) . ) . . . 2 ( . 4 16 SM SFU SP . . . . for while switch if :( :( i )

1: if (a[i]==0) // 2: { 3: // 4: } 5: else 6: {

Stack-Based Reconvergence Aging 52 |

7: // 8: } 9: //

« » . . ( ) . ) ( ) ) ( . ( f c) 35 . ( . . TOS 1

( ( [27] ) 35

. 8 A a 35 A . 1 : . . .

Top Of Stack 53 |

) ( D) : . ( . . D . TOS B . 11111001 B C) D . 00000110 ( ( ) . . ( ) D C D . 1 . ( b) . . . ( ) . [28] SM

2 333

: . 1

Nested Branch Latency Tolerance 54 |

SM . SM . . . ( ) . . . .

SM 334

. SM GPU 4 4 ) NV40 . SIMD SP G80 . 16 ( G80 4 NV40 . 4 G80 SP G80 2006 2002 . . . . 2 GPU SP GPU . SP .

Miss 55 |

) . ( ( DirectX10 G80 . SM PTX . PTX 1 G80 . SM ) 2 . . . ( PTX 3 SM . . / . . . . 2 2 . . ( ( ) 4 ( ) 7 ( ) 6 ( ) 5 . ( ) . .

Parallel Thread Execution Intermediate Languages Transcendental Call Return Trap Synchronization 56 |

. GPU . ROP . C/C++ G80 / . ISA / . : / SM . DRAM . 6 6 . DRAM : . C . .

335

. SM SP . IEEE 754 SP . . round-to-nearest-even . . 1

Underflow 57 |

( ( [29] ) SP ALU 36

SP 36 SM GFLOPs 1.35GHz 1350MHz SP . : : SPPeack=2*SPMAD(1)+SPMUL(1)=3 PeakGFLOPs=8*SPPeak*ClockFreq 2 2 SPMAD SP 8 SM 8 SPPeak . . . 32.4GFLOPs

336

NV40 . . SFU G80 . 2 2 2 . . . SFU

58 |

34

. . RGBA 4 . SMC SM . . 8 1

( ( [29] ) 37

35

SM NV40 clip viewport . viewport/clip/setup/raster/zcull setup . . . . . raster ( coarse-rasterization ) zcull 256 zcull . ( fine-rasterization ) . . .

Texture Address 59 |

. TPC 1 TPC SMC . TPC SMC . SM . . ROP ( ) zcull API Direct3D OpenGL API . . .

2 36

64 . ROP . 1GHz GDDR3 DDR2 8Byte ) 2*8Byte*1GHz=16Gbyte/s ( ) DDR 2 ROP .( [31] . . . ROP 16x . NV40 . 4x . G80 . . 3 . . [32]

Tile Raster Operation Unit (ROP) Coverage Sampled Antialiasing (CSAA) 60 |

GPU CPU :

. GPU CPU CPU . CPU GPU . . . . .

41

CPU GPU GPU . DRAM . .

1 42

CPU ( L1) . L1 L1 . . . CPU .

Cache Coherency 62 |

GPU . GPU . . . GPU .

43

. . CPU GPU . . CPU

44

3GHZ CPU . GPU GPU . ) CPU (. (.

45

GPU SIMD . GPU CPU . . GPU . GPU 16( ) SIMD CPU . CPU . . ( 768 G80 ) « »

63 |

46

GPU . . GPU . .

47

. 18 GPU . CPU . CPU . . . ALU GPU

48

. DRAM GPU CPU CPU . . GPU . . GPU . DRAM . .

[1] Fundamentals Of Computer Graphics Second Edition; Peter Shirley et al. [2] Computer Graphics; Amarendra N. Sinha, Arun D. Udai; Tata McGraw-Hill 2008 [3] http://www.devhardware.com/c/a/Video-Cards/The-Graphics-Pipeline/1/ [4] Introduction to GPU; Marc Olano, David Luebke et al. [5] The Graphics Pipeline; Kurt Akeley, Pat Hanrahan; Fall 2001. [6] http://msdn.microsoft.com/en-us/library/ff476882(v=VS.85).aspx [7] How GPUs Work; David Luebke, Greg Humphreys; [8] The OpenGL Graphics System: A Specification (Version 4.0 (Core Profile) - March 11, 2010); Mark Segal, Kurt Akeley; [9] GPU Computing; John D. Owens, Mike Houston, David Luebke, Simon Green, John E. Stone, and James C. Phillips; [10] GPU Architecture Overview; John Owens, UC Davis; [11] GPU Architecture: Implications & Trends; David Luebke; SIGGRAPH2008; [12] Course Documentation; GPU Programming and Architecture, CIS 665, University of Pennsylvania, Spring 2010; [13] Graphic pipeline and implementation; Zhenyu Ye; [14] State of the Art Report on GPU; Rita Borgo, Ken Brodlie; University of Leeds; http://www.gpucomputing.org/; [15] Xenos: XBOX360 GPU; Michael Doggett; September 1, 2005 [16] The GeForce 6800; John Montrym, Henry Moreton; IEEE Computer Society, IEEE Micro p.41 [17] Computer Organization & Design: the Hardware / Software Interface Second Edition; David A. Patterson, John L. Hennssy. [18] GPU Gems 2, Chapter 30: The GeForce 6 Series GPU Architecture; [19] NVIDIA GeForce 6800 Ultra (NV40). Part One; http://ixbtlabs.com/articles2/gffx/nv40-part1-a.html [20] P.S. Heckbert, “Survey of Texture Mapping,”IEEE Computer Graphics and Applications,vol. 6, no. 6, Nov. 1986, pp. 56-67 [21] Mathematics for 3D Game Programming and Computer Graphic Second Edition; Eric Lengyel [22] GPUs - Graphics Processing Units; Minh Tri Do Dinh; Vertiefungsseminar Architektur von Prozessoren, SS 2008; Institute of Computer Science, University of Innsbruck; July 7, 2008 [23] NVIDIA Tesla: a Unified Graphics and Computing Architecture; Erik Lindholm, John Nickolls, Stuart Oberman, John Montrym; [24] The NVIDIA GeForce 8800 GPU; Erik Lindholm, Stuart Oberman; August 2007; [25] Technical Brief NVIDIA GeForce 8800; November 2006; [26] Threading Hardware in G80; David Kirk, Wen-mei W. Hwu; ECE 498AL, University of Illinois, Urbana-Champaign, 2009; [27] Dynamic Warp Subdivision for Integrated Branch and Memory Divergence Tolerance; Jiayuan Meng, David Tarjan, Kevin Skadron; proceedings of ACM ISCA 2010. [28] Deterministic Sample Sort For GPUs; Frank Dehne, Hamidreza Zaboli; February 24, 2010; [29] AnandTech.com - NVIDIA's GeForce 8800 (G80): GPUs Re-architected for Di= 65 |

rectX 10; http://www.anandtech.com/print/2116 [30] 3DCenter - Multisampling Anti-Aliasing: A Closeup View; http://alt.3dcenter.org/artikel/multisampling_anti-aliasing/index2_e.php [31] Computer architecture : a quantitative approach; John L. Hennessy, David A. Patterson ; with contributions by Andrea C. Arpaci-Dusseau; Amsterdam: Morgan Kaufmann. ISBN 0123704901; [32] Coverage Sampled Antialiasing; NVIDIA Technical Report

Fragment, 7 O G 3dfx, 21 OpenGL, 32, 59 G80, 41, 44, 54 A GDDR3, 59 P GeForce 6800, 27 Aging, 51 GeForce FX 5800, 23 Page-friendly, 33 AGP, 22, 27 Geometry Shader, 6 Parallel Thread Execution, 55 Aliasing, 8 GFLOPs, 57 PCI-Express, 27 Anti-Aliasing, 8 GPGPU, 25 Pixel Shader, 8 API, 32 Graphical Pipeline, 2 Primitive, 6 Primitive Assembly, 6 B H Principle of Locality, 28 PTX, 55 Blending, 9 Hide the latency, 35 Bottleneck, 17 Q I C Quad-Pixel Unit, 35 IBM PC, 21 C cache, 47 IEEE 754, 56 R Cache Coherency, 61 Interconnect Network, 43 clip, 58 ISA, 18, 56 Radeon 9800, 23 Clip, 33 Radeon7500, 22 coarse-rasterization, 58 K RAMDAC, 21 Configurable, 20 raster, 58 Core Clock, 45 Kernel, 48 Raster Operation Processor Cull, 33 (ROP), 43 Culling, 5 L Raster Operation Unit, 10 Rasterizer, 7 D Latency Tolerance, 53 Read-Only, 25 Level of Detail, 37 RGBA, 5 data fetcher, 30 Load Balancing, 17 ROP, 44, 48 Data Parallesim, 16 Locality in Space, 28 round-robin, 45 DDR2, 59 Locality in Time, 28 round-to-nearest-even, 56 depth buffering, 10 Lossless, 38 Direct3D, 59 S DirectX, 32 M DirectX10, 25, 42, 55 Setup, 33 DirectX9, 23 MAD, 48 SFU, 47 Dot product, 37 MIMD, 31, 49 Shared Memory, 47 DRAM, 35, 43, 44, 56, 63 Miss, 54 SIMD, 31, 35, 49, 54, 62 MT Issue, 47 SIMT, 49, 50, 51 E Multisampling, 15 Single Instruction Multiple Multithreaded instruction unit, 49 Thread, 49 EGA, 21 Multithreading System, 48 SM, 46, 55 Smoother, 1 F N SPA, 44 Stack-Based Reconvergence, 50 fine-rasterization, 58 Nested Branch, 53 Stage, 2 Fixed-Function, 7 North Bridge, 24 Stream, 25 Floating Operation Per Second NV40, 27, 54 Stream Multiprocessor (SM), 43 (FLOPs), 39 Stream Processor (SP), 43 67 |

Stream Processor Array (SPA), U Write-Only, 25 43 Supersampling, 14 Underflow, 56 X Superscalar, 36 Unified Shader, 18 Synchronization, 55 Xbox360, 24 V Xenos, 24 T Vertex, 1 Z Task, 16 Vertex Shader, 3 Task Parallelism, 16 viewport, 58 z-buffer, 10 Texture Cache, 32 Viewport Transformation, 4 zcull, 58 Texture Mapping, 9 VLIW, 30 Z-Cull, 34 Texture/Processor Cluster (TPC), Voodoo, 21 43 TPC, 44, 46, 59 W Transcendental, 55 Trap, 55 Warp, 49