DOCSLIB.ORG

Schottky Diodes Jfets

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Schottky Diodes Jfets Institute of Solid State Physics Technische Universität Graz Schottky diodes JFETs - MESFETs - MODFETs Quasi Fermi level When the charge carriers are not in equilibrium the Fermi energy can be different for electrons and holes. EEFn c nN c exp kTB EEvFp pN v exp kTB Institute of Solid State Physics Technische Universität Graz metal - semiconductor contacts Photoelectric effect Workfunction Electron affinity Interface states Schottky barriers Schottky diodes Ohmic contacts Thermionic emission Tunnel contacts Photoelectric effect current hf0 = e at threshold workfunction f threshold frequency f0 There is a dipole field at the surface of a metal. This electric field must be overcome for an electron to escape. Singh work function - electron affinity If s < m, the semiconductor bands bend down. If s > m, the semiconductor bands bend up. Singh p-type Walter Schottky Schottky contact / ohmic contact EF, m E metal F, s Schottky contact EF, s EF, m metal Ohmic contact: linear resistance 1 J 2 Rc -cm specific contact resistance: V n-type Schottky contact / ohmic contact Schottky contact EF, s EF, m metal EF, m metal EF, s Ohmic contact: linear resistance 1 J 2 specific contact resistance: Rc -cm V Interface states http://www.springermaterials.com/navigation/#n_240905_Silicon+%25 Schottky barrier eND Exxn r 0 2 VVbi Wxn eND 2 eND x Vxx n 2 CV measurements 2 VVbi xp eN A eN C A F m-2 xVVpbi2 2 C 1/ 1 2VVbi 2 CeN A V NTv () eVbi b k B T ln GaAs has larger Eg and Vbi N A Thermionic emission 1901 Richardson Owen Willans Richardson Current from a heated wire is: 2 e JATR exp kTB Some electrons have a thermal energy that exceeds the work function and escape from the wire. Vacuum diodes diode Thermionic emission eV bi V Fermi function EF EE E EE fE( ) expFF exp exp exp kTBBBB kT kT kT E The density of electrons with enough energy to go over the barriers exp kTB Thermionic emission eV nth exp kTB eV Insm th exp kTB IIVms sm (0) eV II I Ie1kTB sm ms ms Schottky barrier Ism ~ 0 Ism > Ims Ims constant Thermionic emission eV II I Ie1kTB sm ms s Nonideality factor = 1 Thermionic emission *2 eb IAATsR exp kTB A = Area * AR = Richardson constant * -2 -2 n-Si AR = 110 A K cm * -2 -2 p-Si AR = 32 A K cm * -2 -2 n-GaAs AR = 8 A K cm * -2 -2 p-GaAs AR = 74 A K cm Thermionic emission dominates over diffusion current in a Schottky diode. Schottky diodes Majority carrier current dominates. nonideality factor = 1. Fast response, no recombination of electron-hole pairs required. Used as rf mixers. Low turn on voltage - high reverse bias current eV II e1kTB s Tunnel contacts For high doping, the Schottky barrier is so thin that electrons can tunnel through it. metal p+ p Degenerate doping at a tunnel contact metal n+ n Tunnel contacts have a linear resistance. Contacts Transport mechanisms Drift Diffusion Thermionic emission Tunneling All mechanisms are always present. One or two transport mechanisms can dominate depending on the device and the bias conditions. In a forward biased pn-junction, diffusion dominates. In a tunnel contact, tunneling dominates. In a Schottky diode, thermionic emission dominates. Institute of Solid State Physics Technische Universität Graz JFETs - MESFETs - MODFETs Junction Field Effect Transistors (JFET) Metal-Semiconductor Field Effect Transistors (MESFET) Modulation Doped Field Effect Transistors (MODFET) n JFET n-channel JFET n For NA >> ND 2( VVbi ) xn eND 2V bi conducting at Vg = 0 Depletion mode hxn eND 2V bi nonconducting at V = 0 Enhancement mode hxn g eN D n-channel (power) JFET depletion zone Power SiC JFET p p n n-channel JFET drain n+ p+ depletion region p n p gate n+ JFETs are often discrete devices source MESFET Metal-Semiconductor Field Effect Transistors n Depletion layer created by Schottky barrier 2( VVbi ) xn eND Fast transistors can be realized in n-channel GaAs, however GaAs has a low hole mobility making p-channel devices slower. JFET n D n-channel JFET D G 2( VV ) G S x bi n-channel JFET n eN S D p-channel JFET eN h2 Pinch-off at h = xn V D V = pinch-off voltage p 2 p At Pinch-off, Vp = Vbi -V. JFET The drain is the side of the transistor that gets pinched off. .
Load more

Recommended publications
  • LSK489 Application Note
    LSK489 Application Note Low Noise Dual Monolithic JFET Bob Cordell Introduction For circuits designed to work with high impedance sources, ranging from electrometers to microphone preamplifiers, the use of a low-noise, high-impedance device between the input and the op amp is needed in order to optimize performance. At first glance, one of Linear Systems’ most popular parts, the LSK389 ultra-low-noise dual JFET would appear to be a good choice for such an application. The part’s high input impedance (1 T Ω) and low noise (1 nV/ √Hz at 1kHz and 2mA drain current) enables power transfer while adding almost no noise to the signal. But further examination of the LSK389’s specification shows an input capacitance of over 20pF. This will cause intermodulation distortion as the circuit’s input signal increases in frequency if the source impedance is high. This is because the JFET junction capacitances are nonlinear. This will be especially the case where common source amplifier arrangements allow the Miller effect to multiply the effective value of the gate-drain capacitance. Further, the LSK389’s input impedance will fall to a lower value as the frequency increases relative to a part with lower input capacitance. A better design choice is Linear Systems’ new offering, the LSK489. Though the LSK489 has slightly higher noise (1.5 nV/ √Hz vs. 1.0 nV/ √Hz) its much lower input capacitance of only 4pF means that it will maintain its high input impedance as the frequency of the input signal rises. More importantly, using the lower-capacitance LSK489 will create a circuit that is much less susceptible to intermodulation distortion than one using the LSK389.
    [Show full text]
  • A GUIDE to USING FETS for SENSOR APPLICATIONS by Ron Quan
    Three Decades of Quality Through Innovation A GUIDE TO USING FETS FOR SENSOR APPLICATIONS By Ron Quan Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 • Email: [email protected] A GUIDE TO USING FETS FOR SENSOR APPLICATIONS many discrete FETs have input capacitances of less than 5 pF. Also, there are few low noise FET input op amps Linear Systems that have equivalent input noise voltages density of less provides a variety of FETs (Field Effect Transistors) than 4 nV/ 퐻푧. However, there are a number of suitable for use in low noise amplifier applications for discrete FETs rated at ≤ 2 nV/ 퐻푧 in terms of equivalent photo diodes, accelerometers, transducers, and other Input noise voltage density. types of sensors. For those op amps that are rated as low noise, normally In particular, low noise JFETs exhibit low input gate the input stages use bipolar transistors that generate currents that are desirable when working with high much greater noise currents at the input terminals than impedance devices at the input or with high value FETs. These noise currents flowing into high impedances feedback resistors (e.g., ≥1MΩ). Operational amplifiers form added (random) noise voltages that are often (op amps) with bipolar transistor input stages have much greater than the equivalent input noise. much higher input noise currents than FETs. One advantage of using discrete FETs is that an op amp In general, many op amps have a combination of higher that is not rated as low noise in terms of input current noise and input capacitance when compared to some can be converted into an amplifier with low input discrete FETs.
    [Show full text]
  • Junction Field Effect Transistor (JFET)
    Junction Field Effect Transistor (JFET) The single channel junction field-effect transistor (JFET) is probably the simplest transistor available. As shown in the schematics below (Figure 6.13 in your text) for the n-channel JFET (left) and the p-channel JFET (right), these devices are simply an area of doped silicon with two diffusions of the opposite doping. Please be aware that the schematics presented are for illustrative purposes only and are simplified versions of the actual device. Note that the material that serves as the foundation of the device defines the channel type. Like the BJT, the JFET is a three terminal device. Although there are physically two gate diffusions, they are tied together and act as a single gate terminal. The other two contacts, the drain and source, are placed at either end of the channel region. The JFET is a symmetric device (the source and drain may be interchanged), however it is useful in circuit design to designate the terminals as shown in the circuit symbols above. The operation of the JFET is based on controlling the bias on the pn junction between gate and channel (note that a single pn junction is discussed since the two gate contacts are tied together in parallel – what happens at one gate-channel pn junction is happening on the other). If a voltage is applied between the drain and source, current will flow (the conventional direction for current flow is from the terminal designated to be the gate to that which is designated as the source). The device is therefore in a normally on state.
    [Show full text]
  • EE-202 Electronics-I- Field-Effect Transistors JFET
    EE-202 Electronics-I- Chapter 10 Field-Effect Transistors JFET 1 FET FET (Field-Effect Transistors) - BJTs (Bipolar Junction Transistors). Similarities: • Amplifiers • Switching devices • Impedance matching circuits Differences: • FETs are voltage controlled devices, BJTs are current controlled devices. • FETs have a higher input impedance, BJTs have higher gains. • FETs are less sensitive to temperature variations and they are more easily integrated on ICs. • FETs are generally more sensitive to static than BJTs. 2 FET Types •JFET–– Junction Field-Effect Transistor •MOSFET –– Metal-Oxide Field-Effect Transistor .D-MOSFET –– Depletion MOSFET .E-MOSFET –– Enhancement MOSFET 3 JFET Construction There are two types of JFETs •n-channel •p-channel The n-channel is more widely used. There are three terminals. •Drain (D) and source (S) are connected to the n-channel •Gate (G) is connected to the p-type material 4 JFET Operating Characteristics Three basic operating conditions for a JFET: • VGS = 0, VDS increasing to some positive value • VGS < 0, VDS at some positive value • Voltage-controlled resistor 5 JFET Operating Characteristics VGS = 0, VDS increasing to some positive value When VGS = 0 and VDS is increased from 0 to a more positive voltage; • The depletion region between p-gate and n-channel increases • Increasing the depletion region, decreases the size of the n-channel • Increasing in the n-channel resistance, the ID current increases. 6 JFET Operating Characteristics VGS = 0, VDS increasing to some positive value: Pinch Off VGS = 0 and VDS is increased to a more positive voltage, the depletion zone gets so large that it pinches off the n-channel.
    [Show full text]
  • The Pennsylvania State University the Graduate School THE
    The Pennsylvania State University The Graduate School THE EFFECTS OF INTERFACE AND SURFACE CHARGE ON TWO DIMENSIONAL TRANSITORS FOR NEUROMORPHIC, RADIATION, AND DOPING APPLICATIONS A Dissertation in Electrical Engineering by Andrew J. Arnold © 2020 Andrew J. Arnold Submitted in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy August 2020 The dissertation of Andrew J. Arnold was reviewed and approved by the following: Thomas Jackson Professor of Electrical Engineering Co-Chair of Committee Saptarshi Das Assistant Professor of Engineering Science and Mechanics Dissertation Advisor Co-Chair of Committee Swaroop Ghosh Assistant Professor of Electrical Engineering Rongming Chu Associate Professor of Electrical Engineering Sukwon Choi Assistant Professor of Mechanical Engineering Kultegin Aydin Professor of Electrical Engineering Head of the Department of Electrical Engineering ii Abstract The scaling of silicon field effect transistors (FETs) has progressed exponentially following Moore’s law, and is nearing fundamental limitations related to the materials and physics of the devices. Alternative materials are required to overcome these limitations leading to increasing interest in two dimensional (2D) materials, and transition metal dichalcogenides (TMDs) in particular, due to their atomically thin nature which provides an advantage in scalability. Numerous investigations within the literature have explored various applications of these materials and assessed their viability as a replacement for silicon FETs. This dissertation focuses on several applications of 2D FETs as well as an exploration into one of the most promising methods to improve their performance. Neuromorphic computing is an alternative method to standard computing architectures that operates similarly to a biological nervous system. These systems are composed of neurons and operate based on pulses called action potentials.
    [Show full text]
  • Field Effect Transistors
    Module www.learnabout-electronics.org 4 Field Effect Transistors Module 4.1 Junction Field Effect Transistors What you´ll learn in Module 4 Field Effect Transistors Section 4.1 Field Effect Transistors. Although there are lots of confusing names for field • FETs JFETs, JUGFETs, and IGFETS effect transistors (FETs) there are basically two main • The JFET. types: • Diffusion JFET Construction. • Planar JFET Construction. 1. The reverse biased PN junction types, the JFET or • JFET Circuit Symbols. Junction FET, (also called the JUGFET or Junction Unipolar Gate FET). Section 4.2 How a JFET Works. • Operation Below Pinch Off. 2. The insulated gate FET devices (IGFET). • Operation Above Pinch Off. • JFET Output Characteristic. All FETs can be called UNIPOLAR devices because • JFET Transfer Characteristic. the charge carriers that carry the current through the • JFET Video. device are all of the same type i.e. either holes or electrons, but not both. This distinguishes FETs from Section 4.3 The Enhancement Mode MOSFET. the bipolar devices in which both holes and electrons • The IGFET (Insulated Gate FET). • MOSFET(IGFET) Construction. are responsible for current flow in any one device. • MOSFET(IGFET) Operation. The JFET • MOSFET (IGFET) Circuit Symbols. • Handling Precautions for MOSFETS This was the earliest FET device available. It is a voltage-controlled device in which current flows Section 4.4 The Depletion Mode MOSFET. from the SOURCE terminal (equivalent to the • Depletion Mode MOSFET Operation. emitter in a bipolar transistor) to the DRAIN • MOSFE (IGFET) Circuit Symbols. (equivalent to the collector). A voltage applied • Applications of MOSFETS • High Power MOSFETS between the source terminal and a GATE terminal (equivalent to the base) is used to control the source - Section 4.5 Power MOSFETs.
    [Show full text]
  • Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time
    Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time Ahlem Rouis ( [email protected] ) Universite de Monastir Faculte des Sciences de Monastir https://orcid.org/0000-0002-9480-061X Neila Hizem Universite de Monastir Faculte des Sciences de Monastir Mohamed Hassen Institut Supérieur des Sciences Appliquées et de Technologie de Sousse: Institut Superieur des Sciences Appliquees et de Technologie de Sousse Adel kalboussi Universite de Monastir Faculte des Sciences de Monastir Original Research Keywords: Electrical Properties of Silicon, Etching Time, symmetrical current-voltage, capacitance-voltage Posted Date: February 11th, 2021 DOI: https://doi.org/10.21203/rs.3.rs-185736/v1 License: This work is licensed under a Creative Commons Attribution 4.0 International License. Read Full License Electrical properties of silicon nanowires Schottky barriers prepared by MACE at different etching time Ahlem Rouis 1, *, Neila Hizem1, Mohamed Hassen2, and Adel kalboussi1. 1Laboratory of Microelectronics and Instrumentation (LR13ES12), Faculty of Science of Monastir, Avenue of Environment, University of Monastir, 5019 Monastir, Tunisia. 2Higher Institute of Applied Sciences and Technology of Sousse, Taffala City (Ibn Khaldoun), 4003 Sousse, Tunisia. * Address correspondence to E-mail: [email protected] ABSTRACT This article focused on the electrical characterization of silicon nanowires Schottky barriers following structural analysis of nanowires grown on p-type silicon by Metal (Ag) Assisted Chemical Etching (MACE) method distinguished by their different etching time (5min, 10min, 25min). The SiNWs are well aligned and distributed almost uniformly over the surface of a silicon wafer. In order to enable electrical measurement on the silicon nanowires device, Schottky barriers were performed by depositing Al on the vertically aligned SiNWs arrays.
    [Show full text]
  • Notes on BJT & FET Transistors
    Phys2303 L.A. Bumm [ver 1.1] Transistors (p1) Notes on BJT & FET Transistors. Comments. The name transistor comes from the phrase “transferring an electrical signal across a resistor.” In this course we will discuss two types of transistors: The Bipolar Junction Transistor (BJT) is an active device. In simple terms, it is a current controlled valve. The base current (IB) controls the collector current (IC). The Field Effect Transistor (FET) is an active device. In simple terms, it is a voltage controlled valve. The gate-source voltage (VGS) controls the drain current (ID). Regions of BJT operation: Cut-off region: The transistor is off. There is no conduction between the collector and the emitter. (IB = 0 therefore IC = 0) Active region: The transistor is on. The collector current is proportional to and controlled by the base current (IC = βIC) and relatively insensitive to VCE. In this region the transistor can be an amplifier. Saturation region: The transistor is on. The collector current varies very little with a change in the base current in the saturation region. The VCE is small, a few tenths of volt. The collector current is strongly dependent on VCE unlike in the active region. It is desirable to operate transistor switches will be in or near the saturation region when in their on state. Rules for Bipolar Junction Transistors (BJTs): • For an npn transistor, the voltage at the collector VC must be greater than the voltage at the emitter VE by at least a few tenths of a volt; otherwise, current will not flow through the collector-emitter junction, no matter what the applied voltage at the base.
    [Show full text]
  • BJT JFET MOSFET Circa 1960 1970 1980 Gm/I (Signal Gain) Best Better Good
    • Crossover Distortion •FETS • Spec sheets • Configurations • Applications Acknowledgements: Neamen, Donald: Microelectronics Circuit Analysis and Design, 3rd Edition 6.101 Spring 2020 Lecture 6 1 Three Stage Amplifier – Crossover Distortion Hole Feedback 6.101 Spring 2020 Lecture 5 2 Crossover Distortion Analysis 6.101 Spring 2020 Lecture 5 3 Crossover Distortion Analysis 11 1 v v v e 10 in 10 out • The distortion 0.6v in each direction or 1.2v total vg 570ve resulting in a hole that is: 11 1 0.0172*1.2 ~ 0.02v vout 570 vin vout vn 10 10 • Increasing open loop gain 11 570 will reduce the crossover 1 v 10 v v 10.81v 0.0172v distortion. out 1 in 1 n in n 1 570 1 570 10 10 6.101 Spring 2020 Lecture 5 4 BJT ‐ FET Bipolar Junction Transistor Field Effect Transistor • Three terminal device • Three terminal device • Collector current controlled • Channel conduction by base current ib= f(Vbe) controlled by electric field • Think as current amplifier • No forward biased junction • NPN and PNP i.e. no current • JFETs, MOSFETs • Depletion mode, enhancement mode 6.101 Spring 2020 Lecture 6 5 BJT ‐ JFETS ‐ MOSFETS BJT JFET MOSFET Circa 1960 1970 1980 Gm/I (signal gain) Best Better Good Isolation PN Junction Metal Oxide* ESD Low Moderate Very sensitive Control Current Voltage Voltage Power YES No Yes *silicon dioxide 6.101 Spring 2020 Lecture 6 6 Voltage Noise * * Horowitz & Hill, Art of Electronics 3rd Edition p 170 6.101 Spring 2020 Lecture 6 7 FET Family Tree FET JFET depletion MOSFET n-channel p-channel depletion enhancement n-channel Vgs(off) gate source cutoff or n-channel p-channel Vp pinch-off voltage Vgs(th) gate source threshold voltage 6.101 Spring 2020 Lecture 6 8 Transistor Polarity Mapping* + output n-channel depletion n-channel enhancment n-channel JFET npn bjt input - + p-channel enhancment p-channel JFT pnp bjt - * Horwitz & Hill, the Art of Electronics, 3rd Edition 6.101 Spring 2020 Lecture 6 9 MOSFET & JFETS • MOSFETS – Much more finicky difficult process (to make) than JFET’s.
    [Show full text]
  • Fabrication and Characterization of Polymeric P-Channel Junction Fets Tianhong Cui, Yuxin Liu, and Kody Varahramyan
    IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 3, MARCH 2004 389 Fabrication and Characterization of Polymeric P-Channel Junction FETs Tianhong Cui, Yuxin Liu, and Kody Varahramyan Abstract—Polymer materials are attracting more and more polymer devices. The possibility of processing conducting attention for the applications to microelectronic/optoelectronic polymers based on coating techniques has enabled researchers devices due to their flexibility, lightweight, low cost, etc. In this to fabricate various electronic/optoelectronic devices such as paper, fabrication and characterization of a polymer junction field-effect transistor (JFET), using poly (3,4-ethylenedioxythio- thin film transistors, diodes, LEDs, capacitors, organic inte- phene) poly (styrenesulfonate) (PEDT/PSS) as the channel and grated circuits, organic wires, and electroluminescent devices poly (2,5-hexyloxy p-phenylene cyanovinylene) (CNPPV) as the [8]–[14]. Polymer thin films can be coated on substrates such gate layer, are reported. The all-polymer JFET was fabricated as glass, plastic, silicon, wood, or paper. by the conventional ultraviolet (UV) lithography techniques. The In this paper, a p-channel polymer JFET fabricated with ultra- fabricated device was measured and characterized electrically. In the meantime, the comparisons were listed between polymer violet (UV) lithography was presented, and its operation mech- JFET and analogous inorganic semiconductor counterparts. Its anism was discussed in detail. Based on the testing results, the pinch-off voltage reaches 1 V that is in the applicable range, and polymer JFET and the characteristics of conducting polymers the current is IQ V e at zero gate bias. It demonstrates that were analyzed. the device operates in a very similar fashion to its conventional counterparts.
    [Show full text]
  • A Vertical Silicon-Graphene-Germanium Transistor
    ARTICLE https://doi.org/10.1038/s41467-019-12814-1 OPEN A vertical silicon-graphene-germanium transistor Chi Liu1,3, Wei Ma 1,2,3, Maolin Chen1,2, Wencai Ren 1,2 & Dongming Sun 1,2* Graphene-base transistors have been proposed for high-frequency applications because of the negligible base transit time induced by the atomic thickness of graphene. However, generally used tunnel emitters suffer from high emitter potential-barrier-height which limits the tran- sistor performance towards terahertz operation. To overcome this issue, a graphene-base heterojunction transistor has been proposed theoretically where the graphene base is 1234567890():,; sandwiched by silicon layers. Here we demonstrate a vertical silicon-graphene-germanium transistor where a Schottky emitter constructed by single-crystal silicon and single-layer graphene is achieved. Such Schottky emitter shows a current of 692 A cm−2 and a capacitance of 41 nF cm−2, and thus the alpha cut-off frequency of the transistor is expected to increase from about 1 MHz by using the previous tunnel emitters to above 1 GHz by using the current Schottky emitter. With further engineering, the semiconductor-graphene- semiconductor transistor is expected to be one of the most promising devices for ultra-high frequency operation. 1 Shenyang National Laboratory for Materials Science, Institute of Metal Research, Chinese Academy of Sciences, 72 Wenhua Road, Shenyang 110016, China. 2 School of Materials Science and Engineering, University of Science and Technology of China, 72 Wenhua Road, Shenyang 110016, China. 3These authors contributed equally: Chi Liu, Wei Ma. *email: [email protected] NATURE COMMUNICATIONS | (2019) 10:4873 | https://doi.org/10.1038/s41467-019-12814-1 | www.nature.com/naturecommunications 1 ARTICLE NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-019-12814-1 n 1947, the first transistor, named a bipolar junction transistor electron microscope (SEM) image in Fig.
    [Show full text]
  • Chapter 6: Field-Effect Transistors Fets Vs
    www.getmyuni.com Chapter 6: Field-Effect Transistors www.getmyuni.com FETs vs . BJTsFETs BJTs Similarities:Similarities:Similarities: • Amplifiers • Switching devices • Impedance matching circuits Differences:Differences: • FETs are voltage controlled devices. BJTs are current controlled devices. • FETs have a higher input impedance. BJTs have higher gains. • FETs are less sensitive to temperature variations and are more easily integrated on ICs. • FETs are generally more static sensitive than BJTs. Electronic Devices and Circuit Theory, 10/e 22 Robert L. Boylestad and Louis Nashelsky www.getmyuni.com FET ypesTFET Types FET ypesT : JFET•• :Junction JFET FET ••MOSFET: Metal–Oxide–Semiconductor FET MOSFETDD--MOSFET: MOSFETDltiMOSFETDepletion MOSFET EE--MOSFET:MOSFET: Enhancement MOSFET Electronic Devices and Circuit Theory, 10/e 33 Robert L. Boylestad and Louis Nashelsky www.getmyuni.com JFET ConstructionJFET Construction There are two types of JFETs channel••nn- -channel channel••pp- -channel The n-chliidldhannel is more widely used. There are three terminals: Drain•• (D)DrainceSour and ceSour(S) are connected to the n-channel Gate•• Gate(G) is connected to the p-type material Electronic Devices and Circuit Theory, 10/e 44 Robert L. Boylestad and Louis Nashelsky www.getmyuni.comJFET Operation: The Basic IdeaJFET Idea JFET operation can be compared to a water spigot. The sourceThe source of water pressure is the accumulation of electrons at the negatilfhdiive pole of the drain-source voltage. The dra iThdin oftithltf water is the electron deficiency (or holes) at the positive pole of the applied voltage. The controlThe control of flow of water is the gate voltage that controls the width of the n -channel and , therefore , the flow of charges from source to drain.
    [Show full text]