Maintaining Integrity in EEPROM’s

Ed Patnaude, Sr. Applications Engineer Maxwell Technologies Inc., 9244 Balboa Ave., San Diego, Ca 92123

Abstract

Introduction can retain data for over ten years in both the powered and un-powered state. is a major concern in In today’s systems EEPROM’s are quite applications that rely on nonvolatile memory for often used to store program code or operational long-term . Even with the hardware parameters. They are programmed once and and software protection techniques that are expected to retain data for the life of the incorporated into memory devices, data application, whether the device is powered or corruption is still a possibility. not. Loss of data or data corruption can lead to When analyzing data corruption system failure. It is important that designers probabilities in nonvolatile memories, the understand the sources of data corruption and question should not be if it would occur, but implement software and hardware schemes to what to do when it occurs. By implementing protect against it. proper data protection techniques, both in hardware and in software, the chances of data Source of Data Corruption corruption occurring can be greatly reduced. With the addition of error detection, data The number one cause of data corruption correction and circuitry, the risk of in nonvolatile memories is software bugs. Errors system failure due to data corruption in a non- in the software can lead to unwanted erase/write device can be minimized. cycles, violation of timing parameters resulting There are a number of ways that in wrong data being written or data being memories can be made nonvolatile. SRAM’s written to the wrong location, and interruption in can be made nonvolatile with the use of battery programming cycles. back-up circuitry. PROM's, in which a fuse is In EEPROM’s, exceeding the devices blown at the time of programming, are guaranteed erase/write cycles will eventually nonvolatile, however these devices are only burn through the ’s gate insulation, available in low densities. The most accepted causing permanent damage and resulting in the nonvolatile memories are the re-writable inability of the memory cell to retain EEPROM and the block re-writable Flash programmed data. EEPROM. This paper will address maintaining Impurities in the semiconductor materials in EEPROM's, although many of can provide leakage paths from the memory cells the design concepts relate to all nonvolatile resulting in shorter than expected memories. times. A typical EEPROM is implemented in a When a power failure occurs while a floating gate technology. A data bit is write cycle is in progress, and it is not allowed to programmed into the memory cell by charging or complete, data written to the EEPROM must be discharging a transistor’s gate. An insolating considered corrupted. material, which encapsulates the transistor’s EEPROM’s are most prone to data gate, prevents the charge from leaking off. corruption during power on and off. If hardware protection is not properly implemented, unintentional writes, due to noise or uncontrolled Maintaining Data Integrity logic levels on the device’s control lines, can result in inadvertent writes. If a controlled power cycle is required, the EEPROM supply voltage should be taken all Protecting EEPROM’s from data corruption the way to zero volts and not let to sit at some ambiguous voltage where it may be vulnerable to EEPROM manufactures can implement an inadvertent write. testing that will screen out devices containing The use of error detection and correction impurities in the semiconductor structure, which circuitry (EDAC) can be used to maintain data can lead to premature data retention failures. integrity. EEPROM’s provide the designer both To improve data retention time, typically hardware and software data protection. Proper greater than ten years, reprogramming the use of these features will minimize the risk of EEPROM periodically will recharge the memory data corruption occurring. cells which will greatly increase a devices data In addition to hardware and software retention time. protection, other steps can be taken to assure data If a write cycle is in progress, and the integrity. Careful power supply design, error EEPROM is powered off without letting it detection and correction techniques, and power complete, data that has been written must be supervisory circuits should all be used to considered invalid. To avoid this from maintain data integrity in the EEPROM’s. happening the voltage supply should be designed so that the voltage fall slow enough that the write Software Data Protection cycle has time completes before the level drops below the lowest specified operating voltage of Software Data Protection (SDP) locks the the EEPROM. memory preventing unintentional erase/writes Power supply supervisory circuitry from occurring. Once SDP is enabled a three- should be used to control the state of the password is written into memory, EEPROM during power on and off. When a temporarily unlocking it, followed by the data power loss is sensed, all further writes should be that is to be programmed. Once the data is halted. written and the programming cycle completes, SDP is again enabled. Summary Software Data Protection may not protect stored data when the device falls below the EEPROM’s are today’s choice for non- guaranteed operating voltage of the EEPROM. volatile memories. They are mainly used to store Hardware write protection must be implemented program code and system parameters. Unlike to assure data integrity. other memory types, which are continuously re- written, EEPROMs are normally programmed Hardware Data Protection once and are expected to retain that data for years to come. An EEPROM is most susceptible to data With today’s manufacturing and corruption during power on and off. Although screening processes, having a EEPROM fail these devices can internally operate to below 2 prematurely, under normal operating conditions, volts, functionality cannot be expected. During is very unlikely. power cycling it is imperative that the memory A robust hardware and software design, content be protected by the proper along with a contingency plan should corruption implementation of the hardware protection built occur, can greatly minimized the risk of system into the EEPROM. failure due to data corruption in a EEPROM. Many EEPROM’s contain noise filters on the /CE and /WE inputs which keep short voltage spikes, that fall below the devices input low threshold, from triggering an inadvertent write.