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UNIVERSITY OF OSLD
An Intelligent GPIB Control lar
by
J.C. Wikne
Department of Physics, University of Oslo, Box 1048 Blindern, 0316 Oslo 3, Norway
Report 87-42 Received 1987 - 12-23 IS3N-0332-5571
DEPARTMENT OF PHYSICS REPORT SERIES oup-%i-k%
An Intelligent 6PIB Controller
by
J.C. Wikne
Department of Physics. University of Oslo, Box 1048 Blindern. 0316 Oslo 3, Norway
Report 87-42 Received 1987 - 12-23 ISSN-0332-5571 An Intelligent 6PIB Controller
by
J.C. Wikne
Department of Physics, University of Oslo, Box 1048 Blindern, 0316 Oslo 3, Norway
Report 87-42 Received 1987 - 12-23 1SSN-0332-5571 An Inttlligent GPIB Control Itr
J. C. Wikne Department of Physics. University of Oslo Box 1043 Blindern, 031é Oslo 3, Norway
Abstract: An intelligent. GPIB (General Purpose Interface Bus> controller is described. It employs an autonomous slaye CPU together with a dedicated control1 er/talker/1 istener chip to handle the GPIB bus protocol, thus freeing the host computer from this time-consuming task. Distributing a large part of the necessary software to the slaye side, assures that the system can be implemented on virtually any computer with a minimum of effort. Content»! »*9* 1. Introduction to the Intelligent GPIB Controller 3 2. Functional Dtscription 3
3. The High-Level Command Set 5
4. Electronic Circuit Description ? 4.1. Th* G-64 Based GPIB Controller 7 4.1.1. The Master / Slave Interface ? 4.1.2. The GPIB Controller Hardware 9 4.1.3. The Slave CPU 9 4.1.4. The PC Bus Parallel I/O Adapter * 4.2. The PC Bus GPIB Controller II 4.3. The Status Display il
5. The Slave rirmware 11
6. Host Software Interfacing 12
7. A High-Level Programming Example 13
3. Concluding Remarks 14
Reference List IS Appendix 16
A.l. Intelligent GPIB Controller Technical Specifications 17 A.2. Schematic Diagrams 18 A.3. Component Position Diagrams 26 A.4. Intelligent GPIB Controller Error Codes 30 A.5. Address Mapping of Individual Chips page 2 I. Introduction to the Intelligent GPIB Controller. The Intelligent GPIB l1' Controller was originalIv developed for us* •n the Solar Energy Project at the Department of Physics. The need to preserve software investments through system upgrading from an old microcomputer to a newer one, together with problems concerning availability and high cost of commercially obtainable GPIB controllers, prompted the design of a controller that was as computer independent as possible with respect to both hardware 2nd software. The original concept resulted in a universal controller cons 1st1ng of three cards in a sub-chassis conforming to the G-64 industrial standard ,2'. plus one verv simple adapter card for the actual host computer. This system became operative on microcomputers of the Tiki 100 type |JI and on IBM PC compatibles during 1985 and 198a. The de facto dominance of micros of the latter kind that has emerged since the development started, gave rise to a "condensed" version of the controller, contained on one «ingle IBM PC/XT expansion card. £. Functional Description. A block diagram of the controller is given in fig. 1. The most important components from a functional point of view are four VLSI chips: The Z80 ("slave") CPU, the GPIB controller chip, and the two FIFO buffers. Correspondingly, the CPU employs firmware that can be divided into th'ee logical sections: The Control & Monitor program, the GPIB Chip Driver routines, and the Host Communications routines (the former and latter are contained in one physical block in the diagram). The firmware is largely interrupt-dri ven, to assure maximum speed and flexibility. All functions directly related to the GPIB bus are performed by the slave CPU, thus relieving the host of these tasks. The slave's operation is controlled by the host through simple, high-level commands. Moreover, with only minor firmware modifications these commands can be made to mimic those of any commercially available GPIB control ler. The controller communicates asynchronously with the host computer through a parallel I/O-port or optionally a serial RS-232 link. The serial port can also be connected to a dumb terminal, in which case the Monitor firmware facilitates interactive use. The parallel 2/0 port is a standard 230 PIO, which is interfaced physically to almost any host CPU-bus by means of hardware (Host Adapter block) ranging in complexity from simple cables/connectors to a circuit board containing typically 5 SSI/MSI chips. The FIFOs of up to 2k depth assure that both the host computer and the slave CPU to a large extent can run at their own pace. The GPIB controller chip and transceivers handle the actual, physical interfacing to the GPIB bus, including all necessary protocols to conform to the IEEE-483/2 standard. page 3 Intelligent GPIB Controller Block Diagram « C If) G-64 OERSION ONLY 3. The High-Level Command Set. The present -firmware (Rev. 1 .01 > for the GPIB controller ha* been designed to mimic the instruction set of the ABC80 microcomputer •«,«>. These instructions are sent to the controller via either the parallel or the serial port, have a maximum length OPEN tt Initializes controller and opens communication. CLOSE It Stops communication. CMD <*1>,<*2>. It Sends the strings SI, *2.... on the GPIB bus. tt The strings are sent al ternat i ngl y as bus tt commands IEC*( T TO Sets timeout to none. S? tt Serial polls all instruments. The response is tt a string of the format MTA=A STB=XXXXXXXX &*. tt Here A is the talk address of ths instrument # whose status is returned (the first one with tt RQS active, if any), XXXXXXXX is the status tt byte in binary, & (if present) is an explicit tt indication of RGS active, and * (if present) tt indicates that 3RQ is still active after the tt poll. S tt Serial polls instrument with talk address A. # Response as for the previous command. Sa # Enables automatic SRQ handling. This means # that the command S? is executed automatically tt when a SRQ is asserted by an instrument. Sm Disables automatic SRQ handlino. P? tt Executes a parallel poll. The response is a # string of format PPR=XXXXXXXX, where XXXXXXXX tt is the status byte. page 5 » the Noni tor displays • heading on tn* ccnmU W terminal, and then the command prompt GH6'. M The controller ic now in • mode .«here it can e>« l» operated interactively, for instance 'or debug N purposes. OUIT * CONSOLE (serial port) INSTRUCTION ONLY tt Instructs the Control & Monitor program to U receive further instructions from the parallel # por t. The controller notifies the host of anv error conditions detected through ths error codes given in appendix A.4. pacie 6 4. Electronic Circuit Description. For th* following discussion, ptea.se rtftr to the detailed diagrams figs. 3-*, given in appendix A.S. 4.1. The G-64 Based GPIB Controller. A block, diagram showing the three-card structure of thii version ot the controller is given in fig. 2. 4.1.1. The Master / Slave Interface. The schematic diagram of the G-64 bus compatible Master / SI»"* interface card is given in fig. 3. It employs a Z80 PIO, U005, as a parallel interface port to the adapted host bus. The PROM U017 is the address decoder for the port as seen from the host (master) side. For the possible address mappings available through jumper settings, please refer to appendix A.6. For information concerning the interface connector POS, see section 4.1.4 and appendix A.10. The 512 bvte deep FIFO buffers that separate the master from the slave and assure largely independent data flow rates, U004 and UO11, are of type IDT720! from Integrated Device Technology <«>. Pin compatible devices with depths of up to 2k are available. The COST (COntrol -and STatus) buffer U00S provides a "mailbox" function for passing special messages from the host PIO's B-port and the FIFOs' full/empty .flags onto the G-64 bus. The bits are defined as foilows: Bi t 0 # .'OFF (Output FIFO Full Flag) 1 tt !0EF (Output FIFO Empty Flag) 2 # !IFF (Input FIFO Full Flag) 3 # !IEF (Input FIFO Empty Flag) 4 #• (Not defined, available as genera! host-to-slave flag- 5 # (Not defined, available as general host-to-s 1 =•"* flag) 6 # SWR (Software Reset) 7 n !HRD (Host ReaD fl„q) "Input" and "Output" in this table are a? seen from the slave side. The character ! denotes that "the signals are active-low. The address decoding and data buffering on the G-64 side is performed by the PROMs U00? and U013, and the bidirectional buffer U007. For the possible address mappings available through jumper settings, refer to appendi x A.5. The G-64 bus interrupt logic appears in the lower. left cart of tr.e schematic diagram. U006 is the vector storage. An interrupt to the bus (if enabled) is asserted bv a logical OR of COST-buffer bits 0 =nd 3, these are the FIFO full flags and thus may require immediate attention from the slave. page 7 <»«. 2 CONTROLLER CARD CONTROL LOGIC V 5 fll I i A CPI B CPI B i CHI P PROM I I SUFFE R SUFFE R RE G VECTO R CPU CARD » FIFO CARD 2: 4.1.2. Th« SPI8 Controller HaroVar*. Th« schematic diigrun ot the G-64 but compatible GPIB controller is giyen in fig. 4. The heart of this c»rd Is the GPIB protocol chip, 1f-IS9?l4 from T*/as Instruments ''' , U021. This chip handles all the necessary handshake and message protocols of a GPIB controller and its associated talker. Iistener . The operating address on the GPIB bus is set in binary <:A5-A1> bv tr.e DIP-switch SWOOI. This switch has three more positions: 6. DAT, DisAble Talker function Con). 7. DAL, DisAble Listener function (on). 8. OPCOL, selecting DIO-lines as open collector (on) or tri-state. The electrical interface to the 6PIB bus is handled bv the dr i uer chip set 7S160 / 75161 '»', U022 and U025. The bus data lines can be configured with or without active pull-up. See above. The GPIB Chip Driver routines are contained in a 2716 PROM, U02». The interface to the G-64 is almost identical to that on the FIFO card. The interrupt of the TMS9914 is passed directly on as a G-64 !IRQ, after being adapted to the requirements of the interrupt structure on this bus. For the possible address mappings available through jumper settings, refer to appendix A.5. 4.1.3. The Slave CPU. The slave CPU is a standard, commercially available G-64 compatible single-board microcomputer, the GESMPU5A from Gespac SA, Geneva »9>. This card is Z80A-based, has a 4MHz clock, 2k of on-board RAM, and can accommodate a PROM of either 2716 or 2732-type. In this design, this PROM contains the Control & Monitor program and the Host Communications routines. The card also contains an Intel 8251 USART- chip, serving as an RS-232 port for monitor purposes, or as an optional serial data path. 4.1.4. The PC Bus Parallel I/O Adapter The PC Bus Parallel I/O Adapter (Host Adapter block in fig. 1) is a half-length expansion card for IBM PCs and compatibles, designed for interfacing any kind of 8-bit bus-oriented microprocessor peripheral CPIO, SIO etc.) or similar component as an I/O-port to the PC internal bus. Its use is thus intended to be general, not limited to the GPIB controller described in the rest of the present report. The card contains all necessary buffer/driver circuitry for the PC bus address, data, clock and control lines, as well as an optional, programmable address/control signal decoder in shape of a PROM, U034. The peripheral to be interfaced can either be located in the on-card prototyping area, giving room for up to seven chips, or be connected by a ribbon cable bus to a 50-pin connector, P06, at the rear edge of the card. Hardware interrupts on the PC-side are supported. The active-low interrupt 1 ine of the peripheral can be mapped to either of the interrupt requests IRQ2, IRQ3 or IRQ5 on the PC internal bus. This is determined by the setting of the strap on jumper field J006. In most page 9 computer conf igurat ion», IR02 n tha mott l>k*ly to b* ••'••labia. A circuit diagram ot' tht card •• givan m fig, S. *• c*n t*« »aan, tha da*ign i* vary ganar»I. Apart from tha obviou» alactrical and timing conndarati on», tha onty restriction it impo»»t on tft» utar'» paripheral<»> i» that it tthav> mu»t ba mapped in tha PC I/O »P*c* addrass ranga 380H-3FFH. Tha ribbon cabla I/O bus ia. apart from e>» u*ar-programmed CSO-4 lina», a »ibset of tha Tiki axpanston bu*. tt connact» diracttv to connactor POS on tha Mastar / Slava interface card. Tha pinout i» given in appendix A.IO. page 10 4.2. Th* PC Bus GPIB Control lar. This controller is essentially th* tame design as th* G-»4 vanion, except that *he circuit, including the slave CPU, is integrated on on* single IBM PC/XT typ* expansion Board. Th* schematic diagrams are given in figs. 6-9. The slave CPU section, that replaces the GESMPu-SA board, is shown in fig. 9. It is quite simple, with the 280A itself, U039, the RAM U042 and th* PROM U041 (Control & Monitor program. Host Communications routines) as the major components. U043 is the clock generator, U040 the main address decoder, while U036 and U0 3? comprise • wait-state generator to make the circuit comply with the timing constraints of th* FIFOs and GPIB chip, still maintaining the full "internal* speed of the CPU. It should be noted that no RS-232 port it provided with this vers i on. The read / write control logic is somewhat less complicated than on the G-44 based controller, due to the separate ' RD / 'UP. signals and simple timing of the Z80, as opposed to the more cumbersome G-64 protocol. The interrupt logic is also simpler and less general, because of the fixed daisy-chain structure of the single board. The setting jumpers for the internal address mappings are identical tj those on the G-64 version. Please refer to appendix A.5. 4.3. The Status Display. The LED status indicators are defined as follows: OUT Indicates that the output FIFO buffer contains information to be read by the host. READY Signals that the slave CPU has finished processing the latest command sent by the host." ACTIVE Indicates activity on the TMS9914 controller chip. TALK Indicates that the controller is programmed to transmit (data or interface messages) on the GPIB bus. EXT Signals that the G-64 CPU card is addressing one of the two other cards. These indicators s.re primarily intended for diagnostic purposes, to facilitate a fast and simple approach to a first-order verification of the operation of the controller, and also finding the origin of possible malfunctions in the hardware or software/firmware. However, since the dynamic pattern of the indicators will be fixed for a given application, they may also be of value to users who wish to "keep an eye on" the data-rates and activity in an automated measurement system. For the positions of the indicators, please refer to appendi.x A.3. 5. The Slave Firmware. The program for the slave CPU was written in ZSO assembly language tic. A listing that applies to the G-64 version of the controller is given in appendix A.14. The PC version is identical, apart from the omission of the routines that handle the RS-S3S port. The firmware is contained in two EPROMs, as described in sections 4.1.2, 4.1.3 and 4.£. page 11 å. Hott Software lnt*rfr-ing. On mott host computers, the normal approach to mak* a sof*u*r* interface for the GPIB controller is to writ* a device driver according to the prescriptions given by the operating system used. Once this •* done, the controller can conimun l cat* directly with uny program «vi tem» on the host, provided that these systems us* the standard mechanisms of the operating system for file handling and I/O. In the present system, which distributes as much as possible of the controller specif>c software to th* slav*, the device driver is In most c*«"»s fa.rlv simpl*. This is due to the fact that Its only purpose is to transmit ASCII command strings to the slave's parallel port, and receive similar data str ings back. As an example, the source listiig of the MS-DOS Unfortunately, device drivers for the current versions of MS-DOS do not include any facilities for handling hardware interrupts. Therefore, if such interrupts are to be used, a ipecial, non-standard part of the device driver has to communicate directly with some mechanism provided by the high-level language the application program is written in. The possibilities for such a communication depend very much on the actual language, the compiler/interpreter, and the ex tens iveness of the documentation. !n most cases, implementing the handling of hardware interrupts is highly cumbersome. However, the example in appendix A.15 shows what is needed to handle IRQ2 by means of the ON STRIG(O) GO T0-+'ac i I i ty of interpretative MS-Bas/c or GW-Basic. page 1£ 7. A High-Level Programming Example. The following example, written in Turbo Pascal '"'. illustrates the use of the 6PIB controller with a PC employing the device driver described in the previous section. It programs • Hewlett-Packard HP3478A multimeter •>*> to read • resistance value, and then displays that value on the PC monitor. The program assumes controller GPI8- address SI, and multimeter OPIB-address 14. The corresponding ASCII- values for their respective listen- and talk-addresses can be taken from the table in appendix A.14. program GPlB-test; var ( del in i11ons ; GPIB_m : text I GPIB_out ! texts device-name : string[41; out_str : str ingC2SS]; in_str s strtngC255]; i : integer; beg i n < program main body '. beg i n ( initialize begi n C program & get data } out_str:='OPEN'; { initialize controller wr i teln(GPIB_out,out_str); ( send command > out_str:='CMD "U.","F3R4NST3","5N"'; C 1) U. = set controller to talk, multimeter to listen £) F3R4N5T3 = command to multimeter (see HP3473 manual) 3) 5N = set controller to listen, multimeter to talk > wr i teln(GPIB_out,out_str) ; out_str:='IEC* beg i n (. c 1 ose files } out_str:='CL0SE': i stop control 1er wr i teln(GPIB_out ou t_str) i close(GPIB_out); cl ose(GPIB_i n) ; end; end. page 13 8. Concluding Remark i. Throughout the last two years the Intelligent GPIB Controller has proved its versatility in various configurations of PC-based automated measurement systems, employing instruments from different manufacturers as well as custom-made. It has been successfully used with programs in both Basic and Pascal, one of which Is an adapted version of a program originally written for the ABC80 microcomputer it". page 14 References. 1> IEEE Standard Digital Interface for Programnabl* Instrumentation (ANSI/IEEE Std 488-1978) IEEE. New York, USA 1975,1978 S> Gespac Q-64/G-96 Specification* Manual R«u. OS, Gespac SA, Geneva, Switzerland 1984 3> Teknisk Handbok for Kontiki-100 (Technical Handbook -for Kontiki-100) Kontiki-Data, Oslo 1984 4) ABC80 Bruksanvisn ing (ABC80 User's Guide) Luxor - Scandia Metric 1980 5) ABC IEEE Manual Scandia Metric AB 1980 6) IDT High-Speed CMOS Data Book Integrated Device Technology Inc., California, USA 1985 7) Texas Instruments The 9900 Family Data Book Texas Instruments Inc. 1981 8> Texas Instruments The Interface Circuits Data Book Second Edition, Texas Instruments Inc. 1981 9) Gespac GESMPU-5A Specifications Sheet Gespac SA. Geneva, Switzerland 1984 10) 2 i 1 og 280 Assembly Language Programming Manual Rev. B, Zilog Inc., California, USA 1980 11) Intel iAPX 86/88, 186/183 User's Manual & Programmer's Reference Intel Corporation, California, USA 1983 IS) Borland Turbo Pascal Version 3.0 Referanse Manual Borland International, California, USA 19SS 13) Hewlett-Packard Service Manual, Model 3478A Digital Multimeter Hewlett-Packard Company, Colorado, USA 1981 14) J. C. Wikne A GPIB-Based, Modular Data Acquisition System Institute of Physics, University of Oslo, Report 83-13 page 15 Appendi x page 16 A.l. Intelligent GPIB Controller Technical Specifications. 6-44 version PC bus version CPU tvpet 280 zso Clock frequency: 4MHz 4MHs Memory: 2kb RAM 8k b RAM 2 X 2kb PROM 2 X 2kb PROM 2 X 512b FIFO 2 X 512b FIFO I/O channels: GPIB GPIB Tiki I/O bus IBM-PC bus page 17 A.S. Schematic Diagram». page IS t,9. 3 sisisasg co «55 nn nn .BL. __„ G6H BUS page 19 tiq. 4 GPIB BUS *«13*« i 3! II 2 t> «cm» nuc S3 15 m 'llfajjjsi a?i •saajsiij ,J? 3! &L_»i rat Sisiiisig* Illiiiii blMIII!iJ_MJ* lit BMI 3 SE 151 asagss* M SO Q G6H BUS page 20 74BLSC» 1W Intelligent GPIB Controller Diagram 3 PC Bus Parallel I/O Adapter •o U034 fluTE1 U03H and RHQ4 ar» optional, co facilitate tn# us* of th* UQ adapter uiin dtsiqns OTHER than in» GPIB controller. f>Q. é o 0 u 5 i m page £2 PC Bus GPIB Controller Diagram £ Controller Hardware .jri Hl Wg ru ******* 003 > tU>* LS4I t ^t>^ 7HALB02 M PC Bus GPIB Controller Diagram 3 ,, —• 13 I ™"" 13 AP7 Parallel I/O Adapter U031 sh •1 Al •2 AS jei JB2 It •3 A3 _KS_ n JK3 11 Bt AH JQ JBS 11 •3 A3 _K± w I nza 13 |M «6 JH. S&i IB. >7 A7 -KS. 1120-? i2Z U 18 AS JEZL _iet£ c SIR U033 S) 'ML3"ii f I5«8 _EB_ ""3 f U032/E 7HALS00 r" -OfcL -BEKLc=i»a ,50 U035X3 ja r • I- Og: «.<>. page S5 A.3. Component Position Diagram». page 26 «>9. 10 + P)CU l-V OQ UO 17 n UOOS ZSOPIO U012 £=) U016 £—Dl U004 IDT7201 UO11 IDT 7201 a? J U003 00 UOOB 541 U010 32*0<>3 ROOHn ? )£ :zz)cz i U002 02 U007 640 C 3 U014 74 LZ^£ U001 08 U006 374 U009 ' U013 ? )? I? ICZZD cooa 24S10 24S10 R001 O001 l + R002 4- page £/ <»g. II - + O -I J I- 0. O « U a. a ««*-««-* U082 75160 U023 73161 ooo^Æffaa I CI Z I <. > 1 U021 TMS9914 U030 340 U020 00 U02? 32 a) 1 UP 39 2716 U019 02 U024 640 5 ir~ i J2 34„ U01B 08 U023 374 IU026 ^ U028 3 IT 1) I) 1 24S10 S4S10 C003R006 «• +R007 + page 2S *. r*. W a 5 s ? DI 8ZV il. 0 page £9 A.4. Intelligent GPtB Controller Error Codes. 01 Command Syntax Error 02 Command Argument Error 03 Instrument Timeout 04 Overflow 05 Controller Not Opened 06 Instrument Not Active 07 Controller Alone on Bus 08 Hardware Error 0? False Interrupt 10 Controller Internal Error page 30 A.S. Address Mapping of Individual Chips (Slava side>. Addresses art In hex. The chips ara memory mapped <10>. NOTE THE DEPENDENCE ON JUMPER SETTINGS. Tht values usad in the firmware listings in A.14 are marked with an asterisk. U004 and UOU (FIFOs, IDT7S01) 7700 J001/1 2700 J001/2 8000 J001/3 F700 JOOl/fl U008 (COST Buffer, 74ALSS41) 7701 J001/I 2701 J001/2 8001 J001/3 F701 J001/4 U006 (Vector register. 74ALSS74) 7702 J00I/1 2702 J001/2 8002 J001/3 F702 J001/4 U021 (GPIB Controller Chip, TMS9914) 7400-•7407 J005/1 2400--2407 JO05/2 U0S9 (GPIB Driver PROM, 2716) 7000--73FF J005/3 2000-•23FF JO05/4 U030 (Controller Address Register, 74AL3541, read only) 7404 JO05/1 2404 JO05/2 U023 (Vector Register, 74ALS574, wr i te only) 7402 J005/1 2402 J005/2 U041 (Control & Monitor PROM, 2716, U9 on 6-64 CPU card) 0000-•07FF U042 (RAM, S565, U10 on 6-64 CPU card) 1000-•17FF Additionally, the I/O addresses FD, FE and FF are used by the 3251 USART (US) and FC by the page latch on the 6-64 version. Note that the 8k 5565 RAM of the PC bus version is not used to ; ts full extent in this address map. If the firmware is to be modified in such a way that more memory is required, the contents of the decoder PROM U040 must be changed correspondingly. A.6. Address Mapping of Master Port. Addresses are in hex, in the I/O address space. NOTE THE DEPENDENCE ON JUMPER SETTINGS. The values used in the device driver listing in A.15 are marked with an asterisk. U005 (ZS0 PIO, Parallel Input Output) 330-3S3 JO0 2/1 3A0-3A3 JO02/2 3C0-3C3 JO02/3 3E0-3E3 JO02/4 page 31 A.7. FIFO Buffer Section Address Decoding PROM Contents. Addresses and contents of PROMs «re In hea U013 (Low order) 00 5 01 6 OS 3 03-FF 7 Checksums DiF9 U009 (High order) 00-24 F 27 Q 28-74 F 77 E 78-7F F 80 B 81-Fé F F7 7 F3-FF F Checksum: 0EF1 U017 (Master port decoder) 00 TE 01-07 FF 08 FD 09-0F FF 10 FB 11-17 FF 13 • F7 19-1F FF Checksum: 1FD1 A.8. Controller Chip Section Address Decoding PROM Contents. Addresses and contents of PROMs are in hex. U023 (Low order) 00 5 01 5 02 1 03 5 04 4 05 5 06 5 07 5 03-FF 7 Checksum OéEB U026 (Hi gh order) 00-1F F 20-23 7 24 D 25-6F F 70-73 B 74 E 75-FF F Checksum page 32 A.9. PC Bus GPIB Controller Mam Memory Address Decoding PROM Contents. Addresses »nd contents of PROM is In hex. U040 (PROM & 2k RAM) 00-07 E 08-0F F 10-17 D 18-FF F Checksums 0EE8 U040 (PROM & 4k RAM) 00-07 E 08-0F F 10-1F D S0-FF F Checksum: 0ED8 U040 (PROM & 8k RAM) 00-07 E 08-0F F 10-2F D 30-FF F Checksum: 0EB8 A.10. Ribbon c*bl« I/O Bus Pinout (Tiki bus). I GND a •sv 3 4 INT 5 6 7 I ORG1 8 Ml 9 RD 10 11 EXIN 1 12 13 14 • 15 DO 16 Dl 17 D2 IS D3 19 D4 20 D5 21 Dé 22 D7 23 AO 24 Al 25 A2 page 34 A.11. GESMPU-5A Strap Settings. «ig. 13 *?E3 if I t! RS-338 port D2 page 35 A.12. G-64 Bastd 6PI8 ControlItr Compontnt* List. si tt part ualut dtscr I pt i or» C001 220pF c«r«ni c cooa 471» F tantal urn C003 47\IF tantalum C004 10CF tantal um C005 lOnF ctramie, decoupling C006 lOnF C007 lOnF C008 lOnF COO? lOnF CO 10 lOnF con lOnF coia lOnF CO 13 lOnF CO 14 lOnF CO 15 lOnF CO 16 lOnF CO 17 lOnF CO 18 lOnF CO 19 lOnF coao lOnF C021 lOnF CO 22 lOnF C023 lOnF C024 lOnF C025 lOnF D001 TIL271 LED, green Dooa TIL281 LED, yel1ow D003 TIL261 LED, red D004 TIL261 LED, red J001 jumper header, 8 pin, 100m i 1 J002 jumper header, 8 pin, 100m i 1 J003 J004 J005 jumper header, 8 pin, lOOmil J006 jumper header, 6 pin, lOOmil P01 09020646921 G-64 bus connector P02 angled header for flat-cable, 50 pin P03 09020646921 G-64 bus connector P04 3M 3549 GPIB connector P05 angled header for fl^t-cable, 50 pin P06 PC bus edge connector page 36 SUOOI U001 74ALS0S U0O2 74ALS02 U003 74ALSOO U004 IDT7201 U005 Z60PIO UOO<4 74ALS574 U007 74ALS440 U008 74ALSS41 UOO? TBP24S10 UOIO 74ALS32 UOU IDT720 J U012 74LS258 U013 TBP24S10 U014 74ALS74 U015 74ALS32 U016 74ALS27 U017 TBP18S030 U018 74ALS03 UOl? 74ALS02 U020 74ALSO0 U021 TMS9914 U022 75160 U023 74ALS574 U024 74ALS64U U025 75161 U02é TBP24S10 U027 74ALS32 U023 TBP24S10 U02? 2716 U030 74ALS540 U031 74LS541 U032 74ALS11 U033 74LS245 U034 TBP28L22 U035 74ALS00 page 37 A.13. PC Bui 6PI8 Control If Component* Lut. «it* part F tantal um COOS lOnF ceramic, decoupling C004 lOnF C007 lOnF C008 lOnF C009 lOnF CO 10 lOnF con lOnF CO 12 lOnF CO 13 lOnF C014 lOnF CO 15 lOnF CO 16 lOnF CO 17 lOnF C018 lOnF C01? lOnF coao lOnF C021 lOnF C022 lOnF C023 lOnF C024 lOnF C025 lOnF C026 lOnF C027 lOnF C023 lOnF CO 29 lOnF CO 30 lOnF C031 lOnF CO 32 lOnF C033 lOnF C034 lOnF C035 10r,F C03é lOnF C037 lOnF CO 38 lOnF C039 lOnF C040 lOnF C041 lOnF CO 42 lOnF C043 lOnF D001 TIL271 LED, green D002 TIL231 LED. vel Iow D003 TIL261 LED, red DO 04 TIL261 LED, red J001 jumper header, 3 pin, 1 OCimi I J002 jumper header, S pin, 100m i 1 JO 0 5 jumoer header, 8 pin, lOOmi1 JO 06 jumper header, 6 pin, 100m i 1 P04 3M 3549 GPIB connector P0<4 , PC bus edge connector (part PCB> Q001 BC547 Q002 BC547 R001 IkO carbon resistor, &W R002 IkO R003 330 page 38 R004 100 ROOS 100 ROO* IkO R008 100 R009 100 ROIO IkO RO 11 IkO R012 33R RO J 3 330 R014 IkO RNOl IkO SIP resistor network. RN02 IkO SIP rtsistor network, RN03 IkO SIP resistor network. RN05 IkO SIP rtsistor network. SUOOl 8 pole SPST DIP-switch UOOl 74ALS08 U002 74ALS02 U003 74ALSOO U004 IDT7201 U005 Z80PIO U006 74ALS574 U008 74ALSS41 U009 TBP24S10 UOIO 74ALS32 uon IDT7201 U012 74LS258 U013 TBP24S10 U014 74ALS74 U015 74ALS32 U016 74ALS27 U017 TBP18S030 U018 74ALS08 UOl? 74ALS02 U021 TMS9914 U022 75160 U023 74ALS574 U02S 75161 U026 TBP24S10 U027 74ALS32 U028 TBP24S10 U02? 2716 U030 74ALS540 U031 74LS541 U032 74ALS11 U033 74LS245 U035 74ALS00 U036 74ALS00 U03? 74LS74 U033 74LS132 U039 280ACPU U04G TBP24310 U041 2716 U042 TC5565 U043 74LS321 YOOl 4MHz crystal page 39 A.14. GPIB Controller Slav* CPU Program. 280/44180 CROSS ASSEMBLER DEVELOPMENT SYSTEM 04-12-8? I4t?7 I PROGRAM FOR ZSO SLAVE CPU ON 0-64 BASED GPIB CONTROLLER I I t I INITIALIZATION & CONSOLE I/O ROUTINE FOR GESMPU-SA I G64 BUS FIFO BUFFER I/O kOUTINES i REGISTERS USEDi AF, 8C, E, HL ; SPECIAL ADDRESSES & CONSTANTS OOFC PGLTCH: EQU OFCH PAGE/EPROM SELECT LATCH OOFD BAUDGN: EQU OFDH BAUORATE GENERATOR ADDR OOFE SERDAT: EQU OFEH SERIAL PORT DATA ADDR OOFF SERCNT: EQU OFFH SERIAL PORT CONTROL ADDR 0040 SERRES: EQU 040H SERIAL PORT RESET BYTE 0016 RCENA: EQU 016H PORT RECEIVE ENABLE 0033 TRENA: EQU 033H PORT TRANSMIT ENABLE OOEE BAUD: EQU OEEH 9600 BAUD OOCE CONFIG: EQU OCEH 2 STOP, NO PAR, 8 BITS 001B ESC: EQU 01BH ESCAPE 000D CR: EQU 00OH CARRIAGE RETURN 000A LF: EQU OOAH LINE FEED 0008 BS: EQU 008H BACKSPACE 0020 SPACE: EQU 020H SPACE 0000 NUL: EQU 000H NUL CHARACTER 0007 . INTTBH: EQU 00 7H INT TABLE HIGH ORDER 173F STACK: EQU 173FH START OF STACK ADDRESS 17F0 FPBLKs EQU 17F0H FLAG 4 PARAMETER BLOCK 17F6 IOSU: EQU 17F6H PARAL/SERIAL I/O SWITCH 7700 PARDAT: EQU 7700H FIFO CARD DATA ADDR 7701 PARCNT: EQU 7701H FIFO CARD CONTROL ADDR ! INIT CPU 0000 ORG 0000H 0000 F3 DI DISABLE INTERRUPT 0001 ED5E IM VECTOR INTERRUPT 0003 3E07 LD A, INTTBH HIGH ORDER VECTOR 0005 ED47 LD I,A CPU VECTOR REG 0007 313F17 LD SP,STACK INIT STACK POINTER i LOAD PAGE & 8AUDRATE, INIT 8251 BRG 000A AF XOR CLEAR OOOB D3FC OUT (t-GLILri; ,A PAGE 0, EPROM 000D D3FF OUT (SERCNT),A 8251 RESET ROUTINE 000F D3FF OUT (SERCNT),A 0011 D3FF OUT (SERCNT),A 0013 3E40 LD A,SERRES ; RESET BYTE 0015 D3FF OUT (SERCNT),A 0017 3EEE LD A,BAUD : BAUDRATE 0019 D3FD OUT (BAUDGN), A 0018 3ECE LD A,CONFIG ; 8251 MODE WORD 001D D3FF OUT (SERCNT),A INIT FLAG & PARAMETER BLOCK page 40 I OOIF 2IF017 LD HL.FPBLK IFIP BLOCK START 0022 AF XOR A t CLEAR A 0023 77 FPINITt LO (HL),A ; LOAD ZERO 0024 ZC INC L ! ADJUST BYTE COUNTER 0025 20FC JR NZ.FPINIT t NEXT BYTE IN BLOCK JP MAIN 1 INITIALIZATION COMPLETE 0027 C3CO0I ) I TEST FOR CONSOLE ESCAPE ! ESCTSTt LD A.RCENA ; ENABLE SERIAL RECEIVE 002A 3E1* OUT 0038 CDB900 CALL CRLF RETURN & FEED 003B 214D00 LD HL.HDING HEADING ADDRESS 003E 010000 LD BC.OOOOH FLOATING LENGTH 0041 CDE400 CALL OUTSTR SEND 0044 CDB900 CALL CRLF RETURN & FEED 0047 313F17 LD SP,STACK !NIT STACK POINTER 004A C3C001 JP MAIN I/O SWITCHING COMPLETE ; GPIB MONITOR HEADING 004D 2A2A204750 HDING: DB '** GPIB MONITOR US. 1.0 - L985-U4-04 **' 4942204D4F 4E49544FS2 205rf53£E20 312E30202D 2031393835 2D303é2D30 34202A2A 0074 21 DB ENDSTR LINE INPUT ROUTINE, BUFFER POINTER ENTERED IN HL REG, MAXIMUM LENGTH IN C REG REGISTERS USED: AF, BC, E, HL 0075 3AF41? INLINE: LD A,(IOSW) ; GET I/O DIRECTION 0078 FEOI CP 01H ; CHECK 007A 230E JR Z,SERIN j SERIAL INPUT PARALLEL CFIFO BUFFER) INPUT 007C CDC900 NXTPAR: CALL PARREC GET SINGLE CHARACTER 007F 77 LD SERIAL (8251) INPUT page 41 006A SO SERIN I ID E,L » SAVE INITIAL POINTER LOU 008B COD700 NXTSERI CALL SERREC t GET SINGLE CHARACTER 008E FE08 CP B8 1 TEST BACKSPACE 0090 2810 JR Z.BACKSP 0092 77 LO 00A2 7B BACKSPi LD A,E i BUFFER LIMIT LOU 00A3 BD CP L ( TEST EMPTY LINE 0OA4 28E5 JR Z.NXTSER 1 LINE EMPTY 00A4 3E0B LD A,BS 0OA8 CDFBOO CALL CHRTRN ; SEND BS OOAB 3E20 LD A,SPACE OOAD CDFBOO CALL CHRTRN ; SEND SPACE OOBO 3E08 LD A,BS 00B2 CDFBOO CALL CHRTRN ; SEND BS 00B5 2B DEC HL ; ADJUST INPUT POINTER 00B4 OC INC C i ADJUST LENGTH COUNTER 00B7 18D2 JR NXTSER i NEXT CHARACTER OOB? 3E0D CRLF: LD A,CR i CARRIAGE RETURN OOBB CDFBUO CALL CHRTRN ; SEND CR OOBE 3E0A LD A,LF i LINE FEED OOCO CDFBOO CALL CHRTRN i SEND LF 00C3 3E00 LD A,NUL j NUL CHARACTER 00C5 CDFBOO CALL CHRTRN i SEND NUL, FLUSH BUFFER DQC8 C9 RET ; READ FIFO BUFFER DATA 00C9 CD2A00 PARREC: CALL ESCTST ; TEST CONSOLE ESCAPE OOCC 3A0177 LD A,(PARCNT) ; READ CONTROL REG OOCF CB5F BIT 3,A i TEST BUFFER EMPTY 00D1 28F4 JR Z,PARREC ; WAIT FOR DATA 00D3 3A0077 LD A, ; READ SERIAL PORT DATA 00D7 3E16 SERREC: LD A.RCENA ; ENABLE RECEIVE OOD? D3FF OUT (SERCNT).A OODB DBFF RCNRDY; IN A, OUTPUT STRING ROUTINE, BUFFER POINTER ENTERED IN HL REG, LENGTH IN C REG REGISTERS USED: AF, BC, HL SPECIAL ADDRESSES & CONSTANTS 0021 ENDSTR: EGU '." '." ENDS OUTPUT STRINGS 00E4 AF OUTSTR: XOR CLEAR A page 42 ODES 89 CP C 1 TEST FLOATING/FIXED 00E4 SOOA JR NZ,FIXLEN 1 FLOATING STRING LENGT t ! FLOATING STRING LENGTH, ENOSTR NARKS END OF STRING 00E8 7E FLTLENi LD A,(HL) 1 GET FROM BUFFER OOE9 FESI CP ENDSTR I TEST END MARK 00E8 Cfl RET Z OOEC CDcBOO CALL CHRTRN | SEND OOEF S3 INC HL 1 ADJUST BUFFER POINTER OOFO :dF6 JR FLTLEN ; NEXT CHARACTER ! ; FIXED STRING LENGTH, GIVEN IN C REG 00F2 7E FIXLEN: LD A,(HL) GET FROM BUFFER 00F3 CDFBOO CALL CHRTRN SEND 00F4 S3 INC HL ADJUST BUFFER POINTER OOF? 00 DEC C ADJUST LENGTH COUNTER 00F8 SOFB JR NZ, FIXLEN NEXT CHARACTER OOFA C? RET END OF STRING OUTPUT CHARACTER OOFB 47 CHRTRN: LD B A SAVE A DATA OOFC 3AF617 LD A/IOSUI) GET I/O DIRECTION OOFF FE01 CP 01H CHECK 0101 S80F JR Z.SERTRN SERIAL OUTPUT WRITE TO FIFO BUFFER 0103 CD2A00 PARTRN: CALL ESCTST TEST CONSOLE ESCAPE 0106 3A0177 LD A,(PARCNT) READ CONTROL REG 0109 CB47 BIT 0,A TEST BUFFER FULL 01 OB 23F6 JR Z, PARTRN WAIT ON FULL 010D 78 LD A,B RESTORE DATA 010E 320077 LD WRITE TO SERIAL PORT 0112 3E33 SERTRN: LD A,TRENA ; ENABLE TRANSMIT 0114 D3FF OUT COMMAND INTERPRETER FOR 6PIB CONTROLLER HIGH-LEVEL COMMANDS ; BUFFER ADDRESSES 4 SPECIAL CHARACTERS 1780 INSTR: EQU 1780H INSTRUCTION START ADDRESS 002C TABSEPi EQU ',' INSTRUCTION SEPARATOR 0021 ENDTAB: EQU ".' END INSTRUCTION TABLE i INTERPRET ROUTINE 0120 ORG 0120H 0120 1E00 ; ITERP: LD E,OOH ; RESET INSTRUCTION COUNTER page 43 0138 215401 LD HL,TABLE I INSTRUCTION TABLE START 0125 7E NEXTINi LO A, ! INSTRUCTION TABLE 0154 434D44 TABLE: OB 'CMD' 0157 2C DB TABSEP 0158 49454324 DB 'IEC*' 015C 2C DB TABSEP OISD 533F OB 'S?' 015F 2C DB TABSEP 0160 5361 DB 'Sa' 0162 2C DB TABSEP 0163 536D DB 'Sm' 0165 2C DB TABSEP 0166 53 DS 'S' 0167 2C DB TABSEP 0168 54 DB 'T' 0169 2C DB TABSEP 016A 503F DB 'P?' 016C 2C DB TABSEP 016D 4F50454E DB 'OPEN' 0171 2C DB TABSEP 0172 434C4F5345 DB 'CLOSE' 0177 2C DB TABSEP 0178 51554954 DB 'QUIT' 017C 2C DB TABSEP 017D 21 DB ENDTAB INSTRUCTION FETCH, GESMPU-5A BUFFER & SPECIAL ROUTINE ADDRESSES, STRING DATA 1740 BUFFER: EQU 1740H INPUT BUFFER START 1780 MIRBUF: EQU 1780H MIRROR BUFFER START 0020 INSLEN: EQU 0020H MAX INSTR. STRING LENGTH page 44 t I PRINT PROMPT STRING t, SET INSTRUCTION ROUTINE 0180 ORG 0I8PH 0180 3AF4I7 FETCHt LD A, ; PROMPT STRING DEFINITION 01AC 475049423E PRT: DB 'GPIB>' 01B1 21 DB ENDSTR PROGRAM MAIN LOOP 01C0 ORG 01C0H 01C0 CD8001 MAIN: CALL FETCH ; GET INSTRUCTION 01C3 CD2001 CALL INTERP ; INTERPRET INSTRUCTION 01C6 CD0002 CALL EXEC i EXECUTE INSTRUCTION 01C9 18F5 JR MAIN INSTRUCTION EXECUTE INSTRUCTION BRANCH ROUTINE 0200 ORG 0200H 0200 C844 EXEC: BIT 0,H TEST VALID INSTRUCTION 0202 CO RET NZ ABORT - ERROR FLAG SET 0203 CB23 SLA E MULT INSTR. NUMBER BY 2 0205 UOO LD D,00H RESET D REG 0207 211002 LD HL.JPTAB INSTR. JUMP TABLE START 020A 19 ADD HL.DE JUMP TABLE POINTER 020B 5E LD E,(HL) LOW ORDER ROUTINE ADDR. 020C 23 INC HL 020D 5& LD D,(HL> HIGH ORDER ROUTINE ADDR. 020E EB EX DE.HL JUMP ADDRESS TO HL 020F E9 JP (HL) i INSTRUCTION JUMP TABLE 0210 4002 JPTAB: DU CMD ; CMD ENTRY page 45 0813 4003 DU I EC I IEC» ENTRY 0814 D003 DU S-ALL 1 8? ENTRY oau 6E04 OU S» | Sa ENTRY 0218 7704 OU Sn 1 Sn ENTRY oaiA S004 DU S 1 S ENTRY 0S1C 8003 OU T J T ENTRY 02IE 4B01 DU YAL1D 0220 A003 OU OPEN | OPEN ENTRY 0322 4B01 DU VALID 0224 7006 DU QUIT ; QUIT ENTRY CMD INSTRUCTION ROUTINE REGISTERS USED: AF, BC, DE, HL SPECIAL CHARACTERS 4 LABELS 002C SU: EQU ',' SWITCH CHARACTER 0022 STRLIM: EQU 22H '"' STRING LIMIT CHAR 0043 LABKEY: EQU 'C 'C CHR» LABEL KEY 002B J0IN1: EQU '+' STRING JOIN CHAR 003B J0IN2: EQU ';' STRING JOIN CHAR OOOD DATEND: EQU ODH CR DATA END CHARACTER ; CHD SUBINSTRUCTI ON INTERPRET, BUF 0240 ORG 0240H 0240 CD0F03 CMD: CALL OPCHK CONTROLLER OPEN CHECK 0243 1600 LD D,OOH RESET SWITCH REGISTER 0245 OA .NEXTCH: LD A,(BC) GET INSTRUCTION CHAR 0246 OB DEC BC ADJUST BYTE POINTER 0247 FE20 CP * f TEST BLANK 0249 28FA JR Z.NEXTCH DISCARD BLANKS 024B FE2B CP JOIN! JOIN CHARACTER 024D 28F6 JR Z.NEXTCH DISCARD 024F FE3B CP J0IN2 JOIN CHARACTER 0251 28F2 JR Z.NEXTCH DISCARD 0253 FE2C CP SW TEST SWITCH CHARACTER 0255 281C JR Z,SWITCH DATA/COMMAND SWITCH 0257 FE43 CP LABKEY TEST LABEL KEY 0259 281D JR Z.LABCH CHECK LABEL 025B FE22 CP STRLIM TEST STRING LIMIT 025D 2032 JR NZ.VALCH VALID CHECK ; READ DATA STRING 025F OA NEXTBT: LD A, page 46 0276 18CD JR NEXTCH t CHECK SPECIAL LABEL FOR DECIMALLY SPECIFIED DATA 0878 21AB02 LABCHl LD HL,LABEL ; LABEL START ADDRESS 027B 03 INC BC I ADJUST BYTE POINTER 0S7C CD2D01 CALL TEST i TEST LABEL ; READ tt CONVERT DECIMAL DATA 027F D5 NEXTDC: PUSH DE i SAVE SWITCH (0 REG) 0280 CDC002 CALL B1NC0N j CONVERT TO BINARY 0283 El POP HL 0284 54 LD D,H RESTORE SWITCH 0285 CD9402 CALL CHROUT DATA CHARACTER OUTPUT 0288 03 INC BC BYTE POINTER SACK 0289 OA LD A,(BC) READ PREVIOUS CHAR 028A FE2C CP DSEP CHECK END OF DATA 028C 28F1 JR Z,NEXTDC MORE DECIMAL DATA 028E OB DEC BC ADJUST BYTE POINTER 028F 18B4 JR NEXTCH J CHECK VALID COMMAND STRING 0291 FEOD VALCH: CP DATEND TEST END OF DATA 0293 2007 JR N2,ERR_01 ILLEGAL CHARACTER 029S C9 RET ; BYTE TRANSFER CALL 029i C5 CHROUT.• PUSH BC SAVE BYTE POINTER 0297 CD1E70 CALL SEND SEND DATA BYTE 029A CI POP BC RESTORE POINTER 029B C? RET ; COMMAND ERRORS 029C 1E01 ERR-01: LD E.01H ERROR CODE 01 029E C38006 JP ERROR MAIN ERROR HANDLER 02A1 1E02 ERR-02: LD E,02H ERROR CODE 02 02A3 C38004 JP ERROR MAIN ERROR HANDLER 02Aé 1E04 ERR_04: LD E,04H ERROR CODE 04 02A8 C38Q04 JP ERROR MAIN ERROR HANDLER ;' DECIMAL DATA LABEL DEFINITION 02AB 43485224 LABEL i DB 'CHR*' 02AF 2C DB TABSEP 02B0 21 D8 ENDTAB CONVERT DECIMAL DATA TO BINARY, BUFFER POINTER BC REG, RETURN DE REG REGISTERS USED: AF, BC, DE, HL SPECIAL CHARACTERS 0023 DSTART: EGU '<' i '<' START OF DATA CHAR 002S INTEG: EQU '"'' • 'V.' INTEGER DATA LABEL 002C DSEP: EQU I i ',' DECIMAL DATA 3EPAR 0029 DEND: EQU ')' ; ')' END OF DATA CHAR 02C0 ORG 02C0H 02C0 OA BINCON: LD A, page 47 02DI CDF102 CALL NUH i GET NUMERIC CHAR 02D4 38CB JR CERR-02 I NOT NUMERIC CHAR 0206 CD0203 NEXTOGi CALL XIO t MULTIPLY BY 10 02D9 38CB JR CERR-04 ! OVERFLOW 02DB 1600 LO D.OOH ; CLEAR D REG 02DD EéOF ANO OFH ; TRUNCATE 4 MSB'S OSDF SF LD E,A 02E0 19 ADO HL.DE ! ADO TO TOTAL 02EI 38C3 JR C,ERR_04 OVERFLOW 02E3 EB EX DE.HL DE RETURN REG 02E4 CDF102 CALL NUM GET NUMERIC CHAR 02E? 30ED JR NC.NEXTDG NEXT DIGIT 02E9 FE2C CP OSEP CHECK DATA SEPARATOR 02EB C3 RET Z NOT END OF DATA 02EC FE29 CP DEND CHECK END CHARACTER 02EE 20AC JR NZ.ERR-01 END CHAR MISSING 02F0 C? RET GET NUMERIC CHARACTER ROUTINE, BUFFER POINTER BC REG, RETURN A REG, CARRY SET IF NOT NUMERIC REGISTERS USED: AF, BC 02F1 OA NUM: LD A,(BC) READ CHAR 02F2 OB DEC BC ADJUST BYTE POINTER 02F3 FE20 CP ' ' TEST BLANK 02F5 23FA JR Z ,NUM DISCARD BLANKS 02F7 FE25 CP INTEG TEST INTEGER LABEL 02F9 28F4 JR Z,NUM DISCARD 02FB FE30 CP 'Q' CHECK =>0 02FD D3 RET C NOT NUMERIC CHAR 02FE FE3A CP ':' CHECK =<9 • 0300 3F CCF C IF NOT NUMERIC 0301 C9 RET MULTIPLY BY 10, ENTRY DE REG, RETURN HL REG REGISTERS USED: F, DE, HL 0302 42 XIO: LD H,D GET HIGH ENTRY 0303 6B LD L,E GET LOU ENTRY 0304 29 ADD HL,HL MULT BY 2 0305 3807 JR C.XEND CHECK OVERFLOW 0307 29 ADD HL,HL MULT BY 2 (TOTAL 4x:> 0308 3804 JR C.XEND CHECK OVERFLOW 030A 19 ADD HL,DE ADD ENTRY (TOTAL SX) 030B 3801 JR C.XEND CHECK OVERFLOW 030D 29 ADD HL.HL MULT BY 2 (TOTAL 1QX) 030E C9 XEND: RET i CHECK CONTROLLER OPEN ROUTINE 17F2 CTOPEN: EQU 17F2H OPEN FLAG MAILBOX 030F 3AF217 OPCHK: LD A,(CTOPEN) 1 GET FLAG 0312 FE01 CP 01H ; TEST OPEN 0314 C8 RET 2 0315 1E05 LD E,05H ; ERROR COD 0317 C38004 JP ERROR IEC* INSTRUCTION ROUTINE REGISTERS USED: AF, BC, DE, HL page 48 t t t SPECIAL ADDRESSES !7F0 TMOUTt EQU I7F0H S TIMEOUT DATA REG 1760 OUTBUF: EQU I740H j OUTPUT BUFFER ADDRESS ( j I EC* DATA READ, PARAMETER BUFFER POINTER BC REG, j OUTPUT BUFFER POINTER HL REG 0340 ORG 0340H 0340 CD0F03 1EC: CALL OPCHK CONTROLLER OPEN CHECK 0343 CDC002 CALL BINCON GET STRING LENGTH 0346 AF XOR A CLEAR A 0347 B3 OR E TEST ZERO 0348 CAA102 JP 2,ERR_02 NO STRING 034B 316017 LD HL,OUTBUF GET BUFFER POINTER 034E D5 PUSH DE SAVE ORIG. LENGTH CTR. 034F D5 NEXTRC: PUSH DE SAVE LENGTH COUNTER 0350 E5 PUSH HL SAVE BUFFER POINTER 0351 ED5BF017 LD DE,(TMOUT> GET 'TIMEOUT 0355 CD6470 CALL RECVE GET DATA BYTE 0353 El POP HL RESTORE BUFFER POINTER 0359 77 LD T INSTRUCTION ROUTINE REGISTERS USED: AF, BC, DE T DATA READ, BUFFER POINTER BC REG, RETURN 0380 ORG 0380H 0380 OA LD A,(BC> i GET TIMEOUT DATA 0381 D430 SUB '0' ! ADJUST ASCII OFFSET 0383 57 LD D,A 0384 1E00 LD E.OOH ! CLEAR E REG 0384 ED53F017 LD CTMOUT) ,DE i LOAD (TMOUT) REG 038A C9 RSI OPEN GPIB CONTROLLER ROUTINE REGISTERS USED: AF, DE, HL SPECIAL ADDRESSES & CONSTANTS 0021 DRCHK: EQU 21H i DRIVER START ENTRY PROM CHECK 4 CONTROLLER INITIALIZE 03AO ORG 03A0H O3A0 3A0070 OPEN: LD A,UNIT) CHECK DRIVER PROM page 49 03A3 FE21 CP DRCHK i DRIVER START ENTR* 03AS 200C JR NZ, ERR-08 t HARDWARE ERROR 03A? CD6004 CALL VCTGET t GET VECTOR 03AA CD0070 CALL INIT ; INITIALIZE GPIB CONTR 03AO 3E01 LD A.01H 1 OPEN FLAG 03AF 32F2I? LD S? INSTRUCTION ROUTINE REGISTERS USED: AF, EC, DE, HL, IX POLL & OUTPUT MESSAGE 03D0 ORG 03D0H 0300 CDOF03 S-ALLi CALL OPCHK i CHECK OPEN 03D3 13 6017 LD DE.QUTBUF i BUFFER POINTER 0306 2I2D04 LD HL.SERMSS i SERIAL POLL MESSAGE ADDR 03D? CD4204 CALL STRMOV J MESSAGE TO BUFFER 03DC 1E00 LD E.OOH j START POLL ADDR 0 03DE 1602 LD D.02H i ALL UNITS 03E0 CD8270 CALL SPOLL ; POLL ROUTINE 03E3 DD214017 LD IX.OUTBUF ; OUTPUT BUFFER INDEX 03E7 CB75 BIT 6,L j TEST RSY 03E? 2831 JR Z.SEXIT NO 'SV 03EB CBF4 SOUT: SET 6,H SET TAG BIT 03ED DD7404 LD OX+DISP1) >H ADDRESS TO BUFFER 03F0 7D LD A,L "DATA TO A 03F! £607 LD H,07H INIT BIT COUNTER 03F3 CB7F NXTBIT: BIT 7,A TEST MSB 03F5 2804 JR Z,BITZR BIT IS ZERO 03F7 DDCB0AC6 SET 0,(IX+DISP2) BIT IS ONE 03FB 07 BITZRi RLCA ROTATE STATUS BYTE 03FC DD23 INC IX ADJUST BUFFER INDEX 03FE 25 DEC H ADJUST BIT COUNT 03FF 20F2 JR NZ,NXTBIT MORE 0401 DD216017 LD IX.OUTBUF OUTPUT BUFFER INDEX 0405 CB75 BIT -Sil- TEST RSV 0407 2304 JR Z.NORSV NEGATIVE 040? DD361226 LD SERIAL POLL MESSAGE CONSTANTS & SPECIAL CHARACTERS 0004 DISP1: EQU 04H ADDRESS DISPLACEMENT page 50 OOOA DISP2) EQU OAH 1 STATUS DISPLACEMENT 0012 01SP3) EOU 12H f INDICATOR DISPLACEMENT 0026 RSVINDi EQU 'i' 1 '&' INDICATES RSV 002A SROIND: EQU ' *' t '»' INDICATES SRQ 042D 4D54413D20 SERMSS: D6 'MTA- STB-00000000 ' 20S3S4423D 3030303030 3030302020 0441 21 D8 ENDSTR STRING MOVE ROUTINE, SOURCE POINTER DE REG, DESTINATION POINTER HL REG 0442 7E STRMOV: LD A,(HL> i GET SOURCE BYTE 0443 FE21 CP ENDSTR i TEST END OF STRING 0445 C8 RET 2 0446 EDAO LDI ; MOVE BYTE 0448 18F8 JR STRMOV ; NEXT CHARACTER S INSTRUCTION ROUTINE REGISTERS USED: AF, BC, DE, HL SPECIAL ADDRESSES & CONSTANTS SAME AS IN S? POLL & OUTPUT MESSAGE 0450 ORG 04S0H 0450 CD0F03 CALL OPCHK CHECK OPEN 0453 CS PUSH BC SAVE BYTE POINTER 0454 116017 LD DE.OUTBUF BUFFER POINTER 0457 212D04 LD HL,SERMSS SERIAL POLL MESSAGE ADDR 045A CD4204 CALL STRMOV MESSAGE TO BUFFER 045D CI POP BC RESTORE BYTE POINTER 045E OA LD A, Sa / Sra INSTRUCTION ROUTINES REGISTERS USED: AF, BC, DE, HL SPECIAL ADDRESSES & CONSTANTS 0006 CNTLEV: ESU 06H CONTROLLER INT LEVEL ENABLE/DISABLE AUTOMATIC SRQ HANDLING P46E 3E06 Sa: LD A, CNTLEV j CONTROLLER INT LEVEL 0470 CD8004 CALL VCTGET j GET VECTOR 0473 CDC770 CALL SRQENA i ENABLE AUTOMATIC SRQ 0476 C9 RET page 51 0477 3E04 Sut LO A.CNTLEV I CONTROLLER INT LEVEL 0479 CD8004 CALL VCTGET I GET VECTOR 047C CODS70 CALL SRODIS I DISABLE SRO 04?F C? RET I GET INTERRUPT VECTOR, LEVEL ENTERED IN A REG, ; VECTOR RETURNED IN BC REG 1 0480 01F007 VCTGETi LD BCINTTAB ; INT ADDRESS TABLE 0483 87 ADD A,A | MULT BY 2 0484 81 ADD A,C ; FIND VECTOR LOU 0485 4F LD C,A 0484 EDS7 LD A,I : GET VECTOR HIGH 0488 47 LD P,A 0489 C9 RET CONTROLLER INTERRUPT SERVICE ROUTINE REGISTERS USED: AF, DE, HL SPECIAL ADDRESSES 03D0 SRQSRV: EQU S.ALL POLL AS SRQ RESPONSE 17F4 ISTREG: EQU 17F4H LATEST INT. STATUS REG i SERVE INTERRUPT 043A F3 CNTINT: DI i DISABLE FURTHER INT'S 048B FS PUSH AF ; SAVE REGISTERS 048C C5 PUSH BC 048D 05 PUSH DE 048E E5 PUSH HL 048F DDE5 PUSH IX 0491 118A04 LD DE, CNTINT i TEST SWI 0494 37 SCF 0495 3F CCF ! CLEAR CARRY 0496 ED52 SBC HL.DE ! COMPARE 0498 2005 JR NZ.HRDINT ! "HARD" INTERRUPT 049A 2AF417 LD HL, 04BB FB INTRET: EI ENABLE CPU INTERRUPT 04BC ED4D RET I 04BE CDBB04 ERR-07: CALL INTRET RETURN FROM INTERRUPT 04C1 1E07 LD E.07H ; ERROR CODE 07 04C3 C3800.5 JP ERROR ; MAIN ERROR HANDLER page 52 t I ; QUIT INSTRUCTION ROUTINE t I I 01 SABLE CONSOLE I/O 1 0470 ORG 0470H 0470 AF aum XOR A I CLEAR A REG 0471 32F417 LD ERROR MESSAGE ROUTINE, ERROR CODE ENTERED IN E REG REGISTERS USED: AF, BC, E, HL ERROR ENTRY, ERROR NUMBER ENTERED IN E REG 0430 ORG 0480H 0480 3AF417 ERRORS LD A, i SEND MESSAGE 0498 010000 ERRMES: LD BC.OOOOH FLOATING STRING LENGTH 049B CDE400 CALL OUTSTR ; SEND 049E CDB900 CALL CRLF ; RETURN i FEED ; RESUME 04A1 313F17 LD SP,STACK i RESTORE STACK POINTER 04A4 C3C001 JP MAIN ! ERROR HANDLING COMPLETE i ERROR MESSAGE TABLE 04A7 21 ERRTB1: DB ENDSTR 04A8 20S3594E54 DB ' SYNTAX ERROR' 4158204552 524F52 04B5 21 DB ENDSTR 04B4 2041524755 DB ' ARGUMENT ERROR 4D454E5420 4552524F52 04C5 21 DB ENDSTR 04C4 2054494D45 DB ' TIMEOUT' 4F5554 04CE £1 DB ENDSTR 04CF 204F544552 DB ' OVERFLOW' 444C4F57 04D8 21 DS ENOSTR 06D9 204F50454E DB ' OPEN ERROR' page 53 204SS2524F 52 06E4 21 OB ENDSTR 04ES 20554E4954 OB ' UNIT NOT ACTIVE' 204E4F5420 4143544956 45 04F5 21 OB ENDSTR 06F4 20434F4ES4 OB ' CONTROLLER ALONE 524F4C4C45 5220414C4F 4E45 0707 21 OB ENDSTR 0708 2048415244 DB ' HARDWARE ERROR' 5741524520 45S2524F52 0717 21 DB ENDSTR 0718 2044414C53 08 ' FALSE INTERRUPT' 4520494E54 4552525550 54 0728 21 ERRTB2: DB ENDSTR 072? 204552524F DB ' ERROR 01' 52203031 0732 21 DB ENDSTR 0733 204552524F DB ' ERROR 02' 52203032 073C 21 DB ENDSTR 073D 2045S2524F DB ' ERROR 03' 52203033 0744 21 DB ENDSTR 0747 204552524F DB • ' ERROR 04' 52203034 0750 21 DB ENDSTR 0751 204552524F DB ' ERROR 05' 52203035 075A 21 DB ENDSTR 075B 204552524F DB ' ERROR 04' 52203034 0744 21 DB ENDSTR 0745 204552524F DB ' ERROR 07' 52203037 074E 21 DB ENDSTR 074F 204552524F DB ' ERROR 08' 52203038 0778 21 DB ENDSTR 077? 204552524F DB ' ERROR 0?' 5220303? 0782 21 DB ENDSTR ERROR INTERRUPT HANDLING ROUTINES REGISTERS USED: E ' FALSE INTERRUPT 07E0 ORG 07E0H 07E0 1E09 ERR_09: LD E,0?H ; ERROR CODE 0? 07E2 C3S004 JP ERROR ; MAIN ERROR HANDLER page 54 1 1 1 8 LEVEL INTERRUPT ADDRESS TABLE 1 t 07F0 ORG 07FOH 07F0 E007 INTTABi DU ERR-09 t LEVEL 0 07F2 E007 DU ERR.09 07F4 E007 DU ERR-09 07FA E007 DU ERR-09 07F8 E007 DU ERR-09 07FA E007 DU ERR-09 07FC 8A04 DU CNTINT i LEVEL GPIB DRIVER FOR TMS9914 MAPPED AT 7400H-7407H DEFINITIONS TMS9914 REGISTER ADDRESSES 7400 INTR60: EQU 7400H INTERRUPT REGISTER 0 7401 INTRG1: EQU 7401H INTERRUPT REGISTER 1 7402 STATUS: EQU 7402H ADDRESS STATUS 7403 AUXCMD: EQU 7403H CHIP COMMAND REG (WRITE) 7403 CLSTAT: EQU 7403H CONTROL LINE STATUS (READ) 7404 BUSADR: EQU 7404H CHIP GPIB ADDRESS 7405 SERPOL! EQU 7405H SERIAL POLL REG 7404 PARPOL: EQU 740 éH PARALLEL POLL 7407 DATA: EQU 7407H DATA REG ; OTHER REGISTER ADDRESSES 7402 INTVCT: EQU 7402H i INTERRUPT VECTOR REG i TMS9914 COMMANC S OOOC TCA: EQU OCH ; TAKE CONTROL 0089 LON: EQU 89H ! ACTIVATE LISTENER 0009 LOFF: EQU 09H : DISABLE LISTENER 008A TON: EQU 8AH i ACTIVATE TALKER 000A TOFF: EQU OAH DISABLE TALKER OOSO RESET: EQU 80H MASTER RESET 0000 ENABLE EQU 00H MASTER ENABLE OOOB GTS: EQU OBH STANDBY 0090 SETREN EQU ?OH REN ACTIVE 0010 CLRREN EQU 10H REN PASSIVE 008F SETIFC EQU 8FH IFC ACTIVE 000F CLRIFC EQU OFH IFC PASSIVE 0002 SETRFD EQU 02H RELEASE HOLDOFF ON NRFD j TMS9914 INTERRUPT MASKS 0200 ENAMSK EQU 0200H SRQ ENABLE MASK 0000 DISMSK EQU 0000H SRQ DISABLE MASK • GPIB COMMANDS 003F UNL EQU 3FH UNLISTEN 005F UNT EQU 5FH UNTALK 0018 SPE EQU 18H SERIAL POLL ENABLE 0019 SPD EQU 19H : SERIAL POLL DISABLE page 55 INITIALIZATION ROUTINE, INTERRUPT VECTOR ENTERED IN C REO REGISTERS USEOt AF, C, OE, HL INITIALIZE TMS9914 7000 ORG 7000H 7000 210474 INIT: LD HL.BUSADR ; ADDRESS REGISTER 7003 7E LD A,(HL) ; READ ADDR SWITCH 7004 77 LD BUS ROUTINES GPIB TRANSMIT ROUTINE REGISTERS USED: AF, C, DE, HL TRANSMIT DATA, ENTERED IN E REG, DATA/COMMAND.FLAG ENTERED IN BIT 0 OF D REG 701E £10374 SEND: LD HL.AUXCMD i SET REG POINTER 7021 3A0074 LD A.(INTRGO) ; CLEAR INTERRUPT STATUS REG 7024 CB42 BIT 0,D ; TEST DATA/COMMAND 7024 280E JR 2,ATN ; IF COMMAND 7028 7B OUT: LD A,E 7029 320774 LD (DATA),A ; TRANSMIT 702C 3A0074 HOLD1: LD A, page 56 704C CB73 BIT i,E ; CHECK FOR UNT OR OTA 704E 2010 JR N2.UNTALK t MATCH 70S0 18D6 JR OUT 7053 3602 LISTi LO GPIB RECEIVE ROUTINE REGISTERS USED: AF, DE, HL RECEIVE DATA, RETURNED IN HL REG, TIMEOUT ENTERED IN DE REG 7064 3A0074 RECVE: LD A, GPIB SERIAL POLL ROUTINE REGISTERS USED: AF, BC, DE, HL SERIAL POLL ROUTINE, START ADDRESS ENTERED IN E REG, MULTIPLE/SINGLE FLAG ENTERED IN BIT 1 OF D REG, STATUS DATA RETURNED IN L REG, ADDRESS DATA IN H REG 70 S2 43 SPOLL: LD B,E SAVE INSTRUMENT ADDRESS 708?! 1E5F LD E,UNT UNTALK COMMAND 7085 CD1E70 CALL SEND SEND UNT 7088 1E1S LD E.SPE SPE COMMAND 70 8A CD1E70 CALL SEND SEND SPE 708D 3689 LD page 57 709A 2805 JR 2,UFAIL (UNIT RESPONSE FAILED 709C 3A0774 LD A, (DATA) I BET STATUS BYTE 709F 1802 JR UEXIT 70A1 3E00 UFAIL: LD A.OOH ! STATUS BYTE ZERO 70A3 47 UEXIT: LD B,A i SAVE STATUS 70A4 CB70 8IT 6,B j TEST RSV 70AA 200C JR NZ,PEXIT EXIT POLL ON RSV 70A8 7B LD A,E 70A9 FESE CP SEH • CHECK FOR LAST UNIT 70AB 2807 JR 2,PEXIT ; EXIT POLL ON LAST UNIT 70AD CB4A BIT 1,D TEST MULTIPLE/SINGLE 70AF 2SQi JR 2,PEXIT EXIT POLL ON SINGLE UNIT 70B1 I" INC E NEXT UNIT ADDR 70B2 18DE JR TAD POLL NEXT UNIT 70B4 CBB3 PEXIT: RES 6,E RESET TAG BIT 7086 D5 PUSH DE SAVE INSTRUMENT ADDRESS 70B7 3609 LD (HD.LOFF CONTROLLER UNL 70B9 1E5F LD E.UNT UNT COMMAND 70BB CD1E70 CALL SEND SEND UNT 70BE 1E19 LD E.SPD SPD COMMAND 70C0 CD1E70 CALL SEND SEND SPD 70C3 68 LD L,B MOVE DATA TO RETURN REG 70C4 Dl POP DE RESTORE ADDRESS 70C5 63 LD H,E ADDRESS TO RETURN REG 70C6 C9 RET TMS9914 CONFIGURE & STATUS READ ROUTINES CONTROLLER SRQ INTERRUPT ENABLE/DISABLE ROUTINES REGISTERS USED: AF, C, DE, HL SRQ ENABLE/DISABLE, INTERRUPT VECTOR ENTERED IN C REG 70C7 110002 SRQENA: LD DE,ENAMSK GET ENABLE MASK 70CA CDEC70 CALL INTCNF ENABLE 70CD CDDC70 CALL STATRD READ GPIB STATUS 70D0 CB55 BIT £,L TEST UNDETECTED SRQ 70D2 2036 JR NZ,SUI POSITIVE 70D4 C? RET 70D5 110000 SRQDIS: LD DE,DISMSK GET DISABLE MASK 70D8 CDEC70 CALL INTCNF DISABLE 70DB C9 RET STATUS READ ROUTINES REGISTERS USED: AF, HL STATUS READ, TMS9914 ADDRESS STATUS RETURNED IN H REG, BUS CONTROL LINE STATUS IN L REG 70DC 3A0274 STATRD: LD A,(STATUS) ; ADDRESS STATUS 70DF 67 LD H,A 70E0 3A0374 LD A, page 58 I TMS 9914 INTERRUPT STATUS READ, RETURNED IN HL REG i 70E5 2A0074 INTRD: LD HL.UNTRGO) ; GET STATUS 70E8 82F4I7 LD TMS9914 INTERRUPT CONFIGURE ROUTINE REGISTERS USED: AF, C, DE, HL SET INTERRUPT MASK, ENTERED IN DE REG, SET VECTOR, ENTFRED IN C REG, STATUS RETURNED IN HL REG 70EC 79 INTCNF: LD A,C GET VECTOR 70ED 320274 LD (INTVCT) ,A LOAD VECTOR 70F0 CBF2 SET 4,D ALWAYS INT ON SH ERRO 70F2 ED530074 LD (INTRGO) ,DE MASK 0 & 1 70F4 CDE570 CALL INTRD READ INTERRUPT STATUS 70F9 7B LD A,E MASK 0 70 FA A5 AND L TEST STATUS 70FB 200D JR NZ.Sldl INTERRUPT 70FD 7A LD A,D MASK 1 70FE A4 AND H TEST STATUS 70FF £009 JR NZ,SWI INTERRUPT 7101 FB EI ENABLE CPU INTERRUPT 7102 C9 RET UTILITY ROUTINES DELAY, LENGTH ENTERED IN DE REG REGISTERS USED: AF, DE 7103 IB DELAY: DEC DE 7104 AF XOR A 7105 B3 OR E 7104 B2 OR D 7107 20FA JR NZ,DELAY 7109 C9 RET SOFTWARE INTERRUPT, VECTOR ENTERED IN C REG REGISTERS USED: A, C, DE, HL, I 71OA 6? SWI: LD L,C ; GET VECTOR LOW 71 OB EDS7 LD A,I j GET VECTOR HIGH 710D 47 LD H,A 710E SE LD E, page 5? Svmbol Tabl«: start=24FA tnd»347B ATN 7034 AUXCMD 7403 BACKSP 00A2 BAUD OOEE BAUDGN OOFD BINCON 02C0 BITZR 03FB BLANK 0141 BS 0008 BUFFER 1740 8USADR 7404 CHROUT 0294 CHRTRN OOFB CLRIFC OOOF CLRREN 0010 CLSTAT 7403 CMD 0240 CNTINT 048A CNTLEV 0004 CODERR 048E CONFIG OOCE CONU 02CE CR 000D CRLF 00B9 CTOPEN 17F2 DATA 7407 DATEND 000D DELAY 7103 DEND 0029 DISMSK 0000 DISP1 0004 DISP2 000A DISP3 0012 DRCHK 0021 DSEP 002C DSTART 0038 ENABLE 0000 ENAMSK 0200 ENDST 026B ENDSTR 0021 ENDTAB 0021 ERR 014F ERRMES 0498 ERROR 0680 ERRTB1 06A7 ERRTB2 0728 ERR_01 029C ERR..02 02A1 ERR-04 02A4 ERR_07 04BE ERR-08 03B3 ERR-09 07E0 ESC 0018 ESCTST 002A EXEC 0200 FETCH 0180 FIXLEN 00F2 FLTLEN 00E8 FPBLK 17F0 FPINIT 0023 6TS 000B HDIN3 004D H0LD1 702C HRDINT 049F I EC 0340 INIT 7000 INLINE 0075 INSLEN 0020 INSTR 1780 INTCNF 70EC INTEG 0025 INTERP 0120 INTRD 70E5 INTRET 04BS INTRGO 7400 INTRS1 7401 INTSRC 04A2 INTTAB 07F0 INTTBH 0007 INTVCT 7402 IOSW 17F4 ISTREG 17F4 JOIN1 0028 J0IN2 003B JPTAB 0210 LABCH 0278 LABEL 02AB LABKEY 0043 LF 000A LIST 7052 LOFF 0009 LON 0089 MAIN 01C0 MATCH 0144 MIRBUF 1780 MIRMCV 01A3 NEXTBT 025F NEXTCH 0245 NEXTDC 027F NEXTD6 0£06 NEXTIN 0125 NEXTRC 034F NOPRT 0190 NORSV 040D NUL 0000 NUM 02F1 NXTBIT 03F3 NXTPAR 007C NXTSER 008B OPCHK 030F OPEN 03A0 OUT 7028 OUTBUF 1740 OUTSTR 00E4 PARCNT 7701 PARDAT 7700 PARPOL 7404 PARREC 00C9 PARTRN 0103 PEXIT 70B4 PGLTCH OOFC PRT 01AC QUIT 0470 RCENA 0014 RCNRDY OODB READY 707B RECVE 7064 REENT 0245 RESET 0080 RSVIND 0026 S 0450 Sa 046E SEARCH 0691 SEND 70 IE SERCNT OOFF SERDAT OOFE SERIN OOSA SERMSS 042D SERPOL 7405 SERREC 00D7 SERRES 0040 SERTRN 0112 SETIFC 008F SETREN 0090 SETRFD 0002 SEXIT 041C Sm 0477 SOUT 03EB SPACE 0020 SPD 0019 SPE 0018 SPOLL 7082 SRQDIS 70D5 SRQENA 70C7 SRQIND 002A SRQSRV 03DO STACK 173F STAT R D 70DC STATUS 7402 STRLIM 0022 STRMQV 0442 SW 002C SUI 71 OA SWIRET 7117 SWITCH 0273 S_ALL 03DO T 0380 TABLE 0154 TABSEP 002C TAD 709S TALK 705C TCA OOOC TEST 012D TMOUT 17F0 TOFF 000A TON 008A TRENA 0033 TRNROY Olid UEXIT 70A3 UFAR 70A1 UNL 003F UNLIST 7058 UNT OOSF UNTALK 7040 UALCH 0291 UALID 014B VCTGET 0480 XI0 0302 XEND 030E CROSS REFERENCE ATN 7026 37036 AUXCMD = 7403 7005 701E BACKSP 0090 300A2 1 BAUD =00EE 0017 BAUDGN =00FD 0019 BINCON 0280 302C0 02C4 0343 BITZR 03F5 303F8 BLANK 0134 0138 30141 BS =0008 OOSE 00A4 O0B0 BUFFER = 1740 0190 019D BUSADR = 7404 7000 7038 CHROUT 0244 0285 30294 CHRTRN 0097 00A8 OOAD 00B2 OOBB OOCO 00C5 OOEC 00F3 300FB CLRIFC =000F 7019 CLRREN =0010 CLSTAT =7403 70E0 CMD 0210 30240 CNTINT 3048A 0491 07FC CNTLEV =0004 044E 0477 CODERR 0687 3068E CONFIS =00CE 001B CONV 02C8 302CE CR =000D 0080 0087 0093 009E 00B9 CRLF 003B 0044 0095 00A0 300B9 0364 0429 069E CTOPEN = 17F2 030F 03AF' DATA =7407 7029 707B 709C DATEND =000D 0291 DELAY 7016 37103 7107 DEND =0029 02EC DISMSK = 0000 70D5 DISP1 03ED =0004 DISP2 03F7 =000A DISP3 0409 0414 041C =0012 DRCHK =0021 03A3 DSEP 028A =002C 02CA 02E9 DSTART -0023 02C4 ENABLE =0000 700F ENAMSK =0200 70C7 ENDST 0243 3Q24B ENDSTR 0074 =0021 00E9 01B1 041C 0441 0443 0685 04A7 04B5 06C5 06CE 04D8 04E4 06F5 0707 0717 0728 0732 073C 0744 0750 075A 0744 076E 0778 0782 ENDTAB =0021 0124 017D 02B0 ERR 0128 3014F ERRMES 30498 ERROR 0151 029E 02A3 02A3 0317 03B5 04C3 30480 07E2 7078 ERRTB1 0489 304A7 ERRTB2 068E 30728 ERR-01 0293 3029C 02CC 02EE ERR-02 302A1 02D4 0348 ERR-04 302A4 02D9 02E1 ERR-07 04A4 304BE page 41 ERR-08 03A5 303B3 ERR-09 307ED 07F0 07F2 07F4 07F<4 07F8 07FA 07FE ESC -00 IB 0030 ESCTST 3002A 00C9 0103 EXEC 0IC6 30200 FETCH 301 SO 019B 01C0 FIXLEN 00E6 300F2 00F8 FLTLEN 300E8 OOFO FPBLK = 17F0 001F FPINIT 30023 0025 6TS =000B 7033 HDING 003B 30040 H0LD1 3702C 7031 HRDINT 0498 3049F I EC 0212 30340 INIT 03A0 03AA 37000 INLINE 30075 0196 INSLEN =0020 0193 INSTR = 1780 012A INTCNF 70CA 70D8 370EC INTE6 =00£S 02F7 INTERP 30120 01C3 INTRD 049F 370E5 70F6 INTRET 304BB 04BE INTR60 = 7400 7021 702C 70.54 7095 70E5 70F2 INTRG1 =7401 INTSRC 049D 304A2 INTTAB 0480 307F0 INTTSH =0007 0003 INTUCT = 7402 70ED IOSU = 17F6 0035 0075 OOFC 0180 0é71 0680 ISTREG = 17F4 049A 70E8 JOIN! =002B 024B JOINS =003B 024F JPTAB 0207 30210 LABCH 0259 30278 LABEL 0278 302AB LABKEY =0043 0257 LF =00 OA OOBE LIST 703F 37052 LOFF =0009 7058 70B7 LON =0089 7054 708D MAIN 0027 004A 30 ICO 01C9 04B8 06A4 MATCH 0130 30144 MIRBUF = 1780 01AO MIRMOU 301A3 01A9 NEXTBT 302SF 0269 NEXTCH 30245 0249 024D 0251 026E 0276 028F NEXTDC 3027F 023C NEXTDG 30206 02E7 NEXTIN 30125 013F NEXTRC 3034F 035D NOPRT 0185 30190 NORSV 0407 3040D NUL =0000 00C3 NUM 02D1 02E4 302F1 02F5 02F9 NXTBIT 303F3 03FF NXTPAR 3007C 0085 NXTSER 3008B 009C 00A4 00B7 OPCHK 0240 30 30 F 0340 03DO 0450 OPEN 0220 303A0 OUT 37028 7050 7056 705A 70SE 7062 page 62 0UT8UF '1760 034B 03SF 0303 03E3 0401 0420 04S4 0467 OUTSTR 0041 300E4 018D 0363 0424 0698 PARCNT =7701 OOCC 0104 PARDAT =7700 0003 01OE PARPOl =7404 PARREC 007C 300C9 OODl PARTRN 30103 010B PEXIT 70A4 70AB 70AF 370B4 PGLTCH =00FC 000B PRT 0187 301 AC QUIT 0224 30470 RCENA =0016 002A 00D7 RCNRDY 300DB OODF READY 704? 3707B RECVE 0355 37044 704E 7074 REENT 30265 0271 RESET =0080 7008 RSVIND 040? =0024 S 021A 30450 Sa 0216 3044E 04A? 04B5 SEARCH 068C 30491 04?3 04?6 SEND 02?7 370 IE 7085 708A 7092 70BB 70C0 SERCNT =00FF OOOD OOOF con 0015 001D 002C 00D9 OODB 0114 0116 SERDAT =00FE 002E 00E1 011D SERIN 007A 3008A SERMSS 03D6 3042D 0457 SERPOL =7405 SERREC 0088 300D7 SERRES =0040 0013 SERTRN 0101 30112 SETIFC = 008F 7011 SETREN =0090 7018 SETRFD =0002 7052 SEXIT 03E9 0414 3041C Sm 0218 30477 SOUT =03EB 044B SPACE =0020 OOAB SPD =001? 70BE SPE =0018 7088 SPOLL 03E0 0444 37082 SRQDIS 047C 700B 370DS SRQENA 0473 370C7 SRQIND 0414 =002A SRQSRY =03D0 04A4 STACK = 173F 0007 0047 04B2 04A1 STATRD 040F 70CD 370DC STATUS = 7402 70DC STRUM =0022 025B 0261 024C STRMCW 03D? 30442 0448 045A SW =002C 0253 SWI 70D2 70FB 70FF 371OA SWIRET 7112 37117 SWITCH 0255 30273 S_ALL 0214 303D0 03D0 T 021C 30380 TABLE 0122 30154 TABSEP =002C 013A 0145 0157 015C 015F 0142 0145 0147 016? 016C 0171 0177 017C 02AF TAD TALK page 63 TCA «oooc 7034 TEST Sul 2D 0142 0149 027C TMOUT -I7F0 0351 0384 TOFF «OOOA 7060 TON -008A 705C TRENA =0033 0112 TRNRDY 30114 011A UEXIT 709F 370A3 UFAIL 709A 370 A1 UNL =>003F 7041 UNLIST 7044 37058 UNT =005F 7083 70B9 UNTALK 704E 37040 YALCH 025D 30291 VALID 0147 3014B 021E 0222 VCTGET 03A7 0470 0479 30480 X10 02D4 30302 XEND 0305 0308 030B 3030E page 44 A. 15. MS-DOS Deuice Driuer -for GPIB Controller. Microsoft MACRO Assenbltr Version 3.00 22-04-87 HMM MS-DOS DEVICE DRIVER FOR 6P18 mill 0000 GPIB-SEG SEGMENT ASSU1E CS:GPIBLSE6,DS:6P1B.SEG 0000 ORG 00H ; DEVICE HEADER 0000 FF FF FF FF 00 OFFFFFFFFH ! PRE-1N1T «HOER LABEL 0004 8000 DU 8000H i CrBRACTER DEVICE 0006 0070 R DU STR.ENT i STRATEGY ENTRY 0008 007B R DU INT.ENT ! INTERRUPT ENTRY OO0A 47 50 49 42 £0 20 DB "6PIB ' i DEVICE NAME SO 20 0012 PASS-ESBX LABEL OUORD ; ES;BX PASS LOCATION 0012 PASS-BX LABEL MORD i BX PASS LOCATION 0012 ???? DU ) 0014 PASS-ES LABEL UORD ! K PASS LOCATION 0014 ???? DU ? 0020 ORG 20H VECTOR 4 MAILBOX ADDRESSES 0020 TINER.ENTRY LABEL DUORD TIMER TICK VECTOR STORE 0020 vmvm DD ? 0024 IEN.FLAG LABEL BYTE INTERRUPT ENABLED/DISABLED 0024 ?? DB ? 0030 ORG 3CH ! FtHCTION JUMP TABLE 0030 00CD R FUNCTION-TAB : CU DEV-INIT 0032 00B9 R DU DONE 0034 0OB9 R DU DONE 0036 00A9 R DU ERR-03 0038 0177 R DU STR-INP 003A 01AF R DU NDEST.INP 003C 01C7 R DU INP.STAT 003E OiDi 1! DU INP.FLUSH 0040 01F5 R DU STOOTP 0042 01F5 R DU STOUTP 0044 0230 R DU 0UTP.STAT 0046 00B9 R DU DONE 0050 ORG 50H ; PORT ADDRESS TABLE 0050 A.DATA LABEL UORD 0050 03E0 DU D3E0H ! PIO A DATA PORT 0052 A.C0NT LABEL UORD 0052 03E1 DU 03E1H i PIO A CONTROL PORT 0054 8-DATA LABEL UORD 0054 03E2 DU 03E2H i PIO B DATA PORT 0056 8-CONT LABEL UORD 0056 03E3 DU 03E3H i PIO B CONTROL PORT = 0000 VECT-SEG ÉOU OOOOH INTERRUPT VECTOR SEGMENT = 0020 VECT-0FFS EQU D0AH<4 IRD2 page 65 ****** DEVICE DRIVER miN NOT ****** 0070 0R6 7CH 0070 STR.WT PROC FAR i STRATEGY ENTRY POINT 0070 2E: S? IE 0012 R nov CSJIMSSLBXJ.BX 0075 2E: 8C Oo 9014 R HOV CS:[PASS.ES),ES 007A CB RET 0S7S STR.ENT ENDP 0078 INT.ENT PROC FAR i INTERRUPT ENTRY POINT 007B 50 PUSK AX 007C S3 PUSH ex 007D 51 PUSH CX 007E 52 PUSH DX 007F Si PUSH SI 0080 57 PUSH Dl ! NOTE 1) 0081 55 PUSH BP 0082 IE PUSH OS «083 06 PUSH ES 0084 2E: C5 IE 0012 R LOS 3X,CS:tPftSS_ESBXl ; 3RH POINTER 0087 BA 47 02 MOV AL,[BX*02H1 ; COMMAND CODE 008C BB 4F 12 MOV CX,[BX*12H1 i BYTE COUNTER (R-4J) 008F 98 CBU 0090 BE 0030 R MOV SI .OFFSET FUNCTION-TAB ! START OF COMMAND TABLE 0093 03 FO ADD Sl,AX 0095 03 FO ADD Sl,AX i CALCULATE DISPLACEMENT 0097 3C 08 CMP AL,OBH 0099 77 OE JA ERR.03 j COttNAND NUMBER TOO HIGH 009B C4 7F OE LES D1,IBX*0EH] ! TRANSFER BLOCK ADDR page ii 1 HHH POIPNEIML INITIALIZE mm 1 IOCS 88 16 OOS6 R OEV-1NIT: HOV OMLCONTl nn N FF NOV AL.OFFH 1 PIO t CONTROL HOK 1003 EE OUT KA •OM BO OF NOV M.,0FH t HASK, 4 HSB OUT, 4 LS8 IN •006 EE OUT DX,AL 0007 OB 0000 NOV BX.VECT.SE6 i VECTOR SEGrøff OOOA OE DB NOV DS,BX 00OC BB 0028 NOV BX.VECT-OFFS ! VECTOR OFFSET OODF C7 07 0127 R HOV UORD PTR (BX),OFFSET IHT ; VECTOR LOU ORDER 00E3 8C 4F 02 NOV (BX«02K),CS ; VECTOR HIGH ORDER 00E6 IB 01J4 R CALL INT.1HIT ; WIT INTERRUPT 00E9 2E: CS IE 0012 R LOS BX,CS:tPASS-ESBX) OOEE C7 47 OE 0264 R HOV UORD PTR CBX+0EH1.OFFSET END.0RV«0IK 00F3 8C 4F 10 NOV (BX*10H],CS ; RETURN ENO AODR 00F6 FA CLJ 00F7 FC CLD j SI 4 W MINT UP 00F8 BB 0000 NOV BX,VECT.SES j VECTOR SEGMENT OOFB 8E DB NOV DS.BX OOFD BE 0070 HOV SI.VECT.TINE ; VECTOR OFFSET 0100 BF 0020 R NOV DI,OFFSET T1HER.ENTRY ; VECTOR STORE LOCATION 0103 OE PUSH CS 01C4 07 POP ES i CURRENT CS t ES 0105 A5 NOVSU 0106 AS NOVSU 1 HOVE VECTOR 0107 BB 0070 HOV BX.VECT-TIHE • VECTOR OFFSET 010A C7 07 01SO R NOV UORD PTR [BX],OFFSET T1NE.1NT VECTOR LOU ORDER 010E 8C 4F 02 HOV [BX«02HI,CS VECTOR H1SH ORDER Olli F3 STI 0112 EB AS JMP SHORT DONE 0114 2E: 8B 16 0056 R INT.INIT: NOV DX,CS:t6-C0NT] ENABLE INTERRUPT ROUTINE 0119 BO B7 HOV AL.0B7H PIO ENABLE UORD 011B EE OUT DX,AL 011C BO FD HOV AL,0FDH HASK, BIT 1, FIFO EF OHE EE OUT DX,AL 011F BA 0021 NASK.LOAD: HOV DX,INT.C0NT1 0122 EC IN AL,DX GET CURRENT NASK 0123 24 FB AND AL,IRILMSK 8259 IRQ ENABLE 0125 EE OUT DX,AL 0126 C3 RET • »«m mm INTERRUPT H4VDLER (NON-STAVCARD) »»»**» 0127 FB INT: STI ENABLE FURTKER INTERRUPTS 0128 50 PUSH AX 0129 52 PUSH DX 012A BO 01 HOV AL,01H DISABLED FLAG 012C 2E: 28 06 0024 R SUB CS:fIEN-FLAGJ,AL' TEST ENABLED 0131 75 05 JNZ INT-DISA IF ENABLED 0133 £8 0114 R CALL INT.INIT INIT INTERRUPT 0136 EB OF JHP SHORT INT-EXIT 0138 2E: A2 0024 R INT.OISA: HOV CS:nEN_FLABI,AL SET INTERRUPT DI 013C 2E: 8B 16 0056 R HOV DX,CS:tB-CONT] 0141 BO 03 HOV AL,03H PIO DISABLE UORD page 67 0143 EE our DXA 1144 EB 023F R ML IHT.SERV i EXTERN* SERVICE 0147 M 0020 IKT.EXIT: NOV OX.INT.CONTO i END OF INTERRUPT 014A BO 80 MOV «..CONT.F.O; i 825? EOI 0I4C EE OUT OX.AL 014D 5A POP OX 014E SB POP AX OMF CF IRET OISO SO TINE-INT: PUSH AX 01SI 55 PUSH DX 01S2 ?C PUSHF 0153 2E: 8B 14 0056 R NOU DX,CS:tB-COHTl 0IS8 BO FF HOV AL.OFFH i PIO B CONTROL NODE 015A EE oirr DX,AL 01SB BO OF HOV AL.OFH i MASK, 4 NSB OUT, 4 LSB IN 015D EE OUT DX.AL 01SE 2E: 8B 14 0054 R NOU DX.CSstB-DATAJ 0143 EC IN AL.DX 0144 AB 70 TEST AL.70H TEST PIO PRESENT 0144 75 07 JNZ TIME-EXIT NEGATIVE 0148 A8 02 TEST AL.02H TEST DATA READY 0I4A 74 03 JZ TINE-EXIT NEGATIVE 016C E8 023F R CALL INT.SERV SOFTUARE INTERRUPT 0I4F 90 TIME-EXIT: POPF 0170 5A POP OX 0171 58 POP AX 0172 2E: FF 2E 0020 R JHP CSilTIHEILENTRY] ! EXIT TIKER PATCH ; mm INPUT STRING ROUTINE »»**» 0177 E3 OB STRJNP: JCXZ INP-EXIT ; IF COUNTDOWN 017? 51 NEXT-INP: PUSH ex 017A E8 0192 R CALL BYTE-INP i INPUT SINGLE BYTE 017O 59 POP ex 017E AA STOSB i BUFFER DATA 017F ES F8 LOOP NEXT.INP ! MORE DATA 0181 E9 O0FJ9 R INP.EXIT: JHP DONE 0184 2Ei C5 IE 0012 R INP.NROY! LOS BX,CS:fft»SS_ESBXJ ; SRH POINTER 0189 29 4F 12 SUB [BX*12HI,CX j RETURN BYTE COUNT 018C E9 00A2 R JHP ERR-02 j NO DATA RETURN 018F E9 OOAE R 1NP.NODEU: JHP ERR-01 ; NO PIO RETURN 0192 88 14 0052 R BYTEJNP: HOU DX,tA-C0NT] ; INPUT SINGLE BYTE 0194 BO 7F HOU AL.7FH i PIO A INPUT HODE 0198 EE OUT DX,AL 0199 8B 14 0054 R HOU DX.IB-DATAJ 0190 BO 00 HOV AL,00H ; FIFO DIRECTION 01 JF EE OUT DX,AL G1A0 EC IN AL, DX 01A1 A8 70 TEST AL.70H i TEST PIO PRESENT 01A3 75 EA JN2 INP-NODEV 01A5 A8 02 TEST AL,02H ; TEST DATA READY 01A7 74 DB J2 INP-NRDY 01A9 8B 14 0050 R HOU DX,[A-DATAJ 01AD EC IN AL, DX 1 GET BYTE OWE C3 RET page 48 1 Mtiii INPUT BYTE, NON-DESTRUCTIVE •••••• 1 01AF 88 14 0052 8 NDEST.INP: MOV DX,tA.CONTJ 01S3 BO FF HOV AL.OFFH ; PIO A CONT MM 0185 EE OUT DX.AL 0184 EE OUT DX.AL 01S7 B8 14 0050 R HOV DX,[A.OATA) 01BB EC IN AL.DX ; Or BYTE OJBC J£: C5 IE 0012 I! LDS BX,CS:[MSS-ESBX) ; SRH POINTER 01 CI 88 47 Ob NOV t8X«00H],AL ; RETURN BYTE 01C4 E9 0089 R JHP DONE turn INPUT STATUS «««»« 01C7 SB 14 0054 R INP.STATS HOV DX.tB-OATA] OICB EC IN AL,OX OICC 24 02 AND AL.02H ; TEST INPUT BUFFER EMPTY 01CE 75 03 JN2 IST.EXIT 01DO E9 0OB5 R JHP BUSY 0103 £9 008? R 1ST_£XIT: JHP BONE Hi»» INPUT FLUSH o<**« 01D4 88 14 0052 R 1NP.FLUSK: NOV DX,[A-CONT] DIM BO 7F NOV AL.7FH ; PIO A INPUT HODE 01DC EE OUT DX,AL 01DO 8B 14 0054 R MOV DX,[B-DATA1 OIE! 80 00 NOV . AL,OOH i FIFO DIRECTION 01E3 EE OUT DX.AL 01E4 8B 14 0050 R FLUSH: MOV DX,(A-DATA] 01E8 EC IN AL,DX ; DUMP DATA BYTE 01E9 8B 14 0054 R HOV DX,[B_DATA] DIED EC IN AL,DX 01EE 24 02 AND AL,D2H i TEST BUFFER EMPTY 01F0 75 F2 JN2 FLU5H i NEXT BYTE 01F2 E? 00B9 R JHP DONE »»**» OUTPUT STRING ROUTINE «"" 01F5 E3 0? STR.OUTP: JCX2 0UTP.EX1T ( IF aWKJDOJN 01F7 24: 8A 05 NEXT.OUTP: HOV AL,ES:[DII ! GET BYTE FRAM BUFFER 01FA 47 INC Dl | INCREMENT BYTE COUNT 01FB E8 0211 R CALL BYTE.OUTP i SEND SINGLE BYTE 01FE E2 F7 LOOP NEXT-OUTP i HORE DATA 0200 E9 008? R OUTP-EXIT: JMP DONE 0203 2E: CS IE 0012 R OOTP.FULLi LDS BX,CS:CPASS.ES8XJ i SRH POINTER 0208 2? 4F 12 SUB [BXtl2Hl,CX ! RETURN 8YTE COUNT 020B E9 0OA2 R JHP ERRJ2 020E E? OOAE R OUTP-NODEV: JMP EROI ! NO PIO RETURN 0211 50 BYTE-OUTP: PUSH AX ! SEND SINGLE BYTE 0212 8B 14 0052 R HOV DX.IA-CCNTJ 0214 BO 3F HOV AL.3FH ! PIO A OUTPUT 0218 EE OUT DX,AL 021? 88 14 0054 R HOV DX.tBJATA] 021D BO 80 HOV AL.80H ; FIFO DIRECTION 021F EE OUT DX,AL 0220 EC IN AL, DX page 49 1221 A8 70 TEST AL.70K i TEST PIO PRESENT 0223 75 E9 JNZ OUTPJfflOEV 0225 A8 04 TEST AL.04H i TEST OUTPUT BUFFER FULL 0227 74 M JZ OUTP.FULL 0227 88 li 0050 R HOV DX.I/LDATAJ 0220 58 POP AX i RESTORE DATA 022E EE OUT DX.AL i SEND BYTE 022F C3 RET I MMH OUTPUT STATUS «««« 0230 08 16 0054 R OUTP.STAT: NOV OX,IB-DATA) 0234 EC IN AL.DX 0235 24 08 AND AL.OSH ! TEST OUTPUT BUFFER EMPTY 0237 74 03 11 0ST.EXJT 023? E9 0085 R JNP BUSY 023C E? DOB? R OST.EX1T: JNP DONE M»M INTERRUPT EXTERNAL COMMUNICATIONS «*»«« = 0024 KEYB-OFFS EQU 009H»4 ! KEYBOARD VECTOR OFFSET = 7200 BASI.0FFS EQU 7200H ; BASIC INTERP. KEYBOARD = OE90 BASI.OS EQU OE90H : BASIC DS DISPLACEMENT = 0800 BASLINT EQU 0B00H ! INTERRUPT MAILBOX = 0802 BASJ.STR6 EQU 0B02H ; STRIG FUNCTION MAILBOX 023F S3 INT.SERV: PUSH BX 0240 IE PUSH DS 0241 88 0000 MOV BX.VECT.SEG ; VECTOR SEGMENT 0244 8E DB MOV os, ax 0844 BB 0024 MOV BX,KEYB-OFFS : KEYBOARD VECTOR OFFSET 0249 81 3F 7200 CNP UORD PTR tBXJ.BASLOFFS D24D 75 12 JNZ SERV-EXIT ! NOT BASIC INTERPRETER 024F 8B 47 02 MOV AX,[0X*02H1 ; VECTOR HIGH ORDER 0252 05 0E90 ADD AX,BAS1J)S : CALCULATE DS VALUE 0255 8E DB MOV DS,AX 0257 80 OE 0802 10 OR BYTE PTR [BAS1-STRG1,I0H 025C 80 OE 0800 01 OR BYTE PTR [BASUNT],OIH ! SET MAILBOX FLAGS om IF SERV-EXIT: POP DS 0262 5B POP BX 0243 C3 END-DRV: RET 0244 GPI8.SEG ENDS END page 70 Microsoft MACRO Aiswblir Version 3.00 • Symbols List 23-04-87 S*g»nts and Groups: Nine Si» Align Ctnbine Class 6P1B-SEG 02M PARA NONE Synbolss Nil! Type Value Attr A.C0NT L UORD 0052 GPIB-SEG A.MTA L HORD 0050 6PIBLSEG BAS1.DS Nunber 0E90 BA5UNT Nunber OS0O BASLQFFS Nunber 7200 8ASLSTRG Nunber 8882 BUSY L NEAR 0085 GPIB-SEG BYTE.INP L NEAR 0l?2 GPIB-SEG BYTE-0UTP L NEAR 0211 GPIB-SEG B-C0NT L U0RD 0055 GPIB-SEG B-DATA L UORD 0054 GPIB-SEG CONT.EOI Number 0020 DEV.JNJT L NEAR 00CD GPIB-SEG DONE L NEAR 00B? GPIB-SEG BID.DRV L NEAR 0243 GP1B.SEG ERRJ1 L NEAR 00AE GPIB-SEG ERR.02 L NEAR 08A2 GPIB-SEG ERR.03 L NEAR 00A? GPIB-SEG KIT L NEAR OOBB GPIB-SEG FLUSH L NEAR 01E4 GPIB-SEG FUNCTION-TAB L NEAR 0030 GPIB-SEG 1EH.FLAG L BYTE 0024 GPIB-SEG INP.EX1T L NEAR 0181 GPIB-SEG INP-FLUSH L NEAR 0ID4 GPIB-SEG 1NP.N0DEV L NEAR 018F GPIB-SEG INP.NRDY L NEAR 0184 GPIB-SEG INP-STAT L NEAR 01C7 GPIB.SEG INT L NEAR 012? GPIB-SEG INT.CONTO Number 0020 INT.C0NT1 Niinber 0021 INT-DISA L NEAR 0138 GPIB-SEG INT-ENT F PROC 007B GPIB-SEG Length = 0052 INT-EXIT L NEAR 0147 GPIB-SEG INT.INIT L NEAR 0114 GPIB-SEG INT.SERV L NEAR 023F GPIB-SEG IRQJttSK Nonber OOFB IST.EXIT L NEAR 01D3 GPIB-SEG KEffl-OFFS Nunber 0024 rttSK-LOAfl L NEAR 011F GPIB-SEG NDEST.INP L NEAR 01AF GPIB-SEG NEXT-INP L NEAR 017? GPIB-SEG rfEXT-OUTP L NEAR 01F7 GPIB-SEG OST.EX1T L NEAR 023C GPIB-SEG OUTP-EXIT L NEAR 0200 GPIB-SEG DUTP.FULL L NEAR 0203 GPIB-SEG OUTP-NODEV L NEAR 020E GPIB-SEG OUTP.STAT L NEAR 0230 GPIB-SEG PASS-BX L UORD 0012 GPIB-SEG page 71 PASS.ES L UORD 0014 6PIBLSE6 PASS-ESBX L WORD 001! 6PIB.SE6 SERU-EX1T L NEAR 0241 6PIB.SEG STR.ENT F PR0C 0070 BPIB.SEG Length < 0008 STR.1NP L NEAR 0177 6PIB.SE6 STR.0UTP L NEAR 01F5 GPIELSEG TIMER-ENTRY L DWORD 0030 6PIB-SE6 TIME-EXIT L NEAR 016F GPIB.SEG T1MEJNT L NEAR 0150 GPIBLSEG VECUFFS Number 0028 VECT.SEG Number 0000 UECT-TINE Number 0070 48824 Bytes free I) The instructions PUSH DI and POP DI are required according to the standards set for MS-DOS (PC-DOS) device drivers. However, bugs inD0Sversions2.10and2.ll (possibly other early versions as uell) lead to the requirement that OI must be returned «ith its end value. Consequently, with these versions of the operating system, PUSH DI and POP Dl should not be done at this point. The two instructions may then be replaced by NOPs. Uith the MS-DOS version 3.20, they must be present as given in this listing. page 72 1> (SENT AND RECEIVED WITH ATN=1) 0 i 1 MSG' °0 MSG "i MSG MSG MSG 0 MSG MSG MSG °0 1 \ 0 1 0 1 BT^s 0 bi b, 0 1 2 3 4 5 6 1 1 1 1 >0 ^ i 0 0 0 0 NUL DLE SP 0 ., m , P c~ '1 0 D 1 1 SOrt GTL DC1 LLO j 1 A Q 0 0 0 0 STX OC2 2 B R b I 0 0 1 ETX DC3 J> 3 C S c o § 1 a 1 0 EOT SDC DC4 DCL s 4 D T d (_> 1 0 1 ENO PPC® NAK PPU s u 5 E C E U e P IC E >IC E PC G « ? 0 1 0 ACK 5YN i > 6 > F a V Ul 1 i- > 0 1 1 BEL ETB 7 C W 9 t- r- ut 1 0 0 BS GET CAN SPE a H £ X l- h ( z 1 0 1 MT TCT EM 9 Ul 1 Y "" a " i Q SPD :F I ) NE D Ul & LD a O 1 0 0 LF SUB » 2 J 5 z 1 « ° SU 1 0 1 VT ESC + ? (/) K i 1 C/J V N G i ID 1 1 0 FF F5 , < < L \ 1 f 5 1 1 1 CR GS - é . £ M E 1 m s } £ 1 1 0 SO RS > N - n - 7 • i 1 1 1 SI US / I UN•L 0 UNT 0 •1 DEL / \ / V , A -v~ —v "V \ADDRESSED UNIVERSAL LISTEN V V COMMAND COMMAND ADDRESS TALK GROUP GROUP GROUP ADDRESS V(ACG) (UCG) (LAG) GROUP (TAG) PRIMARY COMMAN"VD GROUP (PCG) SECONDAR"V"Y COMMAND NOTES: © MSG = INTERFACE MESSAGE GROUP (SCG) 0 bi : 0101...b7 = DI07 © REQUIRES SECONDARY COMMAND © DENSE SUBSET (COLUMN 2 THROUGH 5) Multiline Interface Messages: 1SO-7 Bit Code Representation FYSISK INSTITUTTS DEPARTMENT OF 8 FORSKNINGS- PHYSICS GRUPPER RESEARCH SECTIONS Allmennfysikk og didaktikk General Physics Biofysikk Biophysics Elektronikk Electronics Elementærpartikkelfysikk Experimental Elementary Particle physics Faste staffers fysikk Condensed Matter physics Kjernefysikk Nuclear physics Plasma-, molekylar- og Plasma-, Molecular and kosmisk fysikk Cosmic physics Teoretisk fysikk Theoretical physics ISSN-0332-5571 J J J J [ limi li I; ^iN.JlE