Modelando Y Verificando Diseños De Sistemas De Tiempo Real
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Tesis de Posgrado Modelando y verificando diseños de sistemas de tiempo real Braberman, Víctor Adrián 2000 Tesis presentada para obtener el grado de Doctor en Ciencias de la Computación de la Universidad de Buenos Aires Este documento forma parte de la colección de tesis doctorales y de maestría de la Biblioteca Central Dr. Luis Federico Leloir, disponible en digital.bl.fcen.uba.ar. Su utilización debe ser acompañada por la cita bibliográfica con reconocimiento de la fuente. This document is part of the doctoral theses collection of the Central Library Dr. Luis Federico Leloir, available in digital.bl.fcen.uba.ar. It should be used accompanied by the corresponding citation acknowledging the source. Cita tipo APA: Braberman, Víctor Adrián. (2000). Modelando y verificando diseños de sistemas de tiempo real. Facultad de Ciencias Exactas y Naturales. Universidad de Buenos Aires. http://digital.bl.fcen.uba.ar/Download/Tesis/Tesis_3287_Braberman.pdf Cita tipo Chicago: Braberman, Víctor Adrián. "Modelando y verificando diseños de sistemas de tiempo real". Tesis de Doctor. Facultad de Ciencias Exactas y Naturales. Universidad de Buenos Aires. 2000. http://digital.bl.fcen.uba.ar/Download/Tesis/Tesis_3287_Braberman.pdf Dirección: Biblioteca Central Dr. Luis F. Leloir, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires. Contacto: [email protected] Intendente Güiraldes 2160 - C1428EGA - Tel. (++54 +11) 4789-9293 msm-meca i i FACULTAD DE CMP-¿"33:5í'.Ï';'.---_íï Y NATURALES / UBA J i Mii“.'i a '\ ‘v—. .I _ ¿1.1 ¡3Ü ¿111412, RN.m-__ 'J Eiüfi‘u g ¡“a ¿”.5 Departamento de Computación Facultad de Ciencias Exactas y Naturales Universidad de Buenos Aires Modeling and Checking Real-Time System Designs by Víctor Adrián Braberman, Director: PhD. Miguel Felder v Pabellón 1 - Planta Baja - Ciudad Universitaria (1428) Buenos Aires Argentina e-mail:[email protected] http://www.dc.uba.ar/people/exclusivos/vbraber 89W TCTL [3]. Finally, since we choose timed automata as formal kernel, we adapt and apply their deeply studied and developed analysis theory, as well as their practical tools. Moreover, we also describe from scratch an algorithm to model-check duration properties, a feature that is not addressed by available tools. That algorithm extends the one presented in [28]. 2.7 Some Logics for Real-Time Models . 25 2.7.1 Timed Computational Tree Logic . 25 2.7.2 Linear Duration Invariants . 26 3 Extensions on Timed Systems Theory 29 3.1 Property Preserving Simulations . 29 3.2 Property Preserving Bisimulations: CO-Bisimulations . 32 3.3 I/O Timed Components . 37 3.3.1 I/O Components, Composition and Non-Zenoness . 40 4 Describing RTS-Designs and Requirements 51 4.0.2 Introduction to Fixed Priority Application Model . 52 4.1 Describing the System Architecture . 52 4.2 Task Dynamics . 53 4.2.1 A Structured Language to Define Task Dynamics: Design Language 53 4.2.2 The Kernel Language: CDAGs . 57 4.2.3 From Design Language to CDAGs . 58 4.3 Communication and Environment: Constraining Components . 60 4.4 Requirements . 62 4.4.1 Safety Event Observers . 64 4.4.2 Büchi Observers . 68 4.4.3 TCTL Observers . 72 4.4.4 Linear Duration Observers . 72 5 Semantics of Tasks in terms of I/O Timed Components 77 5.1 The Untimed Semantics . 77 5.2 Timed Model . 78 5.3 The WCCT Calculus . 82 6 Model Reductions 87 vi 9.8.1 Past-Independence . 144 9.8.2 Obtaining Past-Independent Iterations . 146 9.9 The Basic Algorithm . 147 9.10 Conclusions and Discussions . 150 9.11 Proofs of Lemmas and Theorems 10 Conclusions and Future Work 155 Bibliography 160 A A Survey on RTS Design Notations and Analysis Tools 175 A.1 Nota/Lions and Models for Physical Designs of RTS . 175 A.1.1 A Tool Classification . 176 A.1.2 Guiding Features and Characteristics . 177 A.1.3 The Survey . 179 A.1.4 Some Remarks 190 B Abstract Code for the Working Examples 193 viii 4.10 Observer for Freshness: From a read to an update of the model . 66 4.11 Observer for The Regularity: InterPulse Delay . 66 4.12 Observer for Separation . 68 4.13 Observer for Responsel . 68 4.14 Observer for Response? . 68 4.15 Observer for Response3: From CH4 to Console Proxy . 69 4.16 Observer for Response3: From Console Proxy to ConsoleDisplay . 69 4.17 Observer for Freshness 1 . 69 4.18 Observer for Correlation . 69 4.19 Observer for False Alarm for CO . 70 4.20 Observer for Fault Detection HLW . 70 4.21 Observer for False Alarm for HLW . 70 4.22 Observer for Fault Detection NET . 70 4.23 Observer for Freshness 2 . 71 4.24 Observer for Console . 71 4.25 Büchi Observer: Responsiveness . 73 4.26 TCTL Observer: From Dangerous State to a Normal One . 74 4.27 LDI Observer: Energy Wasted . 75 5.1 Semantics for the Modeler and the Pulser . 79 5.2 Semantics for Tasks . 79 6.1 CH4-Sensor Semantics . 90 6.2 CH4-Sensor Semantics collapsed . 91 6.3 Conservative Abstraction Rules. 94 6.4 CH4-Sensor Conservative Reduction . 95 7.1 Standard vs. Reduced Composition . 108 7.2 Observer for Rail Cross System . 112 7.3 Fault Detection Net Observer . 113 xiv w .S.3, :fá ‘ .. FACU:Ta.“' -- ¡1.! '-[. q V. “'*" ‘J; C.¡,"¡'.{Jr-.. ‘r- ;.- >- '_ . _ - a ¡ --, .’ N -r..,/va‘! . .I .__\ Departamento de Computación Facultad de Ciencias Exactas y Naturales Universidad de Buenos Aires Modelando y Verificando Diseños de Sistemas de Tiempo Real Autor: Víctor Adrián Braberman Director: Doctor Miguel Felder Pabellón 1 - Planta Baja - Ciudad Universitaria (1428) Buenos Aires 82 2 4 Md Argentina e-mai|:vbraber©dc.uba.ar http://www.dc.uba.ar/peopIe/exclusivos/vbraber M3387üEl Abstract Real-time systems are found in an increasing variety of application fields. Usually, they are embedded systems controlling devices that may risk lives or damage properties: they are safety critical systems. Hard Real-Time requirements (late means wrong) make the development of such kind of systems a formidable and daunting task. The need to predict temporal behavior of critical real-time systems has encouraged the development of an use ful collection of models, results and tools for analyzing schedulability of applications (e.g., [109]). However, there is no general analytical support for verifying other kind of high level timing requirements on complex software architectures. On the other hand, the verification of Specifications and designs of real-time systems has been considered an interesting appli cation field for automatic analysis techniques such as model-checking. Unfortunately, there is a natural trade-off between sophistication of supported features and the practicality of formal analysis. To cope with the challenges of formal analysis real-time system designs we focus on three aspects that, we believe, are fundamental to get practical tools: model-generation, model reduction and model-checking. Then, firstly, we extend our ideas presented in [30] and develop an automatic approach to model and verify designs of real-time systems for complex timing requirements based on scheduling theory and timed automata theory [7] (a well known and studied formalism to model and verify timed systems). That is, to enhance practicality of formal analysis, we focus our analysis on designs adhering to Fixed-Priority scheduling. In essence, we exploit known scheduling theory to automatically derive simple and compositional formal models. To the best of our knowledge, this is the first proposal to integrate scheduling theory into the framework of automatic formal verification. To model such systems, we present I/O Timed Components, a notion and discipline to build non-blocking live timed systems. I/O Timed Components, which are build on top of Timed Automata, provide other important methodological advantages like influence detection or compositional reasoning. Secondly, we provide a battery of automatic and rather generic abstraction techniques that, given a requirement to be analyzed, reduces the model while preserving the relevant behaviors to check it. Thus, we do not feed the verification tools with the whole model as previous formal approaches. To provide arguments about the correctness of those abstrac tions, we present a notion of Continuous Observational Bismulation that is weaker than strong timed bisimulation yet preserving many well-known logics for timed systems like -v-4- u" j h- 4‘ _. —- ‘I v 11'. Agradecimientos Agradezco a las instituciones que me permitieron llevar a cabo este proyecto: el Departa mento de Computación, la Facultad de Ciencias Exactas y Naturales, UBA y el proyecto FOMEC. Asi mismo, extiendo mi agradecimiento a las actuales y pasadas autoridades, integrantes y ex-integrantes del Departamento de Computación quienes me apoyaron in condicionalmente. Merecen una especial mención, por su aporte y compromiso en esta tesis, mi director, el Dr. Miguel Felder, mis jurados: el Dr. Alfredo Olivero, el Dr. Mauro Pezzé y el Dr. Sergio Yovine, los miembros suplentes del jurado: el Dr. Juan Vicente Ech ague, y el Lic. Gabriel Baum. Tampoco puedo dejar de mencionar al coautor e inspirador del trabajo sobre propiedades de duración, el Dr. Dang Van Hung. Le doy las gracias a los miembros del Politécnico de Milan, del UNU/IIST, y del instituto VERIMAG que gentilmente me recibieron e inspiraron. Agradezco epecialmente a los “tesistas” Gabriela Finkelstein, Diego Garbervetski y Cecilia Schor por su importante contribución en la vali dación y corrección de parte de las ideas incluidas en esta tesis. Finalmente, por el enorme soporte emocional que me brindaron durante todos estos años, le doy las gracias a mi familia, a mi novia y a mis amigos. iii Contents 1 Introduction 1 1.1 Prior Research . 2 1.2 Working Examples . 3 1.2.1 The Active Structural Control System .