Hi3798m V200 Brief Data Sheet

Hi3798M V200 Hi3798M V200 Brief Data Sheet

Key Specifications Processor Security Processing

 Multi-core 64-bit high-performance ARM Cortex  Advanced CA and downloadable CA A53  DRM  Multi-core high-performance GPU  Secure boot, secure storage, and secure upgrade Memory Control Interfaces Graphics and Display Processing (Imprex 2.0  DDR3/4 interface Processing Engine)

 eMMC/NOR/NAND flash interface  Multiple HDR formats Video Decoding (HiVXE 2.0 Processing Engine)  3D video processing and display   Maximum 4K x 2K@60 fps 10-bit decoding 2D graphics acceleration engine  Multiple decoding formats, including Audio and Video Interfaces H.265/HEVC, AVS, H.264/AVC MVC, MPEG-1/2/4, VC-1, and so on  HDMI 2.0b output  Analog video interface Image Decoding  Digital and analog audio interfaces Full HD JPEG and PNG hardware decoding Peripheral Interfaces Video and Image Encoding  GE and FE network ports 1080p@30 fps video encoding  Multiple USB ports Audio Encoding and Decoding  SDIO, UART, SCI, IR, KeyLED, and I2C interfaces  Audio decoding in multiple formats  Audio encoding in multiple formats Others DVB Interface  Ultra-low-power design with less than 30 mW standby power consumption  Multi-channel TS inputs and outputs  BGA package

Solution  Is targeted for the DVB/Hybrid STB market.  Complies with the broadcasting television-level  Supports full 4K decoding. picture quality standards.   Supports Linux, Android, and TVOS intelligent Metes the increasing value-added service operating systems requirements.

Copyright © HiSilicon (Shanghai) Technologies Co., Ltd. 2016. All rights reserved. New R&D Center, 49 Wuhe Road, Bantian, Longgang District, Shenzhen 518129 P. R. China www.hisilicon.com Issue: 00B01 1 Date: 2016-09-18 Hi3798M V200 Hi3798M V200 Brief Data Sheet

Functional Block Diagram

Tunner QAM VDAC Analog interface Multi-core Multi-core SD card/Wi-Fi SDIO Cortex A53 GPU HDMI 2.0b TX HDMI out IR Imprex 2.0 Audio DAC Audio output 2 HiVXE 2.0 I C engine engine I2S Audio codec UART video decoder (4Kp60,10-bit) Encoder JTAG (1080p30) S/PDIF S/PDIF

BootROM/OTP DDR SDRAM DDR3/4 JPEG/PNG USB USB device BootRAM NAND/eMMC/ decoder Flash GE SPI Cipher Low-power ETH DES/3DES/AES PLL processor FE OSC

Acronyms and Abbreviations AVC advanced video coding AVS Audio Video Standard BGA ball grid array CA conditional access DDR double data rate DRM digital rights management DVB Digital Video Broadcasting eMMC embedded multimedia card FE fast Ethernet GE gigabit Ethernet GPU graphics processing unit HD high definition HDMI high definition multimedia interface HDR high dynamic range HEVC high efficiency video coding I2C inter-integrated circuit

Copyright © HiSilicon (Shanghai) Technologies Co., Ltd. 2016. All rights reserved. New R&D Center, 49 Wuhe Road, Bantian, Longgang District, Shenzhen 518129 P. R. China www.hisilicon.com Issue: 00B01 2 Date: 2016-09-18 Hi3798M V200 Hi3798M V200 Brief Data Sheet

IR infrared JPEG Joint Photographic Experts Group LED light emitting diode MVC multiview video coding PNG portable network graphics SCI smart card interface SDIO secure digital input/output TS transport stream TVOS television operating system UART universal asynchronous receiver transmitter