Dissertation
Analysis and Cancellation Methods of Second Order Intermodulation Distortion in RFIC Downconversion Mixers
Analyse und Methoden zur Unterdr¨uckung von St¨orungen durch Intermodulation zweiter Ordnung in RFIC-Abw¨artsmischern
Der Technischen Fakult¨at der Universit¨at Erlangen-N¨urnberg zur Erlangung des Grades
DOKTOR-INGENIEUR
vorgelegt von
Krzysztof Dufrˆene
Erlangen - 2007 Als Dissertation genehmigt von der Technischen Fakult¨at der Universit¨at Erlangen-N¨urnberg
Tag der Einreichung: 14.12.2006 Tag der Promotion: 27.02.2007 Dekan: Prof. Dr.-Ing. Alfred Leipertz 1. Berichterstatter: Prof. Dr.-Ing. Robert Weigel 2. Berichterstatter: Prof. Dr.-Ing. Richard Hagelauer Acknowledgements
The work described in this thesis could not have been accomplished without the help and support of others. First of all, I would like to thank my research advisor, Professor Dr. Robert Weigel, for his guidance and support throughout the past three years. I am especially grateful to him for providing an extraordinary research environment, infrastructure, and resources.
Next, I would like to acknowledge Infineon Technologies AG for financial support of the project, chip fabrication as well as many fruitful discussions. In particular, I would like to thank Zdravko Boos for giving me a challenging topic to work on, Werner Schelmbauer and Martin Simon for support in circuit design and Michael Flath for his guidance in the last phase of the project. This work would not have been finished without their help and valuable suggestions.
I would also like to thank all the colleagues at the university for creating an exceptionally inspiring atmosphere. I am especially indebted to Karim Chabrak and Ozhan¨ Koca who were the members of the project team. Matthias Schmidt and Kay Seemann are appreciated for their engagement in the laboratory activities. Most of all thanks go to Herbert Schr¨oder for preparation of printed circuit test boards without which it would have been impossible to measure my test chips. Moreover, I would like to thank the secretaries for all the paperwork associated with my project.
Finally, I would like to express my appreciation for my parents; their unconditional love as well as continual support and encouragement have been a source of strength which allowed me to finish the presented work.
Erlangen, December 2006 Krzysztof Dufrˆene
Abstract
This dissertation presents analysis and explores cancellation methods of second order in- termodulation distortion (IMD2) in radio frequency integrated circuit (RFIC) downconversion mixers. Such methods enable improvement of the overall receiver dynamic range by enhancing its immunity to amplitude modulated interferers. High rejection of IMD2 is especially important in case of wireless transceivers with decreased RF selectivity, where strong out-of-band signals may be present at the downconversion mixer input.
In the thesis, a thorough study of second order intermodulation generation mechanisms is carried out, with a stress put on sensitivity of second-order intercept point (IP2) to various transceiver operating conditions. Different classes of IMD2 cancellation techniques are investi- gated. A concept of IP2 auto-calibration based on adaptive digital signal processing is presented and measurement results of the corresponding hardware demonstrator implemented in an ad- vanced 0.13μm RF CMOS technology are shown.
Kurzfassung
Diese Dissertation behandelt die Analyse von Verzerrungen in integrierten Abw¨artsmischern f¨ur Hochfrequenz-Anwendungen (RFIC), die durch Intermodulation zweiter Ordnung (IMD2) verursacht werden und untersucht Methoden zu deren Unterdr¨uckung. Durch die Erh¨ohung der Resistenz gegen¨uber amplitudenmodulierten St¨orsignalen wird dann f¨ur den gesamten Emp- f¨anger eine Verbesserung des Dynamikbereichs erreicht. Dabei kommt der hohen Unterdr¨uckung der IMD2 eine wichtige Rolle zu, besonders im Fall von drahtlosen Sendeempf¨angern mit ver- ringerter HF-Selektivit¨at, in denen starke bandexterne Signale am Eingang des Abw¨artsmischers auftreten k¨onnen.
In dieser Arbeit wird eine eingehende Untersuchung der Mechanismen, die zu der Entstehung von Verzerrungen durch Intermodulation zweiter Ordnung f¨uhren, durchgef¨uhrt. Der Schwer- punkt liegt dabei auf der Empfindlichkeit des Intercept-Punktes zweiter Ordnung (IP2) bei ver- schiedenen Betriebsbedingungen des Sendeempf¨angers. Des Weiteren werden unterschiedliche Kategorien von Methoden zur Unterdr¨uckung der IMD2 untersucht. Das Konzept einer IP2- Selbstkalibrierung, die auf einer adaptiven Signalverarbeitung basiert, wird vorgestellt und die Messergebnisse des zugeh¨origen Prototyps, der in moderner 0.13μm RF CMOS-Technologie ent- worfen worden ist, werden dargestellt.
Contents
1 Introduction 1 1.1Motivation...... 1 1.2 Research Contributions ...... 2 1.3OrganizationoftheThesis...... 3
2 Fundamentals of Wireless Communications 4 2.1GeneralConsiderations...... 4 2.2RadioChannel...... 4 2.3 Modulation Schemes and Access Methods ...... 5 2.4OriginsofVariable-EnvelopeSignals...... 8
3 Wireless Transceivers 11 3.1GeneralConsiderations...... 11 3.2TransceiverArchitectures...... 11 3.2.1 TransmitterArchitectures...... 11 3.2.2 Receiver Architectures ...... 13 3.3TransceiverPerformanceCharacterization...... 16 3.3.1 Noise...... 17 3.3.2 Nonlinearity...... 22 3.4 Even Order Distortion in Wireless Receivers ...... 29 3.4.1 Two-ToneCharacterization...... 30 3.4.2 ContinuousSpectraCharacterization...... 30 3.4.3 IP2RequirementsforCellularSystems...... 34
4 Downconversion Mixers 42 4.1GeneralConsiderations...... 42 4.2MixerArchitectures...... 43 4.2.1 Unbalanced and Balanced Mixers ...... 44 4.2.2 Passive and Active Mixers ...... 45 4.3MixerPerformanceCharacterization...... 49 4.3.1 ConversionGain...... 50 4.3.2 Noise...... 51 4.3.3 IntermodulationDistortion...... 57 4.3.4 Imbalances...... 58 4.4DetailedAnalysisofRFICMixerSecondOrderDistortion...... 60 4.4.1 BehavioralModeling...... 60 4.4.2 CircuitLevelModeling...... 66 4.4.3 DependenceofIMD2onOperatingConditions...... 96 4.4.4 StatisticalAnalysis...... 101
i Contents ii
5 IMD2 Cancellation Methods 107 5.1GeneralConsiderations...... 107 5.2 Overview of IMD2 Cancellation Methods ...... 108 5.2.1 LayoutTechniques...... 108 5.2.2 CircuitTechniques...... 109 5.2.3 DynamicMatching...... 114 5.2.4 IMD2Compensation...... 116 5.2.5 IP2Calibration...... 117 5.3DetailedAnalysisofIP2Calibration...... 118 5.3.1 Background...... 118 5.3.2 TuningCircuits...... 119 5.4AutomaticIMD2Cancellation...... 124 5.4.1 Motivation...... 124 5.4.2 CancellationSchemeswithTestSignals...... 125 5.4.3 AdaptiveIMD2Cancellation...... 127
6 Hardware Demonstrator 142 6.1SystemArchitecture...... 142 6.2CircuitDesign...... 142 6.2.1 MixerDesign...... 142 6.2.2 TuningCircuits...... 144 6.2.3 Supporting Circuits ...... 145 6.2.4 DigitalEqualizer...... 147 6.3LayoutandFabrication...... 148 6.4TestBoard...... 149
7 Experimental Results 154 7.1MeasurementSiteArrangement...... 154 7.2MeasurementResults...... 154 7.2.1 BasicIQDownconverterBehavior...... 154 7.2.2 IIP2Tuning...... 159 7.2.3 IIP2Auto-calibration...... 162
8 Conclusions 166 8.1SummaryandFinalRemarks...... 166 8.2 Recommendations for Future Work ...... 167
A Miscellaneous Calculations 168
B Mismatch Modeling 175
C RFIC Simulation 182 List of Figures
2.1Radiochannel...... 5 2.2Constellationsofmodulatedsignals...... 6 2.3Duplextechniques...... 7 2.4 Multiple access techniques ...... 8 2.5 Sample signal trajectory and the corresponding envelope ...... 9
3.1Transmitterarchitectures...... 12 3.2 Superheterodyne receiver ...... 14 3.3 Zero-IF receiver ...... 15 3.4 Low-IF receiver ...... 16 3.5 Scenario leading to the fundamental RF design challenge ...... 17 3.6 Representation of circuit noise by input noise generators ...... 18 3.7Graphicalinterpretationofnoisefactor...... 19 3.8Cascadednoisefigure...... 20 3.9Reciprocalmixing...... 21 3.10Gaincompression...... 23 3.11Desensitization...... 24 3.12Thirdorderintermodulationdistortion...... 25 3.13 N-th order intercept point ...... 26 3.14 Cascaded intercept point ...... 27 3.15 Relations between various interferers and second-order distortion ...... 31 3.16QPSKsignaltrajectoriesforvariousroll-offfactors...... 32 3.17QPSKenvelopepowerspectraldensitiesforvariousroll-offfactors...... 33 3.18IMD2powerspectraldensitiesandCCDFsofQPSKsignals...... 34 3.19 IMD2 level translating into IP2 requirement ...... 35 3.20AMsuppressiontestcaseinGSM...... 36 3.21 Receiver test cases determining IIP2 requirements for UMTS system ...... 37
4.1 Primary mixer function: frequency translation ...... 43 4.2 Balanced mixers ...... 44 4.3 Examples of passive mixers ...... 46 4.4 Examples of active mixers ...... 46 4.5ClassicCMOSGilbertcelltypemixer...... 47 4.6Lowvoltagemixerarchitectures...... 48 4.7ActiveLVmixerwithpassiveswitchingstage...... 49 4.8 Noise folding in mixers ...... 52 4.9DSBvsSSBnoiseconsiderations...... 55 4.10 Input referred noise density vs frequency ...... 56 4.11 Linear and nonlinear switch transconductances vs time ...... 57
iii List of Figures iv
4.12EffectsofIQmismatchesonQPSKsignalconstellation...... 59 4.13EffectsofDCoffsetandIMD2onQPSKsignalconstellation...... 59 4.14BehavioralmodeloftheGilbertcell...... 60 4.15Mixerloadbehavioralmodels...... 64 4.16RF-LOcouplingmodel...... 66 4.17I-Vswitchingcharacteristic...... 67 4.18LO-RFcouplingmodel...... 68 4.19IIP2duetoself-mixing...... 69 4.20DCoffsetduetoself-mixing...... 70 4.21Completecouplingmodel...... 71 4.22IIP2duetoself-mixingcombinedwith3rdordernonlinearities...... 71 4.23Switchingstageleakage...... 72 4.24Switchingpairmodel...... 73 4.25Periodicbipolarsquarewavesandtheirspectra...... 74 4.26Squarewavedecomposition...... 75 4.27 Direct leakage vs. threshold voltage mismatch ...... 76 4.28DCoffsetvs.thresholdvoltagemismatch...... 76 4.29IMD2distortionsidebands...... 77 4.30Equivalentmodeloftheswitchingpair...... 78 4.31 Total leakage vs. LO frequency ...... 81 4.32 Total static DC offset vs. LO frequency ...... 83 4.33 Total leakage vs. LO frequency ...... 85 4.34 Total static DC offset vs. LO frequency ...... 86 4.35Equivalentmodeloftheswitchingpair-nonlinearityanalysis...... 87 4.36 IMD2 distortion vs. RF interferer frequency ...... 88 4.37Equivalentmodeloftheswitchingpair-mismatchasymmetryanalysis...... 89 4.38 IMD2 distortion vs. RF interferer frequency - mismatch asymmetry ...... 90 4.39 RC load mismatches in voltage mode output mixers ...... 92 4.40 Effects of CMFB loop bandwidth ...... 93 4.41 Impact of RC load mismatches in current mode output mixers ...... 94 4.42IIP2vs.temperature...... 96 4.43 IIP2 vs. supply voltage ...... 97 4.44 IIP2 vs. LO frequency ...... 98 4.45 IIP2 vs. RF frequency ...... 99
4.46 IIP2 and ΔIMD2eff vs. RF input power ...... 100 4.47 Biasing current vs. RF input power ...... 100 4.48MonteCarlosimulations:IIP2vsstaticDCoffset...... 101 4.49Theoreticalpredictions:IIP2vsstaticDCoffset...... 102 4.50 Theoretical predictions: Histograms of effective IMD2 mismatch and IIP2 . . . . 103
5.1LO-RFcouplingreductiontechniques...... 108 5.2 IMD2 cancellation with frequency dependent negative feedback ...... 109 5.3 Magnitudes of transconductances for 3 different feedback implementations . . . . 110 5.4 Mixer core with IMD2-cancelling biasing circuit ...... 111 5.5 Common mode IIP2 for standard and IMD2 cancelling biasing circuit ...... 112 5.6Conceptofmixerdynamicmatching...... 114 5.7Dynamicmatching-implementation...... 115 5.8IMD2compensationscheme...... 116 5.9 Reference distortion paths for compensation of mixer IMD2 distortion ...... 117 5.10Possibleapproachestointentionalmismatchintroduction...... 118 List of Figures v
5.11 Proposed IP2 tuner - switching stage biasing ...... 120 5.12 Tuning performance of the IP2 tuner shown in Fig. 5.11 ...... 120 5.13ExamplesofIIP2improvementcurves...... 121 5.14 Proposed IP2 tuner - adjustment of CMFB current source widths ...... 122 5.15 Tuning performance of the IP2 tuner shown in Fig. 5.14 ...... 122 5.16 DC offset due to IP2 tuner ...... 123 5.17 Calibrated IIP2 vs offset frequency with and without RC pole tuning ...... 124 5.18TestsignalbasedIMD2cancellationschemes...... 125 5.19AutomaticIMD2cancellation:IIP2vstime...... 126 5.20 Adaptive interference cancellation system architecture ...... 127 5.21AdaptiveIMD2compensation:signaltrajectories...... 128 5.22 Adaptive IP2 calibration system with common mode reference signal ...... 129 5.23 Adaptive IP2 calibration: output signal ...... 130 5.24 Adaptive IP2 calibration system with reference signal obtained from Tx ..... 131 5.25OptionalofflineadaptiveIP2calibrationsystem...... 132 5.26 Mean square error vs mismatch ...... 133 5.27Adaptationprocess...... 134 5.28 IP2 tuner learning curves for 3 different LMS step sizes ...... 135 5.29 IP2 tuner learning curves for 2 different interferers ...... 136 5.30 Graphical explanation of excess MSE ...... 137 5.31 Distortion to noise ratio vs time for two different step sizes ...... 137
6.1Demonstratorarchitecture-concept...... 143 6.2 IP2-tunable downconversion mixer ...... 143 6.3Tunerschematics...... 144 6.4Schematicofthecommonmodesignaldetector...... 144 6.5SchematicofthebasebandfilterwithDCcompensation...... 145 6.6 Comparator with the threshold tuner ...... 146 6.7Implementationofthesign-signLMSalgorithm...... 146 6.8Testchipfloorplan...... 147 6.9Testchiplayout...... 148 6.10Testchipdiemicrophotograph...... 149 6.11Bondingdiagram...... 150 6.12Chiponboard...... 150 6.13RFboard...... 151 6.14LObaluns...... 151 6.15 Board with a differential to single-ended converter ...... 151 6.16Mainboard...... 152
7.1Measurementsitearrangement...... 155 7.2Measurementsite...... 155 7.3 Matching of the RF input port at 2GHz ...... 156 7.4 Frequency response ...... 156 7.5Desensitizationmeasurement...... 157 7.6IIP3measurement...... 158 7.7 IIP2 versus RF interferer frequency ...... 158 7.8 IMD2 and IMD4 at high input levels ...... 159 7.9IIP2improvementcurvesforvariousoperatingconditions...... 160 7.10 Impact of IP2 tuner on mixer gain and IIP3 ...... 160 7.11 Impact of IP2 tuner on mixer noise ...... 161 List of Figures vi
7.12 Impact of IP2 tuner on output DC offset ...... 161 7.13 IIP2 versus frequency offset between interferer tones ...... 162 7.14Distortionspectrumbeforeandafteroff-linecalibration...... 162 7.15Signalconstellationbeforeandduringonlinecalibration...... 163 7.16Transientbehavioroftheadaptationalgorithm...... 163 7.17Undesiredtransientsduringadaptation...... 164
B.1Gatewidthandlengthvariations...... 178 B.2Layoutpatternsreducinglong-distanceprocessvariations...... 179
C.1 Linear time-varying analysis: Input and output sidebands ...... 184 C.2Envelopeanalysissimulationflow...... 185 Abbreviations
AC Alternating Current
ACPR Adjacent Channel Power Ratio
ADC Analog-to-Digital Converter
AWGN Additive White Gaussian Noise
BB Base-Band
BER Bit Error Rate
CDMA Code Division Multiple Access
CMFB Common Mode Feedback
CMOS Complementary Metal Oxide Semiconductor
CMRR Common Mode Rejection Ratio
DAC Digital-to-Analog Converter
DC Direct Current
DCR Direct Conversion Receiver
DSB Double Side-Band
DSP Digital Signal Processing
DUT Device Under Test
EDGE Enhanced Data Rates for GSM Evolution
FDD Frequency Division Duplex
FET Field Effect Transistor
FM Frequency Modulation
GSM Global System for Mobile Communication
I In-Phase
IC Integrated Circuit
IF Intermediate Frequency Abbreviations viii
IMD Intermodulation Distortion
IMD2 Second Order Intermodulation Distortion
IMD3 Third Order Intermodulation Distortion
(I)IP2 (Input-Referred) Second Order Intercept Point
(I)IP3 (Input-Referred) Third Order Intercept Point
LNA Low Noise Amplifier
LO Local Oscillator
MDS Minimum Detectable Signal
MOS Metal Oxide Semiconductor
NF Noise Figure
NMOS N-Type Metal Oxide Semiconductor
PCB Printed Circuit Board
PA Power Amplifier
PM Phase Modulation
PMOS P-Type Metal Oxide Semiconductor
PSD Power Spectrum Density
RF Radio Frequency
RFIC Radio Frequency Integrated Circuit
Q Quadrature-Phase, Quality Factor
SAW Surface Acoustic Wave
SFDR Spurious Free Dynamic Range
SNDR Signal-to-Noise plus Distortion Ratio
SNR Signal-to-Noise Ratio
SSB Single Side-Band
TDD Time Division Duplex
TDMA Time Division Multiple Access
TRX Transmitter-Receiver, Transceiver
UMTS Universal Mobile Telecommunication System
VCO Voltage Controlled Oscillator
WCDMA Wideband Code Division Multiple Access Chapter 1
Introduction
1.1 Motivation
Wireless communications is playing an increasingly significant role in everyday life. Both fixed and mobile wireless systems enable people and devices to exchange information without the need for wiring, which reduces implementation costs of communications networks and makes the usage of telecommunication services more convenient. As wireless communications systems become more and more popular, the demand for higher data rates, new services and functionality of wireless terminals increases. In addition to basic communication capabilities, modern wireless devices incorporate various add-on technologies like digital camera, audio and video recorder and player, radio and television broadcast receiver as well as various software applications like clock, calculator, organizer. In order to embed these technologies into successful products, factors like low cost, low power consumption and small dimensions of blocks responsible for communication tasks become critical, especially in case of mobile terminals. In response to market developments, there has been a growing trend to reduce the number of components comprising the transceiver section of the wireless device. In particular, direct conversion architectures have gained increasing attention because of their potential for a high level of integration and low power consumption. In addition, recent advances in semiconductor technologies, most notably CMOS processes, have paved the way for realization of the system- on-chip architecture, in which radio and baseband modem as well as application functions of a mobile phone are combined in a single chip. Meanwhile, the number of wireless standards has grown remarkably, sparking an interest in multi-standard, multi-band transceivers. In order to serve many systems, wireless terminals need to be reconfigurable. As the required flexibility is relatively easy to achieve in the digital domain, research efforts have focused in the recent past on moving the analog-to-digital con- version stage towards the antenna and performing more and more signal processing tasks using digital techniques. Simultaneously, multi-band operation necessitates removal of as much RF filtering as possible. This tendency is reinforced by the pressure to reduce component count and board size. Although a significant progress has been made, the analog section remains a bottleneck of the whole transceiver, especially on the receive side. As a consequence of decreased RF selectiv- ity, strong blocking signals may be present at the receiver input and cause its desensitization, hindering the reception of the wanted signal. Furthermore, despite very small amount of analog processing left, there is still place for analog imperfections, such as gain step inaccuracy, cross- talk, nonlinearities generating intermodulation and cross-modulation distortion, DC offsets and gain/phase quadrature imbalances, which deteriorate the quality of the desired signal. Chapter 1. Introduction 2
In direct conversion receivers, a significant kind of interference is second-order intermodu- lation distortion (IMD2) because it falls in the baseband occupied by a downconverted wanted signal no matter at what frequency an amplitude modulated interferer generating it resides. IMD2 results from circuit nonlinearities combined with hardware layout asymmetries and un- avoidable device parameter mismatches due to fabrication process variations. Because of random nature of device mismatches, the amount of second-order distortion is itself random. Therefore, sufficient IMD2 rejection might not be guaranteed during the design stage. Nevertheless, the receiver dynamic range must not become degraded as a result of second- order distortion. Accordingly, many methods of overcoming the problem have been proposed. Since the downconversion mixer is the main contributor to IMD2, most techniques focus on improving its performance by introducing certain post-production corrections. However, an issue of sensitivity of these corrections to changes in the operating conditions becomes apparent. The availability of DSP processing power in modern integrated receivers opens up new pos- sibilities. Most importantly, the inherent lack of mismatches of digital circuits can be exploited in order to cancel imbalances in the analog section and improve the IMD2 rejection. Moreover, cancellation of distortion can be carried out automatically, reducing production testing burden and allowing to maintain the improved performance over time. Consequently, exploration of efficient on-chip IMD2 cancellation methods by means of analog hardware tuning supported by digital signal processing is of interest. Topics including distor- tion detection techniques and interactions between analog and digital sections of the distortion cancellation system need to be addressed. In addition, to come up with a reliable detection and cancellation technique, IMD2 generation mechanisms have to be thoroughly understood. Although tremendous research effort has been done in recent years in the field of the second- order intermodulation distortion analysis, there are still some phenomena that lack scientific explanation.
1.2 Research Contributions
Contributions of the research can be categorized into 3 groups: 1) characterization techniques of second order intermodulation distortion, 2) analysis of second-order distortion generation mechanisms in downconversion mixers, 3) IMD2 cancellation methods. A second order distortion characterization approach based on a concept of squared envelope of the receiver input signal is introduced. Traditional second-order intercept point (IP2) descrip- tion based on two-tone characterization tests is treated as a special case of the proposed method. Differences between distortion predictions for various digitally modulated interferers are identi- fied by studying complementary cumulative distribution functions and spectral characteristics of the interferer envelopes. Advances in the theoretical analysis of second-order distortion mechanisms in mixers are re- ported. Improved mismatch modeling of the Gilbert cell switching stage is presented by taking into account unequal mismatches within differential pairs forming the switching quad. More- over, the contribution of the mixer output common mode feedback current source mismatches to the differential second-order distortion is calculated. Next, a second-order distortion gen- eration mechanism caused by port-to-port coupling combined with third order nonlinearities of the mixer is discovered and characterized. Furthermore, an indirect second order distortion leakage mechanism due to the interaction of the switching pairs with the output conductance of the input stage transistors is described. Besides, RF interferer frequency dependent distor- tion generation mechanisms in the switching pairs are thoroughly analyzed. The effect of output stage mismatches in current mode output mixers on differential second-order distortion is shown. Lastly, the sensitivity of IP2 to various transceiver operating conditions is examined. Chapter 1. Introduction 3
In the area of IMD2 cancellation methods, two innovative calibration circuits, suitable es- pecially for low voltage current mode output mixers, have been designed and implemented in a 0.13μm RF CMOS technology. A significant progress has been achieved in the field of automatic cancellation of second order intermodulation distortion. A novel concept of IP2 auto-calibration based on adaptive digital signal processing is introduced. It is regarded as the main and most important contribution of the research. The proposed distortion cancellation scheme is evalu- ated using advanced computer simulation tools. A corresponding hardware demonstrator has been designed and implemented in a 0.13μm RF CMOS technology.
1.3 Organization of the Thesis
The thesis is organized as follows. Chapter 2 introduces selected aspects of wireless com- munications. Fundamental topics like definition of the radio channel as well as access methods and modulation schemes are discussed. Particular stress is put on the origins of time-varying envelope signals, which are the sources of distortion studied in detail in this dissertation. Chapter 3 describes architectures of wireless transceivers. An overview of parameters used to quantify wireless transceiver performance in terms of noise and nonlinear behavior is presented. The chapter ends with the description of characterization methods of even-order distortion in wireless receivers and calculation of IP2 requirements for some common cellular mobile commu- nication systems. In chapter 4, the attention is turned to the downconversion mixer, being the central block of the wireless receiver. After describing various mixer architectures and exploring their proper- ties, basic mixer performance parameters are defined, taking into account frequency conversion effects. Next, a detailed analytical description of RFIC mixer second order intermodulation distortion generation mechanisms is given, both on behavioral and circuit levels. The analysis is supported by comparisons with computer simulations. Chapter 5 provides an overview of methods that can be applied to improve rejection of second order intermodulation distortion, including layout and circuit techniques as well as compensation and calibration schemes. This is followed by a study of various IP2 calibration circuits. Lastly, automatic IMD2 cancellation methods are explored, including adaptive techniques. In chapter 6, a hardware prototype designed to evaluate the proposed digital adaptive IP2 calibration scheme is described. Measurement results of the demonstrator are documented in chapter 7. Conclusions of the research are presented in chapter 8, which also gives recommen- dations for further work in the area of the even order intermodulation distortion. Chapter 2
Fundamentals of Wireless Communications
2.1 General Considerations
Wireless communications can be defined as the use of electromagnetic waves to transmit information over a distance without support of cables for the purpose of communication between people or devices. The lack of a well defined transmission path and impossibility to shield the transmitted signal from various interfering signals that are present in the same medium makes the wireless communications an exceptionally challenging communication method. In fact, hostile condi- tions of the wireless channel is what distinguishes wireless communications from other types of communication systems. This short introductory chapter presents some basic concepts of wireless communications. Apart from defining terms that are used throughout this thesis, the goal of the chapter is to identify the origins of signals with time-varying envelopes. As it is shown in Chapter 3, such signals are responsible for generation of even order intermodulation distortion, around which this dissertation is focused.
2.2 Radio Channel
The radio channel comprises a transmitter, a propagation channel and a receiver, as depicted in Fig. 2.1. The transmitter is used to encode data, amplify it and send it by means of elec- tromagnetic waves. The propagation channel causes signal power loss, which increases with the distance from the transmitter. Additionally, the propagation channel introduces various sources of distortion deteriorating the quality of a transmitted signal, including multipath propagation causing signal fading (i.e. fluctuations in the signal level as a function of distance), channel noise as well as interference coming from devices other than those involved in a given communication process. Especially the last source of distortion gets more and more problematic nowadays as wireless communications becomes increasingly popular and more services/users share the same propagation channel. Finally, the receiver detects the transmitted signal by removing unwanted interfering signals, equalizing the multipath propagation channel, amplifying the wanted signal and decoding the information encoded by the transmitter. Chapter 2. Fundamentals of Wireless Communications 5
+ Path Loss + Fading + Noise + Interference
Transmitter Propagation Channel Receiver
Figure 2.1: Radio channel
2.3 Modulation Schemes and Access Methods
Modulation Schemes Information signals have baseband nature, i.e. their power spectral densities span frequency range around DC. It is well known from basic electromagnetic and antenna theory that if such in- formation signals were sent directly through space, the receiver and transmitter antennas would have to be enormously large. Antenna sizes are reduced as frequency increases. High frequency signals are therefore preferred to facilitate wireless transmission of information. In addition, uti- lization of high-frequency signals allows co-existence of different systems by exploiting different frequency bands for each system. In order to send baseband information signal as a bandpass signal, a high frequency (alter- natively called RF - radio frequency) sinusoidal carrier signal has to be encoded (modulated) with the information by varying at least one of its three characteristics: amplitude, frequency, or phase. Changing the signal amplitude is known as amplitude modulation. In amplitude modulation, the carrier amplitude is varied instantaneously with the information signal. Varying the carrier frequency is known as frequency modulation. Finally, varying the carrier phase is known as phase modulation. To improve efficiency of modulation, i.e. its ability to send more information in a given time interval, orthogonality of carrier signals shifted by 90 degree can be exploited. Modulation schemes that take advantage of this property are by convention referred to as quadrature ampli- tude modulation, although they may also involve or even be effectively limited to variations of phase or frequency of the carrier.
Representation of Modulated Signals Every real band-limited signal can be represented as j2πfct s(t)=I(t)cos 2πfct − Q(t)sin 2πfct = e s (t)e , (2.1) where I(t)andQ(t) are the in-phase and quadrature-phase information bearing signals, respec- tively, s (t)=I(t)+jQ(t) is the complex-envelope associated with the signal s(t), while fc is in principle an arbitrarily selected carrier frequency [1]. Chapter 2. Fundamentals of Wireless Communications 6
Q Q
I I
(a) Single-amplitude level signal (b) Multiple amplitude level signal
Figure 2.2: Constellations of modulated signals
Alternatively, band-limited signals can be represented by means of magnitude a(t) and phase φ(t) components of their complex envelopes as s(t)=a(t)cos 2πfct + φ(t) . (2.2)
The magnitude a(t) of the complex envelope is often referred to as the envelope of the signal s(t) and its squared value is an instantaneous power of the signal. Both representations are suitable for describing signals arbitrarily modulated either with analog or digital information signals. The most important remark is that the whole transmitted information is included in the complex envelope of the signal.
Channel Capacity In [2], it has been shown that for a special case of a band-limited channel corrupted by stationary additive white Gaussian noise (AWGN), channel capacity defined as a maximum number of information bits per second that can be transmitted through the channel, is given as S C = B log +1 , (2.3) 2 N where B is the channel bandwidth in Hz, S is the power of the information signal in the given channel while N is the power of AWGN noise in the channel. An important point is that according to the presented theory data can be sent with an arbitrarily low probability of error at a rate C through a band-limited, noisy channel. According to (2.3), bandwidth and signal-to-noise ratio form independent degrees of freedom which can be used to increase a rate at which information is sent through a channel. Thus, higher channel capacity can be achieved without widening the signal bandwidth by increasing the signal-to-noise ratio. For example, by having a sufficient signal-to-noise ratio to resolve 2M separate amplitude levels in digital QAM modulations, symbols representing 2M +2bitscanbesentatagiven rate. Fig. 2.2 illustrates the concept by showing QAM signal constellations (depicting sets of all possible modulation symbols on an I-Q plane) for two cases: a single-amplitude level signal, in which all modulation symbols are at equal distance from the origin of the I-Q plane; and a multiple-amplitude level signal, which contains symbols situated at different distances from the origin of the I-Q plane. For a given level of channel noise N, distinguishing between adjacent symbols requires increase of the total signal power S. Chapter 2. Fundamentals of Wireless Communications 7
Downlink frequency frequency
Uplink Uplink Uplink Downlink Downlink
time time (a) FDD duplex technique (b) TDD duplex technique
Figure 2.3: Duplex techniques
Duplex Techniques Transmissions in wireless communication systems can be carried out either in one direction only or in both directions. In the first case, systems are referred to as simplex communication systems. Such systems are often employed in broadcast networks, where the receivers do not need to send any data back to the transmitter/broadcaster. Duplex techniques are employed whenever communications has to be carried out in both directions. In such a case, the transmit and receive signals have to be somehow separated. Two types of duplex techniques exist: Frequency Division Duplex (FDD) and Time Division Duplex (TDD). Both techniques are explained graphically in Fig. 2.3. In the FDD method, transmit and receive signals are separated in frequency. This ensures that both transmission and reception functions can be performed simultaneously. Frequency division duplex is an efficient method of communication in case of symmetric traffic. The TDD technique separates transmit and receive signals in the time domain. Since trans- missions in both directions are carried out in the same frequency band, they cannot take place simultaneously. Time division duplex has a strong advantage in case of asymmetry between data rates in each direction. As the amount of data in one direction increases in comparison to the other direction, more time slots can be allocated to that and as it shrinks - it can be taken away.
Access Methods The RF spectrum is a finite resource and is shared between users using various multiple access methods, also referred to as multiplexing methods, which allow parallel transmissions. In general, multiple access methods are categorized into four groups [3]:
• Frequency Division Multiple Access (FDMA)
• Time Division Multiple Access (TMDA)
• Code Division Multiple Access (CDMA)
• Space Division Multiple Access (SDMA)
In practice, most communication systems use a combination of these multiplexing methods. Users of FDMA systems divide a frequency band allocated for a given system into narrow bandwidth channels where each user is assigned a specific frequency or frequencies for transmis- sion and reception. The receiver demodulates information from the desired channel and rejects neighboring channels. Fig. 2.4a shows an example FDMA system with three users. Chapter 2. Fundamentals of Wireless Communications 8
user 1 user 2 user 3 user 1
user 2
user 3
composite
frequency time (a) FDMA access technique (b) TDMA access technique
Figure 2.4: Multiple access techniques
In TDMA access method, time slots differentiate users who can either transmit or receive in their dedicated time slot. Time slots for N number of users are collected into a periodic frame, with N time slots per frame. Because TDMA data is transmitted in bursts, transmission for a given user is not continuous. Temporal synchronization between a TDMA transmitter and a receiver permits reception of a specific user’s time slot data by turning the receiver on and off at appropriate time instants. Fig. 2.4b shows an example TDMA system with 3 users. CDMA systems are either direct-sequence spread spectrum (DSSS), which use orthogonal or uncorrelated pseudorandom noise (PN) codes to differentiate signals which overlap in both frequency and time, or frequency hopping spread spectrum (FHSS), in which signals are ran- domly hopped about different portions of the available spectrum. FHSS technique is sometimes referred to as a separate access method: frequency-hopping multiple access (FHMA). In DSSS-CDMA, each user is assigned a unique pseudorandom code. A narrowband message is multiplied by a very large bandwidth PN spreading signal. In the receiver, a matched filter extracts a specific user’s signal. Due to independence of the codes, all other signals appear as noise to a given user. Space division multiple access (SDMA) techniques exploit information about the location of receivers in order to send information in the well-defined direction using sharp radio beams instead of radiating the signal in all directions. In this manner, radio resources (frequency channels, time slots or spreading codes) can be reused in a given area.
2.4 Origins of Variable-Envelope Signals
Having described basic concepts of wireless communications, it is instructive to identify the underlying causes of signal’s envelope temporal variations in wireless transmissions. The first and most obvious cause of envelope variations is the applied modulation format, which forces the magnitude a(t) of the complex envelope to vary. This can happen when the consecutive modulation symbols are situated opposite the origin of the I-Q plane, which leads to zero-crossings of the signal trajectory and to related rapid envelope changes. As an example, Fig. 2.5a shows a sample signal trajectory while the corresponding envelope is plotted in Fig. 2.5b. The envelope variations are apparent. They are strengthened by certain filtering applied to I(t)andQ(t) signals, whose purpose is to limit the frequency bandwidth occupied by the signal. Another category of variable-envelope signals are multi-level modulated signals. According to the Shannon theory (2.3), the use of such signals can improve the bandwidth efficiency. Since there is a lot of interest in increasing the channel capacity in modern wireless systems, multiple-level, variable-envelope signals are becoming a major class of AM-interferers. Chapter 2. Fundamentals of Wireless Communications 9
QPSK Trajectory 0.05
QPSK Envelope 0.025 0.06
0.05
Q 0 0.04
0.03 Envelope
−0.025 0.02
0.01
−0.05 0 −0.05 −0.025 0 0.025 0.05 0 200 400 600 800 1000 I Time (a) Signal trajectory (b) Signal envelope
Figure 2.5: Sample signal trajectory and the corresponding envelope
The next origin of envelope variations is associated with multipath propagation channels, which result in signal fading. Envelope variations caused by fading are usually much slower than those due to intrinsic modulation scheme properties. Duplex techniques, especially the time division duplex method, is yet another source of envelope variations. TDD duplex involves switching the transmitters on and off in a periodical manner, leading to burst like transmission and in effect to variable-envelope RF emissions. Time-varying envelopes arise also as side-effects of applied multiple access methods. Due to burst nature of transmission, TDMA-based systems are sources of signals with strongly varying envelopes. In case of CDMA access method, multiple users sharing simultaneously the same frequency channel by using uncorrelated codes inevitably generate composite signals, which can be represented as complicated multi-level modulated signals with considerable envelope variations. Finally, the FDMA access method also deserves attention. Although it does not introduce explicitly variable-envelope signals, it does lead to a situation in which the receiver picks up not only the wanted signal but also a strong interfering signal from a neighboring channel, which may be difficult to filter and at the same time may have a variable envelope. Thus, from the receiver’s viewpoint, FDMA access technique can be treated as a potential source of variable-envelope interferers. In practice, there are many wireless communication systems, which are sources of AM inter- ference. In the cellular GSM system, a TDMA access method employed leads to generation of AM blockers. Since the basic system utilizes a constant-envelope GMSK modulation, generated TDMA bursts have square wave envelopes. An advanced version of the GSM system - EDGE - utilizes 8PSK non-constant envelope, which results in bursts with more sophisticated envelope patterns. In CDMA systems like IS-95 or UMTS, the AM interference is generated due to non-constant- envelope nature of modulations. Similarly, orthogonal frequency divison multiplexing (OFDM) employed in various wireless local network systems as well as in digital broadcast systems gives rise to transmission of signals with significantly varying envelopes. References
[1] S. Haykin, Communication Systems. New York, NY: John Wiley and Sons, 2001.
[2] C. E. Shannon, “A mathematical theory of communication,” Bell System Technical Journal, vol. 27, pp. pp. 379–423 and 623–656, July and October 1948.
[3]T.S.Rappaport,Wireless Communications: Principles and Practice. Upper Saddle River, NJ: Prentice-Hall, 2001.
10 Chapter 3
Wireless Transceivers
3.1 General Considerations
In many communication systems, transmission of information has be to carried out in both directions. To achieve this, both ends of the radio channel should have transmitting and receiving capabilities. In such case, devices acting as both transmitter and receiver are referred to as transceivers. The quality of wireless transmissions is affected not only by the propagation channel but also by the properties of transmitting (Tx) and receiving (Rx) units. These in turn greatly depend on the chosen Tx/Rx architectures. It is therefore necessary to understand various transmitter and receiver topologies as well as their advantages and drawbacks. In addition, understanding the performance of transceiver building blocks, in terms of noise and nonlinearities, is crucial. In the context of this thesis, a thorough study of effects of even- order nonlinearities is especially important. This chapter addresses the above topics. Apart from showing trends in transceiver architec- tures, in particular increase in their integration scale, the challenges associated with reduction of the system component count are highlighted. Definitions of various transceiver performance metrics form a solid basis for a detailed study carried out later in the thesis, while characteriza- tion of even-order intermodulation distortion and subsequent calculation of specifications for its rejection in modern wireless receivers emphasize the importance of the research topic addressed in this dissertation.
3.2 Transceiver Architectures
3.2.1 Transmitter Architectures The role of a wireless transmitter is to send high frequency waveforms encoded with infor- mation signals. To perform this task, transmitters have to be built of several components per- forming distinct functions. A typical transmitter comprises baseband spectrum shaping filters, a modulator, a power amplifier (often preceded by an additional amplifier called a pre-driver), an RF filter and an antenna. Baseband filters are used to alter the shape of information signals so as to narrow their spectrum. A modulator encodes the information signal onto a carrier signal (also called a local oscillator - LO - signal), which in turn is generated by a frequency synthesizer comprising a voltage-controlled oscillator (VCO) stabilized by a phase-lock loop (PLL). In some transmitters, quadrature (i.e. shifted in phase by 90◦) LO signals are needed. Such signals can be generated using passive RC-CR network filtering method or by making use of master-slave flipflops. After Chapter 3. Wireless Transceivers 12
BB I BB I
RF IF RF
RF RF 0 0 PA MATCHING BPF BPF PA MATCHING 90 90 FILTER FILTER
1st LO
BB Q BB Q 2nd LO (a) Direct up-conversion transmitter (b) Two-step transmitter
RF
PHASE CHARGE PUMP RF FREQUENCY WITH PA MATCHING DETECTOR LPF FILTER REF VCO
MULTIMODULUS FREQUENCY DIVIDER
PHASE AMPLITUDE DATA DATA
DATA BB DATA FORMAT CONVERTER
(c) Polar transmitter
Figure 3.1: Transmitter architectures encoding the carrier signal with the information signal in a modulator, the resulting high- frequency modulated waveform is amplified by means of a power amplifier in order to compensate for the losses occurring during signal propagation. RF filtering is necessary to suppress unwanted out-of-band emissions generated by a transmitter. The antenna provides an interface between transmitter/receiver and free space. It can be considered as a matching circuit that matches the impedance of a free space to the output impedance of the RF filter. If a transmitter shares the same antenna as a receiver, which is often a case in small, mobile terminals, then the RF filtering task is carried out by means of a duplexer -asetoftwoRF filters, which isolate the receiver and transmitter from each other while providing a connection to the antenna for both. Duplexers can be constructed as RF switches to toggle the antenna connector back and forth between the receiver and the transmitter. Another technique is a three- terminal network, known as a diplexer, which consists of two filters with one common port. It allows simultaneous operation of the transmitter and the receiver, provided that transmission and reception frequencies are in different bands. What distinguishes various transmitter architectures is the implementation of a modulation function. From the canonical representation of real bandpass signals (2.1) it can be inferred that the simplest and most flexible way to generate RF modulated signal using any modulation format is to multiply two quadrature LO carrier signals by in-phase I(t) and quadrature-phase Q(t) baseband information signals and add the products together. Shown in Fig. 3.1a, the architecture realizing the above functions is called a direct up-conversion transmitter architecture [1]. The modulator consists of two quadrature mixers, which perform multiplication of baseband signals by the LO signal, effectively shifting the spectrum of the baseband signal to a band around the LO frequency. The architecture of Fig. 3.1a suffers from disturbance of the transmit local oscillator by the power amplifier. The problem arises since the power amplifier output is a waveform with Chapter 3. Wireless Transceivers 13 high power and a spectrum centered around the local oscillator frequency. If the VCO is not well isolated, the PA output signal may significantly corrupt the oscillator spectrum through mechanisms called ’injection pulling’ and ’injection locking’ [2]. The problem of LO pulling can be alleviated by using a direct-conversion transmitter with an offset LO [1]. An alternative approach is to upconvert the baseband signal in two (or more) steps so that the PA spectrum is far away from the frequency of the VCOs. An example of a two-step transmitter architecture is shown in Fig. 3.1b. The baseband I and Q channels undergo quadrature modulation to the intermediate frequency (IF) and the result is shifted to the final RF frequency with the second mixing stage. The disadvantage of this topology is that two band-pass filters are required, increasing the cost of the transmitter. The second representation of real band-pass signals (2.2) suggests another method of gen- erating modulated RF signals. Shown in Fig. 3.1c, baseband data stream can be mapped into phase and amplitude signals. The amplitude signal controls the instantaneous output power of the PA, while the phase data is applied to a PLL loop containing multimodulus prescalers usu- ally controlled by a delta-sigma modulator to vary the instantaneous frequency (or equivalently phase) of the VCO. The whole architecture is called a polar transmitter. It offers significant advantages as it allows to use nonlinear power amplifiers with high power efficiency. However, like in direct up-conversion transmitters, the issue of VCO pulling by the PA may be of con- cern. In systems utilizing constant envelope modulation only the phase modulating section of the polar transmitter can be used. Alternatively, offset-PLL transmitter architectures, being a combination of a direct modulator and a polar transmitter, can be employed [1].
3.2.2 Receiver Architectures The main task of wireless receivers is detection of the incoming desired modulated signals. To achieve this goal, wireless receivers have to perform several functions, including tuning to the wanted signal carrier frequency, filtering out the undesired signals present at the receiver input and amplification of the wanted signal to compensate for power losses occurring during transmission. In the receive path, preselect RF filters - either stand-alone or as part of duplexers - are used to suppress potentially large signals far outside of the desired signal band. They are followed by a low noise amplifier, which increases the amplitude of weak received signals for further processing. Its name stems from the fact that - for the reasons explained in the next section of this chapter - its noise contribution has to be as small as possible. RF signals are then translated down in frequency by mixers to an IF frequency because filtering of close-in undesired signals is easier at low frequencies. After channel selection filtering, the transmitted information is recovered. Receiver architectures can be classified into two major groups: heterodyne and homodyne receivers. The names are derived from the Greek roots hetero for different, homo for the same and dyne for power. A distinguishing feature is the value of the LO frequency in relation to the RF frequency of the desired signal.
Heterodyne Receivers The heterodyne receiver was for a long time a dominating receiver architecture in most wireless applications due to its superior selectivity and immunity to interfering signals. Its full name is actually superheterodyne, a shortened form of supersonic heterodyne, stressing the fact that an IF frequency lies above sound frequencies. A heterodyne receiver translates the desired input signal from the RF frequency to one or more preselected intermediate frequencies before demodulation [3]. A block diagram of the superheterodyne receiver with one intermediate frequency is shown in Fig. 3.2a. To avoid folding Chapter 3. Wireless Transceivers 14
RF IF BB
LPF
RF IR IF 0 LNA VGA FILTER FILTER FILTER 90
2nd LO
LPF 1st LO
(a) Superheterodyne receiver - architecture
PRF(f) 1
f
-fRF -fIMAGE fIMAGE fRF -fLO fLO
PIF(f) 2 PBB(f) 3
f f
-fIF fIF 0 (b) Superheterodyne receiver - spectra
Figure 3.2: Superheterodyne receiver of interfering signals residing on the other side of the LO frequency to the common IF frequency, a so-called image-reject (IR) filter is required in addition to the RF filter. The channel selection is performed by means of an IF filter having a fixed transfer characteristic. After additional amplification, the IF signal is shifted to baseband using a quadrature downconverter (Fig. 3.2b). The gain and phase quadrature mismatches are usually not important in this stage since the operating frequencies are low. Despite its superior performance, the superheterodyne architecture is not suitable for mono- lithic integration because of presence of several expensive and bulky RF/IF filters. Since the IF filter has a fixed passband, optimized for a given wireless system, separate filters are necessary for multi-mode operation. This translates into large area and cost because many components are necessary and signal routing becomes complicated. An external IR filter requires using a stand-alone LNA stage or additional pins for connecting output of an integrated LNA and input of an integrated RF mixer with the IR filter. Extra pins are also required for connection to an IF filter. Enforced by the trends to reduce the cost and size of the RF front-end, alternative heterodyne architectures have been proposed. For instance, IR filters can be removed by employing image- reject receivers based on Hartley or Weaver architecture but at the expense of additional power consumption [3]. Chapter 3. Wireless Transceivers 15
RF BB PRF(f) 1
LPF VGA
f
-fRF=-fLO fRF=fLO RF 0 LNA FILTER 90
PBB(f) 2
LPF VGA f
(a) Zero-IF receiver - architecture (b) Zero-IF receiver - spectra
Figure 3.3: Zero-IF receiver
Homodyne Receivers The homodyne receiver, also referred to as the zero-IF receiver or direct-conversion receiver (DCR), has gained a lot of interest due to its potential for low-cost and high integration level [4], [5], [6]. A zero-IF receiver translates the desired RF signal directly to baseband for information recovery. Fig. 3.3a shows its block diagram, while an example of signal spectra before and after demodulation is shown in Fig. 3.3b. The quadrature downconverter performs the same function as the last stage of the superheterodyne receiver (Fig. 3.2a), but it usually operates at substantially higher frequencies. The channel selection is done with low-pass filters, which are much easier to integrate than bandpass filters. The conceptually simple homodyne architecture presents a number of challenges, like gain and phase quadrature mismatches as well as undesired low-frequency distortion. However, the most notable imperfection in zero-IF receivers are DC-offsets. To reduce the impact of both low-frequency distortion and DC-offsets, the so-called low-IF receiver architecture can be employed [7], [8]. It can be viewed as a special case of the homodyne architecture, which downconverts to baseband two adjacent channels instead of only one. No image reject filters are needed so the low-IF architecture has the same benefits in terms of reduced component count as the standard homodyne architecture. Channel selection in low-IF receivers can be performed in two ways. In the first method, the mirror signal is first suppressed by means of complex passband filters, centered around the IF frequency, as shown in Fig. 3.4a. Such filters can be easily built from baseband prototypes using a polyphase filtering technique. After suppression of the mirror signal, the final downconversion can be performed by multiplication with a sine, which is usually carried out in the digital domain (Fig. 3.4b). The second downconversion stage does not require quadrature LO signals. Alternatively, a real baseband filter can be used to filter out all but adjacent channels (Fig. 3.4c). Next, a sophisticated quadrature mixing is carried out with four multipliers, an adder and a subtractor, which effectively calculates a real part of a product of two complex signals. Using this technique, spectrum of the complex IF signal is moved in one direction only, as shown in Fig. 3.4d. Final channel filtering is performed at baseband using real low-pass filters. The same technique has been applied in a so-called wideband-IF receiver [9]. The advantage of low-IF receivers in comparison to zero-IF receivers is that there is no DC- offset problem as it can be removed before the desired signal is shifted to DC. Low-frequency distortion is also attenuated. Chapter 3. Wireless Transceivers 16
RF IFIF BB PRF(f) 1 PIF(f) 2 PP BB VGA LPF FILTER
f f
-fRF fRF -fIF fIF RF 0 LNA -fLO fLO FILTER 90 PIF(f) 3 PBB(f) 4
PP BB VGA f f LPF FILTER -fIF fIF 0 (a) Low-IF receiver with a complex bandpass filter (b) Low-IF receiver - spectra
RF IFsin BB BB
LPF PRF(f) 1 PIF(f) 2 + LPF VGA -
f f
RF 0 -fRF fRF -fIF fIF LNA cos 90 FILTER -fLO fLO
PBB(f) 3 PBB(f) 4 + LPF VGA + LPF f f sin 0 0 (c) Low-IF receiver with a real baseband filter (d) Low-IF receiver - spectra
Figure 3.4: Low-IF receiver
The main challenge in a practical application of the low-IF receiver topology is the perfor- mance of image signal suppression, which can be insufficient due to I/Q imbalances. Additionally, if the channel selection is performed in the digital domain, high-performance analog-to-digital converters are needed to resolve a weak desired signal with sufficient number of bits while digi- tizing a strong mirror signal at the same time. Numerous papers showing implementations of a direct conversion concept for cellular appli- cations exist, clearly confirming the widespread interest in the homodyne architecture. Direct conversion receivers for the GSM system are documented e.g. in [10], [11], [12], [13], [14], [15]. Receiver implementations based on a direct conversion architecture for CDMA applications are shown in [16], [17], [18], while direct conversion receivers for WCDMA UMTS are presented for example in [19], [20], [21], [22], [23], [24], [25], [26]. Direct conversion architecture is also preferable for multi-mode solutions. Examples of dual-mode GSM-WCDMA receivers can be found in [27], [28], [29]. Due to entirely different system requirements of GSM and WCDMA standards, a low-IF topology is often preferred for GSM while a normal homodyne architecture is used for WCDMA.
3.3 Transceiver Performance Characterization
The quality of wireless transmissions is deteriorated by addition of unwanted signals in the radio channel. Apart from thermal noise added by the propagation channel and picked up by the receiving antenna, wireless transceivers add their own noise, further degrading the quality of processed signals. Besides, wireless communications is corrupted by various distortions caused by interferers interacting with transceiver circuit nonlinearities. Chapter 3. Wireless Transceivers 17
Transmitter Noise
Receiver
Interferer Power density Power
frequency
Figure 3.5: Scenario leading to the fundamental RF design challenge
Fig. 3.5 shows a commonly encountered scenario of a receiver receiving a weak signal from a distant transmitter simultaneously with a strong, unwanted interfering signal from another transmitter situated nearby the receiver. Since interfering signals in radio communications can be several orders of magnitude greater than the desired signal, designing a circuit that is able to detect the weak wanted signal and remove the strong interferer constitutes the major RF design challenge of combining low noise contribution with good linearity. To characterize an extent to which wireless transceiver circuits deteriorate signal quality, various parameters are used. Performance characteristics are divided into those related to noise and those associated with distortion due to nonlinearities of the transceiver building blocks. Two aspects are of interest: performance of each block within the transmit or receive chain and contribution from different building blocks to the overall noise and nonlinearity of the transmitter or the receiver. In practice, noise considerations are more important for the receive chain. On the contrary, characterization of nonlinear performance is important both for transmitters and receivers. On the transmit side, nonlinearities are responsible for generation of spectral components outside the transmitted signal band. If too large, such distortion may effectively raise the noise level detected by a nearby receiver. On the receive side, nonlinearities may produce spectral components within the desired signal channel by nonlinear processing of interferers. Again, if the power of interferers is too high, the distortion added by the transceiver may significantly corrupt reception of desired signal.
3.3.1 Noise Noise can be defined as any random interference unrelated to the signal of interest, as opposed to the deterministic interference phenomena like harmonic distortion and intermodulation. There are several types of noise generated within transceiver building blocks. Present in all circuits is thermal noise, generated by random motion of electrons in conductors. Thermal noise is generated by resistors, base and emitter resistance of bipolar devices, distributed gate Chapter 3. Wireless Transceivers 18
2 Vn
Noisy Noiseless - + 2 In Circuit Circuit
Figure 3.6: Representation of circuit noise by input noise generators resistance as well as channel resistance of MOSFETs. The power of thermal noise is proportional to the ambient temperature. Random vibrations of electrons have broadband spectral content, which is flat for up to roughly 1014 Hz, dropping at higher frequencies [30]. For the purposes of RF design, thermal noise can be therefore accurately modeled as a white (uniformly distributed in frequency) stochastic process. In addition to thermal noise, active devices may exhibit shot and flicker noise. Shot noise results from the quantized and random nature of current flow. Across a given potential boundary, current flow is quantized with a particular number of electrons or holes crossing the boundary at a given time. Thus, at any given instant the number of charged particles flowing across a boundary varies around some average value. Similarly to thermal noise, shot noise is a white stochastic process. Finally, flicker noise arises from random trapping of charge at the oxide- silicon interface of MOSFETs. Unlike thermal and shot noise, power spectral density of flicker noise is not flat but is inversely proportional to frequency.
Input-Referred Noise Noise of any two-port system can be modeled by two - in general correlated - input noise 2 generators (Fig. 3.6): a series voltage source and a parallel current source [30]. In is required even if the actual circuit does not generate any physical input noise current. Input referred noise gives a direct estimate of how much noise in a circuit corrupts signals passing through, since the amplitude of the noise can be directly compared to the amplitude of signals at the input.
Signal to Noise Ratio Information signals cannot be processed if the noise power added by the radio channel is larger than that of the received wanted signal. What’s more, communication systems require a desired signal to be sufficiently above the noise floor in order to recover information with a particular quality. In other words, a specific signal-to-noise ratio (SNR) is required to restore transmitted information. Formally, signal-to-noise ratio is defined as S SNR = (3.1) N where S denotes the wanted signal power while N is the total noise power. The required signal-to-noise ratio depends on several system parameters, including modula- tion scheme, applied coding scheme, propagation channel characteristics and distortion generated by transceiver circuitry.
Noise Factor and Noise Figure The signal-to-noise ratio is degraded as the signal is processed through the network, as shown in Fig. 3.7. To quantify such degradation, a parameter called noise factor is used. Chapter 3. Wireless Transceivers 19
G*SIN
SIN P P SNROUT
SNRIN G F*G*NIN NF G*NIN
NIN f f
Figure 3.7: Graphical interpretation of noise factor
For a given network, it is defined mathematically as the numeric signal-to-noise ratio at the input divided by the numeric signal-to-noise ratio at the output of the network SNR S /N F = IN = IN IN (3.2) SNROUT SOUT/NOUT where SIN is numeric input signal power, NIN is numeric input noise power, SOUT is numeric output signal power while NOUT is numeric output noise power. Since such defined quantity depends not only on the noise of the circuit under consideration but also on the input SNR, it is often specified for a predefined source resistance at a reference temperature (traditionally 290◦K) to avoid ambiguity. 2 2 Noise factor can be expressed in terms of input-referred equivalent noise sources Vn and In of a network as well as the source resistance RS as [30]
(V + I R )2 F =1+ n n S . (3.3) 2 VRS Degradation of signal-to-noise ratio can be also expressed by means of a noise figure param- eter, defined as noise factor converted to dB
NF = 10 log(F )[dB]. (3.4)
Cascaded Noise Factor Receiver systems are typically configured by cascading several indi- vidual devices together (Fig. 3.8). In the receive path, the signal-to-noise ratio degrades in each consecutive block. From a system perspective, it is mandatory to evaluate the noise performance of the combined, multi-stage system, based on the noise performance of individual devices. Expression for the noise factor of cascaded stages F TOTAL can be derived using the concept of available power gain of a device, defined as the power that the circuit would deliver to a conjugately matched load divided by the power that the source would deliver to a conjugately matched circuit. Furthermore, noise factors of each stage relative to the output resistance of the preceding stage have to be calculated [30]. For k stages, the total system noise factor F TOTAL can be expressed as
F2 − 1 F3 − 1 Fk − 1 F TOTAL = F1 + + + ... + , (3.5) G1 G1G2 G1G2 ···Gk−1 where Fi denotes the noise factor of the i-th stage (with respect to the source resistance driving that stage), while Gi denotes the available gain of the i-th stage. Chapter 3. Wireless Transceivers 20
G1 G2 Gk ... NF1 NF2 NFk
Figure 3.8: Cascaded noise figure
Equation (3.5) indicates that noise factors of preliminary stages contribute more to system noise factor than the following stages. As such, the first few stages in a cascade are the most critical. Furthermore, contribution of each stage to the system noise factor decreases as the gain of the preceding stages increases. Conversely, if a stage is lossy (exhibits attenuation), then the noise factor of the following circuits is amplified when referred to the input of that stage.
Minimum Detectable Signal The receiver noise factor is an important parameter in determining the weakest signal that the system can process. This translates directly into a maximum distance from the transmitter where communication is possible. The output noise power of a receiver, being a function of the noise factor, noise equivalent bandwidth (integrated transfer function of a receiver divided by its passband gain) and receiver gain, can be expressed as
NOUT = FkT0BG (3.6)
After setting the source temperature to a reference value of 290◦K, (3.6) can be converted to dBm as NOUT[dBm] = −174dBm + 10 log B + NF[dB] + G[dB] (3.7) The input referenced noise floor can be calculated by subtracting the system gain in dB from the output noise floor, giving a so-called minimum detectable signal level
MDS[dBm] = −174dBm + 10 log B + NF[dB] (3.8)
The minimum detectable signal determines the input signal level required to deliver the output signal equivalent to the output noise floor. This noise floor is directly proportional to bandwidth. To lower the receiver’s system noise floor, the equivalent noise bandwidth needs to be as narrow as possible without filtering out portions of the desired signal. As higher data rate systems require more bandwidth for a given modulation scheme, the minimum detectable signal is higher for such systems.
Sensitivity Sensitivity is defined as the minimum signal level required for a particular quality of received information. For digital radios, quality is measured by the bit error rate. Since a specific signal- to-noise ratio is required for a given bit error rate, sensitivity can be viewed as the absolute power level that gives the required signal-to-noise ratio. Sensitivity is computed based on the minimum detectable signal (MDS) and the required signal-to-noise ratio (SNR) as
Sens[dBm] = MDS[dBm] + SNR[dB] (3.9) Chapter 3. Wireless Transceivers 21
PP
RF IF f f
LO P
f
Figure 3.9: Reciprocal mixing
Phase Noise Oscillators in transceivers are used to generate reference signals - called local oscillator (LO) signals - for modulation/demodulation purposes. The LO waveforms are not ideal - various noise sources in the oscillator circuitry lead to amplitude and phase variations. Amplitude variations are usually unimportant since frequency generation circuits often use some form of amplitude limiting. By contrast, phase variations play an important role by deteriorating trans- mission/reception quality. The LO signal can be represented in the time domain as LO(t)=A cos ωLOt +Φn(t) . (3.10)
The function Φn(t) is called phase noise [30],[31]. It can be viewed as the modulating signal that results in sidebands forming a noise spectrum. Noise sidebands appear on both sides of the carrier frequency. Typically, phase noise is characterized in the frequency domain in terms of dBc/Hz (amplitude level referenced to a 1-Hz bandwidth relative to the carrier) at a given offset frequency from the carrier frequency and denoted as L(Δf). Phase noise in transceivers is responsible for a phenomenon called reciprocal mixing.When using the LO signal for mixing with the received signal, the oscillator spectrum is convolved with that of the mixer input signal, which may contain blocker signals. After the convolution, the downconverted blocker signals contain phase noise. If a small desired signal and a large undesired signal nearby in frequency are input to the mixer, the phase noise of the larger downconverted signal may mask the smaller desired signal as shown in Fig. 3.9. The noise level in the wanted signal band caused by reciprocal mixing can be calculated as
Pn,rec mix[dBm] = Pblocker[dBm] + L(Δf) + 10 log B, (3.11) where Pblocker is the blocker level, Δf is the offset between the blocker and the wanted signal frequencies while B denotes the wanted signal bandwidth. In the above equation, it has been assumed that the phase noise is constant across the wanted signal band. If the phase noise profile of the blocker varies substantially within the band of the wanted signal, then integration of the phase noise profile must be carried out to calculate the reciprocal mixing noise level correctly. Chapter 3. Wireless Transceivers 22
3.3.2 Nonlinearity Nonlinear systems are defined as those that do not obey a rule stating that if
y1(t)=SL[x1(t)], y2(t)=SL[x2(t)], (3.12) where SL[ · ] is a signal operator representing a system, then
k1y1(t)+k2y2(t)=SL[k1x1(t)+k2x2(t)] (3.13)
Since according to this definition systems having output finite constant signals are treated as nonlinear, which is not a particularly convenient statement, a modification is often made by not taking into account such signals in the above definition at all. To study the effects of nonlinearities, only time-invariant, memoryless nonlinear systems are considered [30]. For such systems, excited with a signal x(t), the output signal can be expressed using a Taylor series expansion as:
2 3 y(t)=a1x(t)+a2x (t)+a3x (t)+... (3.14) where a1 represents a linear (small-signal) behavior of the system while coefficients a2, a3,etc. describe its nonlinearity.
Harmonics If a sinusoid is applied to a nonlinear system, the output contains frequency components that are integer multiplies of the input frequency. In (3.14), for x(t)=A cos(ωt) and assuming nonlinearities up to third order only, the output signal is
2 2 3 3 y(t)=a0 + a1A cos(ωt)+a2A cos (ωt)+a3A cos (ωt) 2 3 a2A a3A = a0 + a1A cos(ωt)+ 1+cos(2ωt) + 3 cos(ωt)+cos(3ωt) 2 4 a A2 3a A3 a A2 a A3 = a + 2 + a A + 3 cos(ωt)+ 2 cos(2ωt)+ 3 cos(3ωt). 0 2 1 4 2 4 (3.15)
In the above equation, a term with the input frequency is called the fundamental and while higher-order terms are called harmonics. The nonlinear performance of a system excited with a single tone can be described using the total harmonic distortion (THD) parameter, which is defined as N 2 n=2 Vfn THD = (3.16) Vf1 − where the number of harmonic components taken into account is N 1, Vf1 denotes the fun- damental while Vfn denotes the n-th order harmonic. The THD is usually given in percentage points. In weakly nonlinear circuits, the second- and third-order harmonics dominate. For highly nonlinear circuits, more harmonics have to be taken into account. The usefulness of the THD parameter is often limited since if the transfer function of a system is frequency selective (as often happens in practice), higher-order harmonics are filtered out and the calculated THD value does not reflect how nonlinear the system really is. Chapter 3. Wireless Transceivers 23
ideal 20 log Aout
1dB real
20 log Ain
1dB CP
Figure 3.10: Gain compression
Gain Compression
The assumption of system’s linearity, when the small-signal gain a1 parameter satisfactorily describes system’s transfer function, holds only for sufficiently small input signal levels. As the amplitude of the input signal increases, the output signal increases linearly only until power of distortion products substantially combines with the fundamental output power. Then, the effec- tive gain of the system begins to vary. Although it may initially either decrease or increase, at sufficiently high input levels all practical systems exhibit gain compression because the available output power is finite. To quantify the effect, a parameter called 1dB compression point (1dB CP) is used. It is defined as the input signal level, at which the output signal level drops by 1dB compared to a perfectly linear device (Fig. 3.10). For systems described by nonlinearities up to third order, the effective gain is
3 G = a + a A2, (3.17) 1 4 3 where A is the amplitude of the input signal. The gain variation is evident because of the 2 presence of 3a3A /4 term. In this case, a3 must be negative so that the power conservation law is fulfilled. The output is then a compressive function of the input and the 1dB compression point can be calculated as [30] 4|a1| A1dB = 0.11 . (3.18) 3|a3|
For strongly nonlinear systems, which have to be described by nonlinearities of the order higher than 3, the 1dB compression gain parameter reflects the impact of higher order harmonics, which may appear suddenly e.g. due to saturation when a signal is increased above a certain level.
Desensitization
As explained above, large input signals cause gain reduction of systems having compressing characteristics. If such systems simultaneously process a weak, desired signal along with a strong interferer, an effect called desensitization occurs [32]. Chapter 3. Wireless Transceivers 24
ideal blocker level 20 log Aout
Gain [dB]
1dB actual blocker level
ideal small-signal gain n dB
actual small-signal gain
20 log Ain
1dB CP
Figure 3.11: Desensitization
The effect can be analyzed by assuming that the input signal is represented as a sum of two sinusoids x(t)=AS cos(ωSt)+AL cos(ωLt). The output then is 3a A3 3a A A2 y(t)= a A + 3 S + 3 S L cos(ω t)+... (3.19) 1 S 4 2 S
For AS << AL, the above equation can be simplified to 3a A2 y(t)= a + 3 L A cos(ω t)+... (3.20) 1 2 S S
Thus, the gain of the small-signal depends on the level of the large-signal. If a3 < 0, the effective gain of the small signal decreases. For sufficiently high AL, the small-signal gain drops to 0 and the small signal is said to be blocked. Desensitization can be quantified by means of an n-th dB desensitization level, describing level of a large blocking signal at which small signal gain drops by n dB (Fig. 3.11). For n =1 and mildly nonlinear devices (represented by linear term and nonlinear coefficients up to third order only), the following relation holds:
Desensitization − An=1dB = A1dB 3dB. (3.21)
To avoid confusion, n = 2 case is often used as it leads to approximately the same values for Desensitization both 1dB compression point and desensitization level. A non-obvious relation A2dB = A1dB is a direct consequence of the nonlinear nature of the system, which responds differently to signals having different levels.
Overloading Overloading is another large-signal effect, which has to do with the processing of a strong desired signal. It occurs due to a finite value of supply voltage, which limits fundamentally the maximum signal that can be processed linearly. Overloading is specified as the largest desired signal the receiver can handle while maintaining a specific reception quality metric (e.g. BER for systems processing digitally modulated signals). It depends on the 1dB CP of the receiver. Gain control in RF and baseband section of the receiver can be used to improve its overloading performance. Chapter 3. Wireless Transceivers 25
P P
f f
f1 f2 2f1-f2 f1 f2 2f2-f1
Figure 3.12: Third order intermodulation distortion
Intermodulation Distortion Intermodulation distortion (IMD) occurs when signals other than single pure sinusoids are applied to a nonlinear system. In such a case, the output contains in general components that are not harmonics of the input frequencies. Such distortion products arise from multiplication of different frequency tones when their sum is raised to a power greater than unity. The phenomenon can be examined by considering the input signal being a sum of two sinusoids x(t)=A1 cos(ω1t)+A2 cos(ω2t). Assuming nonlinearities up to third order, the output is y(t)=a + a A cos(ω t)+A cos(ω t) + a A cos(ω t)+A cos(ω t) 2 0 1 1 1 2 2 2 1 1 2 2 3 + a3 A1 cos(ω1t)+A2 cos(ω2t) . (3.22)
The right side of (3.22) contains the following fundamental components: 3a A3 3a A A2 ω ,ω : a A + 3 1 + 3 1 2 cos(ω t) 1 2 1 1 4 2 1 3a A3 3a A A2 + a A + 3 2 + 3 2 1 cos(ω t) (3.23) 1 2 4 2 2 and the following intermodulation products: ω1 ± ω2: a2A1A2 cos (ω1 + ω2)t + a2A1A2 cos (ω1 − ω2)t (3.24) 3a A2A 3a A2A 2ω ± ω : 3 1 2 cos (2ω + ω )t + 3 1 2 cos (2ω − ω )t (3.25) 1 2 4 1 2 4 1 2 3a A2A 3a A2A 2ω ± ω : 3 2 1 cos (2ω + ω )t + 3 2 1 cos (2ω − ω )t (3.26) 2 1 4 2 1 4 2 1
Products at ω1 ± ω2 result from second-order nonlinearity (described by the coefficient a2)and are referred to as second-order intermodulation distortion (IMD2). Products at 2ω1 ± ω2 and 2ω2 ± ω1 result from third-order nonlinearity (described by the coefficient a3) and are called third-order intermodulation distortion (IMD3). Second-order distortion products at ω1 − ω2 are problematic mainly in homodyne receivers. On the other hand, third-order intermodulation products residing at 2ω1 − ω2 and 2ω2 − ω1 are troublesome in all practical receivers since interferers closely spaced to the desired signal may generate distortion products which fall in the band of interest as illustrated in Fig. 3.12. Third order distortion is also troublesome in transmitters, causing a so-called spectral regrowth [33]. Chapter 3. Wireless Transceivers 26
20 log Aout
1 n 1 1
20 log Ain
N-th Order Input Intercept Point
Figure 3.13: N-th order intercept point
N-th Order Intercept Point A useful metric of the n-th order intermodulation distortion performance of a system is the n-th order intercept point. It is calculated from measurement results of a two-tone test in which the amplitude A of each tone is equal and small enough so that nonlinear terms of order higher than n are negligible. As the amplitude A increases, fundamental components increase in proportion to A while n-th order intermodulation products increase in proportion to An. Plotted on a logarithmic scale, the magnitude of the fundamental response vs the input signal level follows a 1dB/1dB slope while the magnitude of the intermodulation products follows a ndB/1dB slope, as illustrated in Fig. 3.13. The input(or output)-referred n-th order intermodulation intercept point (IPn) is defined as the horizonal (or vertical) coordinate of the intersection of extrapolated lines. For a given level of input signals and a corresponding level of intermodulation products, the input-referred IPn can be calculated as [33]
P [dBm] − P [dBm] IIPn[dBm] = P [dBm] + IN IMDn , (3.27) IN n − 1 where PIN is the input signal level and PIMDn is the level of n-th order intermodulation distortion referred to the input. In particular, for second and third order intercept points the following relations hold IIP2[dBm] = PIN[dBm] + PIN[dBm] − PIMD2[dBm] (3.28) P [dBm] − P [dBm] IIP3[dBm] = P [dBm] + IN IMD3 (3.29) IN 2
Cascaded N-th Order Intercept Point For a cascade of nonlinear devices as shown in Fig. 3.14, a corresponding cascaded n-th intercept point can be used as a performance metric of n-th order intermodulation distortion. To compute it, intercept points and power gains of each device have to be known. Since in general the phases of intermodulation distortion products generated in any stage and those passed from its input are unknown, a worst-case case assumption is made, in which all distortion products add in phase. Chapter 3. Wireless Transceivers 27
G1 , IPn1 G2 , IPn2 Gk , IPnk
...
Figure 3.14: Cascaded intercept point
With some algebraic manipulation it can be shown that the total numeric n-th-order input intercept point IIPnTOTAL is [33]
− 1 q q q q q 1 G1 G1G2 G1G2 ···Gk−1 IIPnTOTAL = + + + ... + , IIPn1 IIPn2 IIPn3 IIPnk (3.30) where q =(n − 1)/2andGi is the square of the linear gain of an i-th device. Equation (3.30) indicates that if each stage in a cascade has a gain greater than unity, the nonlinearity of the latter stages becomes more significant.
Cross Modulation Distortion Cross modulation is a nonlinear phenomenon manifesting itself through the transfer of am- plitude modulation of one signal onto another signal due to odd-order nonlinearities. If the input signal is expressed as x(t)=AS cos(ωSt)+AL 1+m(t) cos(ωLt), then the output is 3 y(t)= a + a A2 1+2m(t)+m2(t) A cos(ω t)+... . (3.31) 1 2 3 L S S
Equation (3.31) clearly shows that a distorted version of the AM modulation of the signal at ωL has been transferred to the carrier at ωS. A common case of cross modulation arises in transceivers where both the transmitter and the receiver operate simultaneously, for instance in full-duplex CDMA transceivers. Due to finite isolation of the diplexer, transmitter leakage signal is detected by the receiver. If there is an additional interferer picked up by the receiver of at least moderate level, significant cross modulation distortion is generated [34].
Dynamic Range Dynamic range is a useful signal level range the receiver can process with a particular in- formation quality. Mathematically, it can be defined as the difference in power level between the 1dB compression point and the system noise floor, both referred either to input or output. Since the system noise floor referenced to the input is simply the minimum detectable signal, the input-referred dynamic range is calculated as
DR[dB] = CP1dB,IN[dBm] − MDS[dBm] = CP1dB,IN[dBm] + 174dBm − 10 log B − NF[dB] (3.32) Receiver dynamic range is sometimes modified from the above definition by using sensitivity instead of MDS on the low end. Such definition gives a value lower than (3.32) by an amount equal to the required signal-to-noise ratio. Chapter 3. Wireless Transceivers 28
Spur-Free Dynamic Range
Spur-free dynamic range is the difference between the output fundamental power and the output noise power when the distortion products are equal to the output noise floor. Considering only third order intermodulation distortion, the spur-free dynamic range can be calculated from (3.8) and (3.29) as 2 2 SFDR[dB] = IIP3[dBm] − MDS[dBm] = IIP3[dBm] + 174dBm − 10 log B − NF[dB] 3 3 (3.33) Spur-free dynamic range can be defined in a similar way for second-order intermodulation dis- tortion (obviously the corresponding equation for SFDR will be different), although its usefulness is limited since in practice fundamental and second-order distortion products are significantly separated in frequency and either of those tones is usually heavily attenuated.
Spurious Responses
Spurious responses are undesired responses at IF frequency to signals at the input of the receiver that occur at RF frequencies (called spurious frequencies) that are different from the desired receive frequency. Any input signal with a frequency fIN that satisfies the following relationship for any integers m and n may result in a spurious response
±fIF = ±mfIN ± nfLO (3.34) where fIN is the input frequency, fLO is the LO frequency, and fIF is IF frequency of the desired signal. The most common spurious responses are the image, half-IF and LO spurs. Image is a spurious response resulting from the RF interferer at a frequency (called the image frequency) described by (3.34) with integers m and n equal to unity. In heterodyne receivers, the image response interferes with the reception of the desired signal. For protection from this spur, the image frequency must be attenuated before downconversion to IF using an image-reject RF filter. Alternatively, wideband-IF, Hartley or Weaver image-reject receiver architectures must be employed. In homodyne receivers, the image problem does not exist because the image frequency coincides with the wanted signal frequency, i.e. the wanted signal is at the same time its image. Another spur of particular importance is the half-IF spurious response in which (m, n)is either (2, −2) or (−2, 2). This occurs at fIN =(fRF +fLO)/2, midway between the desired input RF frequency and the frequency of the LO. If the signal at such frequency is much larger than the wanted RF signal, it may significantly hinder the reception of the desired signal. There are two possible causes for a half-IF response. First situation is if the interfering signal is subject to second-order distortion and the LO contains a second order harmonic. In this case, the second harmonics of both the interferer and the LO will mix together and generate a response at an IF frequency. The second possible cause is if the fundamental of the interferer mixes with the fundamental of the LO and the resulting product, situated at fIF/2, is subject to second-order distortion. In both cases, second-order nonlinearity plays an important role in half-IF generation mechanisms. LO spurious responses result from mixing the LO harmonics with interfering signals spaced one IF away either above or below each LO harmonic. To protect the receiver from LO spurs, RF bandpass filtering is necessary before downconversion. Chapter 3. Wireless Transceivers 29
Self-Quieters
Self-quieters are internally generated interfering signals, typically coming from the digital section of transceivers. Common sources are clock distribution networks transmitting square wave signals having substantial power in higher order harmonics as well as buffers driving dig- ital lines connected to the transceiver chip. Since some of the harmonics may fall within the RF passband of the transceiver, they may interfere with the desired signal. As higher clock frequencies are introduced into communications equipment, lower order harmonics of the clock signal with more power may fall into the RF passband, augmenting the interference. The name of this kind of distortion stems from the operation of audio FM demodulators, whose output audible noise drops down when they lock on to some input signal with a well defined frequency. In other words, it can be said that the FM receiver is quieted upon injection of some inband tone. If such undesired tone is present together with a weak wanted signal, the receiver may not be able to lock on to the desired signal but to the interferer only. For digital receivers, the only evidence of a self-quieter is an increased bit error rate on the self-quieted channels. To protect against self-quieters, clock shifters can be used to shift the clock harmonic out of the RF passband for specific channels. Another technique is rounding-off the clock’s square edges in order to reduce the power contained in higher order harmonics.
3.4 Even Order Distortion in Wireless Receivers
Even-order nonlinearity is an important RF imperfection in all wireless receivers. In hetero- dyne receivers, it manifests itself through half-IF spurious responses, whose generation has been explained in the previous section. Careful frequency planning, including proper selection of the IF frequency, is required to protect the receiver from such distortion. In homodyne receivers, even-order nonlinearity is responsible for low-frequency even-order intermodulation distortion, which effectively increases the noise floor of the direct conversion receiver. Such distortion can be reduced by sufficient filtering of interferers before they reach the nonlinear components of the RF front end. However, highly selective RF filtering is not welcome in modern transceivers. For this reason, even-order distortion becomes a major RF design challenge, necessitating its thorough analysis in order to find efficient methods of its mitigation. In many practical wireless receivers, downconversion mixers are main contributors to even- order distortion. This is due to the fact that low-frequency even-order distortion products generated in the LNA are normally filtered out by AC coupling or bandpass filtering between the LNA and the downconversion mixer whereas lowpass filtering at the mixer-baseband interface suppresses level of interferers entering the analog baseband section. An in-depth study of the underlying mechanisms of even order distortion in downconversion mixers is carried out in the next chapter. In this section, a classification of even order distortion characterization techniques in wire- less receivers is presented. Two description approaches are studied: classical two-tone charac- terization and continuous spectra characterization, the latter being more suited for predicting distortion generated by interferers with an arbitrary modulation. Additionally, even-order non- linearity specifications for two distinct cellular systems are derived. Although the dissertation tries to keep all considerations relating to the topic of even-order intermodulation distortion as general as possible, it is instructive to derive IP2 specifications for some common wireless standards to show what is the order of required second-order intercept points in practice. Chapter 3. Wireless Transceivers 30
3.4.1 Two-Tone Characterization A classical characterization of even-order distortion performance of a receiver is based on performing a two-tone intermodulation test and determining a second-order intermodulation intercept point (IP2) from powers of fundamental and intermodulation product tones. Such ap- proach assesses the even-order distortion performance by means of second order intermodulation products only. This is sufficient in case of receivers designed as intentionally weakly nonlinear circuits since in such devices the second-order terms typically dominate the even-order distortion for input signal levels up to the compression point. In a two-tone characterization test, a signal given by vin(t)=AC cos(ω1t)+cos(ω2t) , (3.35) where ω1 and ω2 are the angular frequencies while AC is the amplitude of each tone, is injected to a device under test (DUT) and a response at an angular frequency Δω = |ω1 −ω2|, corresponding to the second-order intermodulation distortion is measured. The level of the intermodulation tone at Δω is then used to determine IIP2 of the circuit. Tone spacing must be selected in such a way that the IMD2 product lands within the band normally occupied by the downconverted desired signal. The presented characterization method is suitable in practice for direct-conversion receivers only. It allows to rapidly evaluate the even-order nonlinear performance of receivers, although at the expense of a simplified model of a true input excitation.
3.4.2 Continuous Spectra Characterization In most practical wireless communication systems, the worst-case interferers generating even- order distortion are not two-tone type but variously modulated blockers with time-varying en- velopes resulting either from TDMA burst transmission, employed I-Q waverform filtering or from applied bandwidth efficient multi-level modulation schemes. In general, the power spec- tral density of the second-order intermodulation distortion due to such interferers does not depend only on their power level. Therefore, although the two-tone technique represents the industry standard in intermodulation distortion characterization, alternative distortion analysis techniques are desirable to predict amount of distortion generated by arbitrary interferers. One such analysis approach is called continuous spectra characterization [35], reflecting the fact that communication signals composed of one or more carriers modulated by aperiodic in- formation signals possess band-limited continuous spectra. As pointed out in the introductory chapter, I-Q and envelope-phase representations of real band-limited signals are equivalent, i.e. s(t)=I(t) cos(ωct) − Q(t)sin(ωct)=a(t)cos ωct + φ(t) , (3.36) where the signal envelope a(t) is related to the in-phase I(t) and the quadrature-phase Q(t) component as a(t)= I2(t)+Q2(t) . (3.37) The goal of the continuous spectra characterization is to understand the nature of the mod- ulated blocker, specifically its non-constant envelope a(t), and relate it to the resulting second- order intermodulation distortion signal. A corresponding effective IIP2 parameter can be then calculated based on the estimated effective distortion power. Upon excitation of a nonlinear block containing second-order nonlinearity in its transfer function with a bandpass signal s(t), the following distortion signal is generated: 2 a2(t) a s2(t)=⇒ a a(t)cos ω t + φ(t) = a 1+cos 2ω t +2φ(t) . (3.38) 2 2 c 2 2 c Chapter 3. Wireless Transceivers 31
Constant Envelope AM DSB SC
0 f 0 f (a) Constant envelope interferer (b) AM DSB SC interferer AM Modulated
0 f (c) AM modulated interferer
Figure 3.15: Relations between various interferers and second-order distortion
In wireless receivers, only low-frequency beat is important because high frequency components are removed during low-pass channel-select filtering. Therefore, the following second-order dis- tortion component remains: a2(t) IMD2 (t)=a . (3.39) LPF 2 2 From the above equation it can be concluded that the low-frequency part of second order in- termodulation distortion can be viewed as a scaled version of the squared envelope of the input signal. Moreover, it can be noticed that phase information included in the input signal plays no role with respect to low-frequency second order distortion. Looking at the second order intermodulation distortion by means of the squared envelope concept allows to predict second order intermodulation distortion in a unified fashion for var- ious modulated interferers. Below, 3 cases of differently modulated interferers are studied to demonstrate the proposed distortion description technique.
Constant Envelope Interferers In case of constant-envelope interferers, the function a(t) is obviously a constant. From (3.39) it follows that the resulting second order distortion is also a constant A2 a(t)=A =⇒ IMD2 (t)=a C = const, (3.40) C LPF 2 2 as shown in Fig. 3.15a. In other words, constant-envelope interferers are sources of DC offset only.
Two-tone Interferers The IQ signal representation of a two-tone signal (3.35) - also called an AM double-sideband suppressed carrier (AM DSB SC) signal - is Δω ω + ω I(t)=2A cos t , Q(t)=0,ω = 1 2 , (3.41) C 2 c 2 while the envelope-phase representation, more suitable for IMD2 considerations, is Δω π Δω ω1 + ω2 a(t)=2AC cos t , φ(t)= sgn cos t − 1 , ωc = . (3.42) 2 2 2 2 Chapter 3. Wireless Transceivers 32
QPSK Trajectory (Roll−Off Factor=0.2) QPSK Trajectory (Roll−Off Factor=0.5) 0.05 0.05
0.025 0.025
Q 0 Q 0
−0.025 −0.025
−0.05 −0.05 −0.05 −0.025 0 0.025 0.05 −0.05 −0.025 0 0.025 0.05 I I
(a) QPSK Trajectory for roll-off factor=0.2 (b) QPSK Trajectory for roll-off factor=0.5
QPSK Trajectory (Roll−Off Factor=0.8) 0.05
0.025
Q 0
−0.025
−0.05 −0.05 −0.025 0 0.025 0.05 I
(c) QPSK Trajectory for roll-off factor=0.8
Figure 3.16: QPSK signal trajectories for various roll-off factors
From the envelope-phase representation (3.42) and equation (3.39) it follows that low-pass filtered second-order intermodulation distortion generated by the two-tone interferer is 4A2 cos2 Δω t IMD2 (t)=a C 2 = a A2 1+cos(Δωt) . (3.43) LPF 2 2 2 C Thus, two tone interferers produce both a DC offset component and a second-order intermodula- tion distortion component at frequency Δf (see Fig. 3.15b), as expected from classical two-tone characterization considerations.
Arbitrarily Amplitude Modulated Interferers For an arbitrarily amplitude modulated signal, whose envelope can be represented as a(t)=AC 1+m(t) , (3.44) where |m(t)| < 1 is a zero-mean function modeling the time-varying portion of the envelope, the low-pass filtered second order distortion is A2 IMD2 (t)=a C 1+2m(t)+m2(t) . (3.45) LPF 2 2 Chapter 3. Wireless Transceivers 33
−3 x 10 QPSK Envelope Power Spectral Density 1 Roll−Off Factor = 0.2 0.9 Roll−Off Factor = 0.5 Roll−Off Factor = 0.8 0.8
0.7
0.6
0.5
0.4 Power Density 0.3
0.2
0.1
0 0 2000 4000 6000 8000 10000 12000 14000 16000 Frequency [MHz]
Figure 3.17: QPSK envelope power spectral densities for various roll-off factors
2 Apart from a DC offset component a2AC/2, time-varying distortion is generated, as shown in Fig. 3.15c. An exact spectrum of second-order distortion depends on the nature of the m(t) function. If m(t) is a deterministic signal, the spectrum of low-frequency second order intermodulation distortion is a sum of a DC component, scaled spectrum of m(t)andself- convolution of the spectrum of m(t) (which can be shown by invoking the theorem relating multiplication in the time domain to convolution in the frequency domain and applying it to the squaring operation in (3.45)). If m(t) is a random stationary process, the IMD2 power spectral density depends on the statistics (autocorrelation function) of m(t). It must be stressed that IMD2 spectrum is related to the input signal’s envelope, not the input signal itself. To illustrate the continuous spectra characterization approach, three QPSK modulated sig- nals have been generated with three different roll-off factors of the root-raise cosine (RRC) filter used in the modulator: 0.2, 0.5, 0.8. As can be seen in Fig. 3.16, trajectories of QPSK signals in these three cases differ. Noting that the instantaneous value of the signal envelope a(t) is equal to the absolute value of the [I(t),Q(t)] vector, it is easy to see that the envelopes in the discussed cases possess different AM behaviors. This observation is reinforced by examining shapes of the corresponding QPSK envelope power spectral densities shown in Fig. 3.17. The higher the value of the roll-off factor, the wider the raise-cosine filter band. Consequently, higher frequency components are attenuated to a lesser extent, allowing the signal envelope to vary more quickly. Sharper trajectory edges in Fig. 3.16 are the indication of faster envelope variations in the time domain, while power spectral density peak situated at higher frequency serves as an indication of the same behavior in the frequency domain. Equation (3.45) suggests that signals with different envelope power spectral densities create IMD2 with different baseband spectral content. Signals with more rapidly varying envelopes should produce IMD2 having higher power densities at higher frequencies. Fig. 3.18a confirms this supposition. Power spectral density of IMD2 induced by the QPSK signal with a higher roll-off factor has its maximum situated at a higher frequency. Apart from different shapes of IMD2 power spectra, the total IMD2 power (integrated from 2kHz - to exclude contribution of a DC offset component - to 8MHz) differs as well. To un- derstand why, it is instructive to study the power statistics of the signals under consideration, which are represented by the complementary cumulative distribution function (CCDF) [36]. The Chapter 3. Wireless Transceivers 34
IMD2 Power Spectral Density Complementary Cumulative Distribution Function 2 −20 10 Roll−Off Factor = 0.2, Power = −24dBm −30 Roll−Off Factor = 0.5, Power = −25.5dBm Roll−Off Factor = 0.8, Power = −25.5dBm 1 10 Roll−Off Factor = 0.2 −40 Roll−Off Factor = 0.5 Roll−Off Factor = 0.8 −50 0 10 −60
CCDF [%] −1 −70 10
Power Density [dBm/kHz] −80
−2 10 −90
−100 0 2000 4000 6000 8000 10000 12000 14000 16000 −15 −10 −5 0 5 10 15 Frequency [MHz] Instantaneous Power − Mean Power [dB] (a) IMD2 power spectral densities (b) CCDFs
Figure 3.18: IMD2 power spectral densities and CCDFs of QPSK signals
CCDF provides information about how often (in terms of probability) the instantaneous power (which is related directly to the instantaneous envelope) exceeds the mean power. From the plot of CCDF it is possible to read the peak-average power ratio (PAPR) of the signal (called also a crest factor). As seen in Fig. 3.18b, the QPSK modulated signal with a 0.2 RRC roll-off factor has a significantly higher PAPR value than signals with 0.5 and 0.8 roll-off factors. It produces also more second-order distortion. The differences are not huge but indicate a certain regularity: if the crest factor of a signal is higher, so is the power of second-order intermodulation distortion it generates.
3.4.3 IP2 Requirements for Cellular Systems
Although continuous spectra characterization is useful in predicting the amount of distortion generated by arbitrarily amplitude-modulated blockers, linearity of the analog part of the radio front-end is usually optimized during circuit design stage and later verified during measurements by means of standard two-tone tests. Therefore, IP2 requirements should be formulated for a two-tone characterization technique. In order to overcome the difficulties arising from potential differences in effective low-frequency IMD2 powers between interferers with arbitrary AM modulation and two-tone interferers, a cor- rection factor Kmod has to be introduced, which relates distortion power generated in the classical two-tone test with distortion power generated by an amplitude-modulated interferer defined in appropriate receiver test cases. Such correction factor can be defined as
Kmod[dB] = IMD2two tone[dBm] − IMD2actual[dBm] , (3.46) where IMD2two tone and IMD2actual are the IMD2 power levels at the output of a system under consideration induced by two-tone and actual interferers, respectively, under the assumption of equal total input interferer powers. The correction factor Kmod can be estimated by means of system level simulations carried out with appropriately modulated interferers. IP2 specifications are derived from the condition that the worst-case output in-channel second order intermodulation distortion power must be well below the output in-channel noise level in order not to desensitize significantly the receiver, as graphically illustrated in Fig. 3.19. For example, IMD2 power 15dB below the noise floor causes sensitivity degradation of around 0.1dB while IMD2 power 10dB below the noise floor yields already 0.4dB of desensitization. Chapter 3. Wireless Transceivers 35
P SNR
Noise Level
IMD2 f
Figure 3.19: IMD2 level translating into IP2 requirement
The required IIP2 can be calculated by means of the following equation IIP2spec[dBm] = 2 Pin max[dBm] − 3dB − IMD2in max[dBm] + Kmod[dB] , (3.47) where Pin max[dBm] is the total maximum specified interferer input-referred power level, while IMD2in max[dBm] is the maximum allowable input-referred distortion level. Kmod denotes the previously defined correction factor, which depends on a modulation type of the interferer.
GSM The IIP2 requirement for GSM receivers is derived from the AM suppression test case, as described in section 5.2 of [37]. The standard requires that the receiver sensitivity performance in terms of specific bit and frame error rates must be met even with an AM modulated interferer having a total power level of -29dBm. The specified reference sensitivity level of the GSM system is -102dBm. Since the equivalent −3 noise bandwidth of the system is roughly BGSM = 200kHz and the SNR required for 10 BER is 9dB, the maximum allowable noise figure of the whole receive chain (from the antenna connector to the receiver output) is
− − NFGSM,max = SensGSM + 174dBm 10 log BGSM SNRBER=10−3 = 10dB (3.48) and the corresponding worst-case minimum detectable signal is:
MDSGSM,worst case = −174dBm + 10 log BGSM + NFGSM,max = −111dBm. (3.49)
If the -29dBm blocker was a two tone interferer and the wanted signal at a reference sensitivity level was considered, then allowing 0.4dB of desensitization (maximum output IMD2 level 10dB below the output noise level) the resulting IIP2 requirement would be 57dBm. However, the AM suppression test case considers a different level of the wanted signal and a different type of the interferer. The desired signal level is 3dB above the reference sensitivity level. This means that the IMD2 distortion power can be as high as the noise power for the required SNR or - more appropriately in this case - the signal-to-noise-plus-distortion ratio of 9dB. The interferer is specified as residing at a frequency offset of at least 6MHz from the wanted signal but being an integer multiple of 200kHz and at least 2 channels separated from any identified spurious response. It is a TDMA, GMSK modulated signal with only one time-slot active and a burst power of -29dBm. The interferer bursts are synchronized to but delayed Chapter 3. Wireless Transceivers 36
a) t
b) t
c) t
Figure 3.20: AM suppression test case in GSM between 61 and 86 bit durations relative to the bursts of the wanted signal, as shown in Fig. 3.20a and in Fig. 3.20b. The envelope of the interferer can be approximated by a square wave (Fig. 3.20c). System level simulations indicate that within the time interval of the wanted signal burst a corresponding correction factor KmodTDMA is roughly 1dB. Therefore, the actual IIP2 requirement is IIP2spec[dBm] = 2 −29dBm − 3dB − −111dBm + KmodTDMA[dB] = 46dBm. (3.50)
In [38], the same IIP2 requirement of 46dBm is reported but it has been obtained using a different calculation approach. The presented Rx IIP2 requirement is quite high and is easier to fulfill when using a low-IF receiver architecture than a standard zero-IF receiver since a significant part of IMD2 distortion is then filtered out.
UMTS The IIP2 requirement for the UMTS system is derived from those test cases, which describe AM modulated interferers. In the specifications for a UMTS WCDMA receiver performance, two major modulated blockers are presented in test cases 7.3.1 and 7.6.1 [39], as shown in Fig. 3.21. The first test case specifies the required sensitivity level for 10−3 BER, which must be achieved even in case of a transmitted uplink signal (UL) being at maximum power level (+ 24dBm) at antenna. Assuming 2dB duplexer loss and 50dB of Tx-Rx isolation, this translates to -24dBm interferer level at the input of the Rx LNA. The latter test case describes an unwanted modulated -44dBm blocker at 15MHz offset from the desired signal, which is 3dB above the reference sensitivity. The specified UMTS reference sensitivity level is -117dBm. It corresponds to a 12.2kbps channel, which can be recovered from noise with a spread-spectrum processing gain of GP = 25dB [40]. Since the equivalent noise bandwidth of the system is roughly BUMTS =3.84MHz and the SNR required for 10−3 BER is 7dB, the maximum allowable noise figure of the whole receive chain is
− − NFUMTS,max = SensUMTS + GP + 174dBm 10 log BUMTS SNRBER=10−3 = 9dB (3.51) and the worst-case minimum detectable signal (after despreading) is:
− − MDSUMTS,worstcase = SensUMTS + GP SNRBER=10−3 = 99dBm. (3.52) Chapter 3. Wireless Transceivers 37
• Transmitter leakage
• Modulated DL blocker
From VGA I TX
TX
LNA 1 LNA 2 0 90
VGA Q
Figure 3.21: Receiver test cases determining IIP2 requirements for UMTS system
In the UMTS system, both downlink and uplink signals can be composed of several code channels and can have a high crest factor resulting in large variations in the signal envelope. System-level simulations show that the PAPR of the Tx leakage interference is 3.1dB, whereas the PAPR of the downlink blocker is 8.4dB [41], which is close to the crest factor of additive white Gaussian noise equal to about 10dB. The effective second order distortion powers in these two cases differ because of this PAPR discrepancy. The Tx leakage requires a correction factor KmodTx =7.7dB, while the downlink blocker KmodDL = −2.9dB [41]. Assuming 2dB of duplexer loss and allowing 0.4dB of desensitization (maximum output IMD2 level 10dB below the output noise level), the IIP2 requirement (at the LNA input) for the Tx leakage test case can be then calculated as IIP2spec[dBm] = 2 −24dBm−3dB − −99dBm−2dB−10dB+KmodTx[dB] = 49dBm. (3.53)
This value translates to 51dBm IIP2 at the antenna input. If the allowed desensitization is only 0.1dB, the required IIP2 value rises by 5dB. In case of the DL blocker test case, the allowed output IMD2 level is equal to the output noise level. A corresponding IIP2 requirement is only IIP2spec[dBm] = 2 −44dBm − 3dB − −99dBm + KmodDL[dB] =8dBm. (3.54)
Therefore, the IIP2 requirement is determined in practice by the Tx leakage interference. Its fulfillment is tough, especially when no RF filter removing the Tx interference is present in the Rx chain. Similar IIP2 requirements for UMTS receivers have been derived in [42], while [43] provides a whole range of required second-order intercept points, depending upon uplink activity, which results in various values of the correction factor KmodTx. The dependence of effective IMD2 dis- tortion on the structure of a UMTS signal is studied in [44], where is is shown that the difference between second-order intermodulation power between single-channel case and multichannel case approximated by a Gaussian stochastic process is as large as 6.5dB. Closed form expressions for the level of second-order distortion as a function of the number of active uplink code channels are reported in [45]. References
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Downconversion Mixers
4.1 General Considerations
Mixers are central building blocks in wireless transceivers. They have the prime function of shifting signal spectra from one frequency band to another, where specific functions like transmission, amplification, filtering and detection can be performed more effectively. Frequency translation is achieved by multiplying a processed signal (called the input signal) by another, locally generated signal (called the local oscillator - or LO - signal). Recalling from signal theory that multiplication in the time domain is equivalent to convolution in the frequency domain, obtaining a non-distorted but frequency shifted copy of the input signal spectrum requires to use periodic LO signals having spectra consisting of pure harmonics. Typically, a multiplier symbol is used to represent a mixer, as shown in Fig. 4.1, which also illustrates the effects of multiplication of signals in the frequency domain. For sine input and LO signals given by IN(t)=A cos(ωINt)andB cos(ωLOt), respectively, the following equation can be written: AB OUT(t)=IN(t)LO(t)= cos (ω − ω )t +cos (ω + ω )t . (4.1) 2 IN LO IN LO The output signal contains frequency components - called mixing products - situated at both sum and difference of the input and LO signal frequencies, implying that multiplication always leads to down-conversion (mixing product at ωIN − ωLO) and up-conversion (mixing product at ωIN + ωLO). A desired signal can be obtained by proper filtering of the mixer output signal. Although operation of the mixer is essentially based on multiplication, two major differences exist between mixers and standard multipliers. First, mixers have two distinct, often not in- terchangeable inputs: an input for a processed signal and an input for a local oscillator signal. The LO signal has only a supporting function of periodically varying the transfer function of the device and thus allowing to shift the spectrum of a processed signal. Secondly, unlike normal multipliers for which frequency shifting of signals is only a side effect, mixers are optimized to perform frequency translation in the most efficient manner. Depending on a type of the LO signal, mixers are referred to as either linearly multiplying mixers or switching mixers. Linearly multiplying mixers perform multiplication of two signals having physical meaning, for instance two voltages. A term linear reflects the fact that increas- ing a value of either of these signals increases proportionally values of the mixing products. Switching mixers, on the other hand, multiply a physical input signal by a dimensionless signal, which can be well approximated by a square wave. Such operation can be accomplished by using switching (commutating) elements whose state depends ideally only on a polarity of a physical LO signal. Chapter 4. Downconversion Mixers 43
IN(t) OUT(t)
IN(f)
LO(t)
f OUT(f)
-fIN fIN
LO(f) f
-fIN-fLO -fIN+fLO fIN-fLO fIN+fLO
f
-fLO fLO
Figure 4.1: Primary mixer function: frequency translation
In receivers, downconversion mixers link together the low-noise amplifier, the local oscillator and the IF (or baseband) stage. The input port of downconversion mixers is called the RF port, which senses an output signal of the LNA. The output port is traditionally called the IF port, even if the mixer is used in a homodyne receiver where the output desired signal occupies the baseband. Downconversion mixers often limit dynamic range of receivers. As they normally consist of many more components (active or passive) than low noise amplifiers, their noise contribution is significant, in spite of positive gain of the LNA. At the same time, they have to be able to process much stronger signals than low noise amplifiers due to amplification provided by the latter. For the same reason, mixers are prime sources of intermodulation distortion within the receiver, including second-order intermodulation distortion. Because of interrelations between the downconversion mixer and each of the blocks it is connected to, its design and optimization - in terms of noise, linearity and power consumption - is difficult. Nonetheless, being aware of design tradeoffs between the mixer and adjoining components is crucial to achieve an optimum receiver performance. Treating the mixer as a stand-alone element in the receive chain is certainly not the right design approach. This chapter provides a classification of mixer architectures. Moreover, mixer performance is characterized in terms of conversion gain, noise and intermodulation distortion, taking into account periodic time variant nature of devices constituting the mixer. Furthermore, a detailed analysis of second order intermodulation distortion in downconversion mixers is carried out.
4.2 Mixer Architectures
Mixers can be implemented using any nonlinear device (by exploiting its second order non- linearity for effective multiplication of RF signal with LO signal) or a multiplying component. In order to compare various mixers and analyze their common features, it is reasonable to categorize them into groups. The first type of classification divides mixers into unbalanced and balanced structures; within balanced two categories are distinguished: single-balanced and double-balanced mixers. Another classification divides mixers into passive and active circuits. Chapter 4. Downconversion Mixers 44
OUT(t)
OUT(t)
SW1(t) SW2(t) SW1(t) SW1(t) SW2(t)
IN(t) INDC + in(t) INDC -in(t) (a) Single balanced mixer (b) Double balanced mixer
Figure 4.2: Balanced mixers
4.2.1 Unbalanced and Balanced Mixers Simple downconversion mixers may produce many spectral components, some being po- tentially much larger than the wanted response. For this reason, linearity requirements of the following receiver stages may be difficult to fulfill. Fortunately, some of such undesirable spurious responses can be eliminated by using special mixer architectures. With respect to handling port-to-port signal feedthrough, mixers can be categorized into 3 groups:
• unbalanced mixers
• single balanced mixers
• double balanced mixers
Unbalanced downconversion mixers have poor both RF port to IF port and LO port to IF port isolation. Since the LO signal is usually the strongest signal in the receiver, poor LO-to-IF isolation means that a strong unwanted signal appears at the mixer output. Similarly, strong interferers may leak to the mixer output as a result of poor RF-to-IF isolation. In order to suppress port-to-port feedthrough and relax linearity requirements of the following receiver stages, so-called balanced mixer architectures can be used. To understand the operation of balanced mixers, idealized switching behavioral models are considered, as shown in Fig. 4.2. The differential output signal of a single balanced mixer is given by OUT(t)=IN(t) SW1(t) − SW2(t) . (4.2)
The unipolar LO switching functions SW1(t)andSW2(t) can be expressed with the following equations: 1 2 1 SW1(t)= + sin(ωLOt)+ sin(ωLOt)+... 2 π 3 1 2 1 SW2(t)= − sin(ω t)+ sin(ω t)+... (4.3) 2 π LO 3 LO
By subtracting SW2(t)fromSW1(t), the DC terms 1/2 are cancelled and RF-to-IF feedthrough is eliminated. Chapter 4. Downconversion Mixers 45
The LO-to-IF feedthrough can still exist if the input signal IN(t) contains a DC component. However, it can be suppressed in certain cases by using a double balanced mixer structure, whose operation is shown in Fig. 4.2b. The double balanced mixer can be viewed as a set of two single balanced mixers, whose RF input ports are driven with signals having opposite polarities while differential output signals are subtracted from each other due to cross coupling of the output ports. If the input DC signal is only common mode, the output signal of a double balanced mixer can be written as: 4 1 OUT(t)= INDC + in(t) sin(ωLOt)+ sin(ωLOt)+... π 3 4 1 − IN − in(t) sin(ω t)+ sin(ω t)+... . (4.4) DC π LO 3 LO
From (4.4) it can be concluded that all components at the LO frequency and its harmonics are removed from the IF output of the mixer. Although the double balanced architecture does not remove the LO-to-IF feedthrough in case of a differential input DC component, usually such component is much smaller than the common mode DC signal. Thus, the double balanced architecture is certainly useful in practical applications. Balanced mixer configurations not only eliminate certain port-to-port signal feedthrough but also feature improved immunity to coupling-based distortion by utilizing differential signal lines (for LO signal in single-balanced structures and both RF and LO signals in double-balanced designs). This fact makes balanced mixers a preferred choice in integrated circuit applications. The presented balanced mixer analysis showed perfect cancellation of RF-to-IF and LO-to-IF feedthrough. In reality, however, mismatches between differential signal paths degrade the ideal balanced behavior.
4.2.2 Passive and Active Mixers With respect to circuit implementation, mixers can be divided into two basic classes: passive and active. Classification is based on whether a given mixer circuit dissipates standby power or not.
Passive Mixers Passive mixers are implemented with components which do not dissipate standby power. Most passive mixers operate as switches clocked by the local oscillator, commutating the RF signal - typically in the voltage domain - and thus effectively realizing its multiplication by the LO signal. Both unbalanced and balanced passive mixer configurations are possible [1]. Examples of passive mixer architectures based around passive FET switches are shown in Fig. 4.3. Instead of FET switches, diode-based switches can be used as well. The main advantage of passive mixers is that they do not consume static power. Unfortu- nately, mixing action always induces a net loss in power between input and output. This makes it challenging to maintain a low noise figure along the entire receive signal path. On the other hand, linearity performance of passive mixers tends to be very good due to this net signal atten- uation [2], although real switches are in fact non-linear resistors. Another passive mixer issue is associated with the amplitude of the local oscillator signal. To ensure low ON switch resistance, large LO amplitudes are required, which may be difficult to achieve at high frequencies of the local oscillator without consuming a considerable amount of power from the LO driver. Chapter 4. Downconversion Mixers 46
IF+ LO+ LO-
RF+ RF-
LO LO- LO+
RF IF IF- (a) Unbalanced mixer (b) Double balanced mixer
Figure 4.3: Examples of passive mixers
RL RL RL
IF+ IF- IF
LO LO+ LO-
RF RF
(a) Unbalanced mixer (b) Single balanced mixer
Figure 4.4: Examples of active mixers
Active Mixers
Active mixers dissipate standby power because of the fact that they utilize a preamplify- ing transconductance stage, which requires some biasing current to function properly. Mixing operation in performed in the current domain by passing the RF current through a network of switches driven by the local oscillator, as shown in Fig. 4.4. Just like passive mixers, active mixers can be built in unbalanced, single balanced or double balanced configurations [3], [4], [5].
The most important feature of active mixers is that a positive signal gain may be achieved between the input and output of the mixer, reducing the contribution of the IF/BB stage to the overall receiver noise figure. However, addition of a preamplifying stage to the mixing network means that the number of noise sources in the receiver path increases. Moreover, whole or part of the input transconductor biasing current flows through the switching network, increasing sig- nificantly noise contribution of the switches in comparison to the switches in passive mixers. In CMOS implementations, a flicker noise component of the switches becomes remarkably prob- lematic. Thus, the effective improvement of receiver noise figure is smaller than predicted by only considering reduction of IF/BB stage noise contribution. Chapter 4. Downconversion Mixers 47
RL RL
IF+ IF-
LO+ LO- LO+
RF+ RF-
VB
Figure 4.5: Classic CMOS Gilbert cell type mixer
Gilbert Cell Mixer Gilbert cell mixers are double balanced active current commutating mixers. The architec- ture is based on the four-quadrant linear multiplier which was first presented in [6] in bipolar technology. A standard CMOS equivalent implementation is shown in Fig. 4.5. A fully differential input amplifier consisting of a tail current source and two transistors forming a differential pair converts an input voltage signal to a differential current signal which is fed to the switching network. Differential pairs in the switching stage route their tail currents to either of the outputs according to the value of the local oscillator voltage signal. The output differential current is converted back to voltage using load resistors. Various modifications can be made both to the input stage and the load stage resulting in the so-called Gilbert-cell-like mixers [7],[8]. The common feature is the presence of differential input transconductor and four current commutating switches in double balanced configuration. The Gilbert cell architecture is most widely used in radio frequency integrated circuits. The differential input stage allows to handle voltage signals two times larger than in case of single- ended input mixers. Excellent cross-talk performance (port-to-port isolation) is achieved by differentially feeding both the LO and the RF signals. The absence of strong LO port to IF port feedthrough reduces significantly linearity requirements of the IF/BB stage in comparison to single-balanced or unbalanced mixer topologies. The noise contribution of the LO generation circuitry is also decreased.
Low-Voltage Architectures Modern radio frequency transceivers implemented fully in CMOS technologies have to oper- ate under low supply voltages because high-speed MOS transistors required for radio frequency applications have very thin gate oxide which can be easily damaged if applied voltage exceeds a breakdown value. As gate oxide thickness decreases with technology scaling, breakdown voltage decreases simultaneously, necessitating the supply voltage to scale down as well. In order to maintain reasonable performance of downconversion mixers despite low voltage operation, conventional Gilbert cell architecture has to be replaced with some modified topology. To increase the available voltage headroom, a so-called pseudodifferential input stage can be Chapter 4. Downconversion Mixers 48
RL RL
IF+ IF-
LO+ LO- LO+ VB
LO+ LO- LO+ IF+ IF-
RL RL RF+ RF- RF+ RF-
(a) Voltage mode output mixer (b) Folded cascode mixer
IF+ IF-
LO+ LO- LO+
RF+ RF-
(c) Opamp based current mode output mixer
Figure 4.6: Low voltage mixer architectures used which doesn’t contain a tail current source, as depicted in Fig. 4.6a. By removing the tail current source, odd-order nonlinearity is improved simultaneously because the saturation mechanism caused by the tail current is eliminated. Unfortunately, the common mode rejection ratio (CMRR) is degraded together with the even-order nonlinearity. Further savings in voltage headroom can be achieved by a current boosting technique as described e.g. in [9]. The technique reduces voltage drop across load resistors by decreasing the amount of biasing current flowing through them and the switching network. This is accomplished by using additional current sources coupled to the drains of the input stage transistors. Another approach is to utilize an input stage with current reuse as described e.g. in [10],[11]. Similarly to the current boosting approach, the amount of biasing current flowing through the load resistors and thus the static voltage drop are decreased. Additionally, the effective input stage transconductance (and thus the mixer gain) can be significantly increased in comparison with the traditional input stage for the same biasing current consumption. Yet another technique uses AC coupling between the input stage and the switching stage [12], allowing to reduce the number of devices stacked between voltage supply and ground. However, inductors are required to cause resonance and thus allow current signal flow to the switches. As inductors occupy a lot of chip area, they make this solution quite expensive. A very good overall performance at low supply voltage can be obtained by utilizing a so- called current mode output architecture. Two versions, based on a folded cascode topology and a fully differential opamp topology, are shown in Fig. 4.6b and in Fig. 4.6c, respectively. In this case the output current signal is in principle driven into a low impedance node, thereby producing negligible voltage swings at the output of the switching stage. In both cases, care has to be taken to provide sufficiently low impedance not only at baseband but also at frequencies corresponding to the blocking signals. This is more difficult to achieve with opamp based circuit configuration due to its inherent speed limitations. Chapter 4. Downconversion Mixers 49
LO+ LO-
IF+ IF- VB
LO- LO+ RF+ RF-
Figure 4.7: Active LV mixer with passive switching stage
The current mode output architecture improves switching stage linearity and allows to avoid output voltage signal clipping, which occurs in traditional resistively loaded mixers at high mixer input signal levels. Accordingly, the overall mixer linearity is limited by the input stage. Mixers shown in Fig. 4.6b and in Fig. 4.6c suffer from poor noise performance because of additional current sources in the load stage, often placed within a common mode feedback loop in order to set a well defined common mode voltage at the mixer output. This drawback can be significantly reduced by using a current mode architecture with a passive switching stage as shown in Fig. 4.7. In this topology, passive switches generate negligible noise of any kind while the low frequency noise component (flicker noise) of the current sources is up-converted. Both folded-cascode and opamp-based current mode output mixers convert the output cur- rent back to voltage in the mixer-BB interface. The opamp-based solution enables higher gain and better large signal linearity in comparison to the folded-cascode approach, because output voltage signal can swing almost rail-to-rail, i.e. it may vary between ground and VDD without clipping. It should be noted, however, that baseband signal processing can be based also on current mode filtering. In such a case, folded cascode or opamp can be replaced with a current buffer having low input impedance. Other low voltage mixer architectures, not based on Gilbert cell mixer topology, have also been published. A very interesting example, called a switched transconductor mixer, is described in [13].
4.3 Mixer Performance Characterization
The general transceiver performance characterization presented in the previous chapter needs to be extended in case of mixers to encompass frequency conversion effects. In this section, various mixer-specific performance parameters are defined, including conversion gain as well as single-sideband (SSB) and double-sideband (DSB) input-referred noise densities. A brief overview of cyclostationary noise modeling is given and periodically time-variant nature of mixer nonlinearities is discussed. Finally, mismatch-related mixer issues are described, including gain and phase imbalance in IQ (de)modulators as well as DC offsets and second order intermodu- lation distortion products. Due to its importance for the main subject of the research, a very detailed analysis of mixer second order distortion is carried out in a separate section. Chapter 4. Downconversion Mixers 50
4.3.1 Conversion Gain Downconversion mixers process signals from RF input port to IF output port, changing both level and frequency of the signal of interest. To account for this frequency translation, a term conversion gain is used in contrast to gains of linear amplifiers and is denoted as CG: OUT CG = IF (4.5) INRF where OUT and IN represent magnitudes of either voltage or current signals in the output frequency band and input frequency band, respectively. Since most practical mixers operate in switching mode, it is desirable to quantify the con- version gain of such mixers. To simplify the analysis, an idealized switching mixer is considered, i.e. it is assumed that the time needed by the switches to turn on and off is infinitely small. In case of unbalanced mixers, switches in the ON state allow the signal to pass from the input port to the output port, while in the OFF state they do not allow such transmission. In case of balanced mixers, switches commutate the input signal from RF port to either branch of the balanced output. In both cases, the switching action can be modeled mathematically as a multiplication of an input signal IN(t) by an ideal periodic square wave signal. For unbalanced mixers, the periodic square wave toggles between 0 and 1 while for balanced mixers the square wave toggles between −1and1. A square wave signal toggling between 0 and 1 with 50% duty cycle has the following Fourier series expansion ∞ 1 + 2 sqw(t)= + sin (2k +1)ω t (4.6) 2 (2k +1)π LO k=0 while a square wave toggling between −1 and 1 with 50% duty cycle can be expressed as: ∞ + 4 sqw(t)= sin (2k +1)ω t (4.7) (2k +1)π LO k=0 The conversion gain of the mixer can now be found by multiplying the periodic square wave by the input signal IN(t). Assuming that the input signal is a sinusoid, i.e. IN(t)=cos(ωRFt), the output signal is found to be: ∞ 1 + 2 OUT(t)= + sin (2k +1)ω t cos(ω t) 2 (2k +1)π LO RF k=0 2 1 1 = cos (ω − ω )t + cos (ω + ω )t + ... (4.8) π 2 RF LO 2 RF LO for unbalanced mixers and ∞ + 4 OUT(t)= sin (2k +1)ω t cos(ω t) (2k +1)π LO RF k=0 4 1 1 = cos (ω − ω )t + cos (ω + ω )t + ... (4.9) π 2 RF LO 2 RF LO for balanced architectures. From the above equations, the switching mixer conversion gain is found to be: 1 CG = =⇒ CG ≈−10dB (4.10) unbalanced π unbalanced,dB Chapter 4. Downconversion Mixers 51 for unbalanced mixers and 2 CG = =⇒ CG ≈−4dB (4.11) balanced π balanced,dB for balanced mixers. The above values are maximum achievable conversion gains for unbalanced and balanced mixers, provided that the fundamental component of sqw(t) is used for downconversion. In practice, those gains are always smaller because of finite switching time of the mixer switches. However, the discrepancy between the ideal model and reality can be made insignificant by using various circuit techniques like LO signal buffering, which enhances the speed of the switches. It is also noteworthy that -4dB conversion gain applies to double balanced architectures, if the conversion gain is defined as a magnitude ratio of the differential output signal to the differential input signal. In some very high frequency applications, higher order harmonics of the LO signal are used for mixing [14], [15]. Called harmonic mixers, such devices always offer smaller conversion gain than traditional mixers exploiting fundamental harmonic, but may be the only choice if it is too difficult to generate the LO signal having very high fundamental frequency. As can be seen from the above derivation, the term conversion gain is a little bit misleading, since the switching action always results in signal attenuation. In order to achieve positive net gain, additional pre- or post-amplifying stages are required. For example, in Gilbert cell mixers, an input stage transconductor together with output load resistors provide an additional signal gain so that the overall mixer conversion gain can be written as: 2 A = g R (4.12) CG π m L
By choosing appropriate values of the input stage transconductance gm and the output load resistance RL, a mixer with a positive net voltage gain can be designed.
4.3.2 Noise Analysis of noise in mixers is a challenging task due to the fact that the generated noise has time-varying statistics. There are two reasons for that. First, the operating points of active devices change in time according to the large LO signal drive. Second, the signal transfer function from the point at which noise is generated to the output can be time varying. Because operating points of mixer active devices change periodically with time, noise is said to exhibit cyclostationary statistics. To describe such noise, time-varying power spectral density (PSD) S(f,t) has to be used, which is a function of both frequency and time. Within the mixer, various devices contribute different amount of noise to the output. More- over, mixer noise generation mechanisms are more complex than in case of other transceiver building blocks. In particular, a so-called noise folding mechanism constitutes an important issue associated with noise in mixers, especially switching type mixers. This phenomenon has to do with multi-tone LO signals, for example square wave like LO signals, and is explained graphically in Fig. 4.8. Both input noise as well as internally generated noise are multiplied by each LO harmonic separately. Powers of the resulting products are added at the mixer output since noise components shifted in frequency from various bands are uncorrelated. The most important consequence of noise folding is the increased noise contribution of the mixer stages preceding the switching stage to the overall output noise in comparison with mixing based on a single harmonic LO signal. In order to explain analytically noise generation phenomena in switching mixers and find out how each component contributes to the overall output noise, an active CMOS mixer is studied. The analysis follows the methodology presented in [16]. Chapter 4. Downconversion Mixers 52
Power Density
IF RF LO 2LO 3LO Frequency
Figure 4.8: Noise folding in mixers
Let inRF denote the noise generated by the input stage transistor. It is assumed to be a white, wide sense stationary (WSS) process with PSD
2 SnRF(f)=4kTγgmRF +4kTrgRFgmRF, (4.13) where gmRF is the transistor transconductance, k is Boltzmann’s constant, T is the absolute temperature, rgRF is the parasitic gate resistance and γ coefficient, associated with the transistor channel thermal noise, equals 2/3 for long-channel transistors but can be significantly higher for submicron devices [17]. Flicker noise component of the input stage transistor is neglected, as it is upconverted by the mixing operation of the switching pair and thus becomes insignificant in downconversion applications. The noise contribution of the input stage transistor to the differential output of the switching pair is
out inRF(t)=inRF(t)sw(t), (4.14)
out where sw(t) denotes the mixer switching function. The current inRF is a cyclostationary process and its time-average power spectral density can be written as ∞ out 2 − SnRF(f)= swn SnRF(f nfLO), (4.15) n=−∞
out where swn are the Fourier coefficients of sw(t). The time-average PSD SnRF(f) is sufficient out to describe the transconductor noise inRF as long as a transfer function of any receiver block out following the switching stage is not synchronized with the variation of SnRF(f,t) with time [18]. Equation (4.15) can be interpreted using Fig. 4.8. The noise coming from the transconductor is folded from frequency bands around harmonics of the LO signal. Contribution of the noise around a particular LO harmonic to the output noise depends of the power of that harmonic. Since inRF is white, SnRF(f)=SnRF = const and the following equation holds ∞ out 2 SnRF(f)=SnRF swn = αSnRF (4.16) n=−∞ where ∞ 1 TLO α = sw 2 = sw2(t)dt (4.17) n T n=−∞ LO 0 Chapter 4. Downconversion Mixers 53 represents the power of the switching function sw(t). In case of ideal switching mixers, whose sw(t) functions are perfect square waves, parameter α equals 1, which means that in terms of power density the noise generated in the input stage is transferred to the output without any attenuation. Noise generated by the switching stage transistors is transferred to the output through a completely different mechanism. At first, only a thermal noise component is considered. Assuming that the switches operate in saturation during the time they are on and neglecting parasitic capacitive effects as well as finite output conductance of the input stage, when one of the switches is off, the current flowing to the output is determined by the input stage and the switching pair does not contribute to the output noise. It doesn’t mean that the switch is noiseless. Simply, the charge conservation law forces the switch source potential to change to such a value that the total current flowing through the switch equals the current forced by the input stage. During the switching time interval, both switching transistors are on and have time-varying transconductances gmLO1(t)andgmLO2(t). The small-signal transconductance G(t) of the whole switching pair from the differential input voltage to the differential output current can be found from the condition that the sum of currents flowing through the switches must be equal to the current flowing through the input stage. It can be shown that
g (t)g (t) G(t)=2 mLO1 mLO2 . (4.18) gmLO1(t)+gmLO2(t)
The instantaneous contribution of the switch drain current thermal noise to the differential output noise is indLO(t)= vndLO1(t) − vndLO2(t) G(t)=vndLO(t)G(t), (4.19) where vndLO1(t)andvndLO2(t) are the equivalent switching transistor input-referred noise volt- ages, whose PSD values are 4kTγ/gmLO1(t)and4kTγ/gmLO2(t), respectively. Since these volt- ages are not correlated, the PSD of vndLO(t)is 1 1 SndLO(f,t)=4kTγ + . (4.20) gmLO1(t) gmLO2(t)
Thus, the differential output noise PSD can be written as
out 2 SndLO(f,t)=SndLO(f,t)G (t)=8kTγG(t) (4.21) and its time-average is TLO out 1 SndLO(f)=8kTγ G(t)dt =8kTγG. (4.22) TLO 0 The noise generated by the switch parasitic gate resistances is transferred to the output as
ingLO(t)=vngLO(t)G(t), (4.23) where vngLO(t) is assumed to be white, WSS process with PSD SngLO(f)=2· 4kTrgLO = 8kTrgLO, where rgLO is the parasitic gate resistance of each switch. Consequently, ingLO(t)isa cyclostationary process with time-average PSD ∞ out 2 − SngLO(f)= Gn SngLO(f nfLO). (4.24) n=−∞ Chapter 4. Downconversion Mixers 54
Since vngLO(t) is white, the above expression can be simplified to ∞ out 2 2 SngLO(f)=SngLO Gn = SngLOG . (4.25) n=−∞ Another switch noise component is flicker noise, which can be modeled as a voltage source in series with the gate. Its PSD is given by [17] K 1 SnflLO(f)=2 , (4.26) WswLswCox f where Wsw and Lsw are width and length of each switching transistor, respectively. The contribution of the flicker noise to the output noise PSD is the same as of parasitic gate resistances. However, since flicker noise is not white and (4.26) yields negligible values at high frequencies, its contribution can be calculated based on (4.24) but using only a DC Fourier coefficient of G(t): out 2 2 SnflLO(f)= G0 SnflLO(f)=(G) SnflLO(f). (4.27) In the above analysis of the transfer of switching stage noise to the differential output, parasitic capacitive effects as well as finite output conductance of the input stage have been neglected. However, if they are significant, another noise transfer mechanism - so called indirect mechanism - needs to be taken into account, as described in [19]. It results from demodulation of the noise current induced in the parasitic capacitance or the output conductance of the mixer input stage and it effectively modifies the transfer function of the switch input-referred noise to the differential output. Another relevant noise contributor in the mixer is noise coming from the LO port. Its con- tribution can be significant in a single-balanced mixer. In double-balanced mixers, however, the LO noise contribution is not transferred to the differential output. The LO noise can be decomposed into a WSS component and a cyclostationary component, since the LO circuit is periodically time-varying. The WSS component contributes in the same manner as the para- sitic gate resistance rgLO so it can be represented by an equivalent noise resistance RLO. The contribution of the cyclostationary LO noise component is different. Since the noise statistics of such component may be synchronized with the switching pair transconductance (4.18), its time-average PSD no longer describes the noise statistics completely [18]. As the treatment of such a problem is complicated and it does not introduce any qualitative enhancements to the analysis, it is not carried out here. The output stage of the mixer also contributes noise. Both load resistors generate uncorre- lated voltage noise, whose PSD is 4kTRL, so their contribution to the overall output noise PSD is out SnRL(f)=8kTRL (4.28) PSD of the total output noise voltage of an active single balanced mixer with resistive load equals out 2 2 2 Sntot(f)=4kTRL α(γ + rgRFgmRF)gmRF +2γG +(2rgLO + RLO)G + RL 2K(G)2R2 + L , (4.29) WswLswCoxf while PSD of the total output noise voltage of an active double balanced mixer with resistive load is 2 2 out 2 2 2 4K(G) RL Sntot(f)=4kTRL 2α(γ + rgRFgmRF)gmRF +4γG +4rgLOG + + . (4.30) RL WswLswCoxf Chapter 4. Downconversion Mixers 55
Input Power Density Density
Output Density
-LO -RF -IF 0 IF RF LO Frequency
Figure 4.9: DSB vs SSB noise considerations
Since input-referred noise is often a more useful noise performance metric, it is instructive to provide corresponding expressions both for single and double balanced mixers. Due to frequency conversion, two types of input-referred noise have to be considered. To understand the reason for distinction, a noiseless mixer multiplying the input signal (consisting of both wideband white noise and a wanted signal) by a sine LO wave is studied. Fig. 4.9 shows on one plot two-sided power spectral densities of input noise, input wanted signal (solid lines) as well as output noise and downconverted sidebands of the wanted signal (dotted lines). Wideband input white noise mixes with the LO sine wave and produces also wideband output white noise, whose power spectral density is half of the input spectral density. This is true whether or not an input wanted signal is present at some RF band next to the LO frequency or symmetrically around the LO frequency. If an input wanted signal is present around an RF frequency different from the LO frequency, then the downconverted wanted signal appears around the output IF frequency with a power spectral density of each sideband (at positive and negative frequencies) four times smaller than the input signal power spectral density. If an RF frequency is equal to the LO frequency, then these two sidebands both land at zero-IF frequency and their power spectral densities add yielding a total power spectral density half the RF power spectral density. In both cases (non- zero-IF downconversion and zero-IF downconversion), the total power of the downconverted wanted signal is the same. However, the total power of the output noise within the bands occupied by the wanted signal differs by a factor of two, i.e. the total output noise power in the wanted signal IF band is two times larger for non-zero-IF downconversion than for zero- IF downconversion. To put it differently, non-zero-IF downconversion requires integration of noise in the bands both around negative and positive IF frequency, while in case of zero-IF downconversion, the noise power is calculated by integrating only one band around DC. To distinguish between these two cases, which unquestionably result in different output signal-to-noise ratios, two separate input-referred noise parameters are needed. The first type is called single-sideband (SSB), because when referring the output noise in the IF bands of interest to the mixer input, it is assumed that it originates only from the band occupied by the wanted signal and not the image band. The second type of input-referred noise is called double-sideband (DSB) since referring the output noise to the input assumes that it originates from bands on both sides of the LO frequency. Chapter 4. Downconversion Mixers 56
−8 x 10 Input referred noise density 2
1.8 LO amplitude = 1.0 V 1.6 LO amplitude = 1.2 V 1.4 LO amplitude = 1.5 V No flicker noise case 1.2
1
0.8 Vn [V/sqrt(Hz)] 0.6
0.4
0.2
0 0 0.5 1 1.5 2 6 Frequency [MHz] x 10
Figure 4.10: Input referred noise density vs frequency
If the mixer has a high input impedance, it is sufficient to use an input-referred noise voltage source to represent the mixer noise. Furthermore, assuming that the switching function is a perfect square wave (parameter α in (4.17) is equal to 1) and the switching conversion gain is 2/π, the single-sideband input-referred noise voltage PSD is given by
2 in π out SntotSSB(f)= 2 2 Sntot(f), (4.31) 4gmRFRL while the double-sideband input-referred noise voltage PSD is given by
2 in π out SntotDSB(f)= 2 2 Sntot(f), (4.32) 8gmRFRL
Inspection of the above equations reveals that the input-referred noise voltage can be de- creased by increasing the input-stage transconductance. Only the contribution from the parasitic gate resistances of the input stage is unaffected by this technique. Moreover, it can be seen that larger load resistances yield smaller input-referred noise because the term 2/RL in (4.29) and (4.30) becomes less important for higher values of RL. The noise contribution of the switching stage, including the flicker noise component, can be decreased by decreasing the switching pair transconductance G(t). One technique is to increase the LO drive level. To illustrate the idea, Fig. 4.10 shows double-sideband input-referred noise voltage density (square root of (4.32)) of a sample double-balanced downconversion mixer for three different LO drives. Additionally, a case with largest LO drive but no flicker noise is included for comparison. It can be seen that the flicker noise can play a major role at low frequencies and that larger LO signal levels indeed reduce the input-referred noise density. Other techniques of reducing the switching pair transconductance include utilizing a passive switching stage [20], [21], employing dynamic injection of current to the common source node of the switches during the switching events [22], [23] or using a mixer topology which avoids the flow of biasing current through the switches during their transitions [24]. Chapter 4. Downconversion Mixers 57
Switch linear transconductance vs time Switch second order transconductance vs time 0.025 0.1
0.09
0.02 0.08
0.07
0.015 0.06
0.05 gm [S] 0.01 g2 [S/V] 0.04
0.03
0.005 0.02
0.01
0 0 0 200 400 600 800 1000 0 200 400 600 800 1000 Time [ps] Time [ps] (a) gm (b) g2
Switch third order transconductance vs time 0.8
0.6
0.4
0.2
g3 [S/VV] 0
−0.2
−0.4
−0.6 0 200 400 600 800 1000 Time [ps] (c) g3
Figure 4.11: Linear and nonlinear switch transconductances vs time
4.3.3 Intermodulation Distortion A deep understanding of mixer nonlinear behavior is critical for successful receiver design as mixers usually limit the nonlinear performance of the whole receive chain. To explain intermodulation distortion mechanisms, an active switching mixer is studied. In order to simplify the analysis, memory effects are neglected. Similarly to the case of noise, the analysis has to account for time-varying nature of mixer components. In active mixers, parameters of the input transconductor stage are in general time-variant, for example due to interaction with the switching stage placed on top of it, as in the standard Gilbert cell. However, it is often acceptable to consider the input stage as a time-invariant system with a transfer function described by a power series
2 3 iin = a1vin + a2vin + a3vin. (4.33) On the other hand, parameters of mixer switches vary significantly over the LO period, as illustrated in Fig. 4.11. Therefore, the transfer function of the switching pair has to be described by means periodically time-varying power series. The output current of the switching pair can be expressed as a function of the LO voltage VLO, the bias current IDC, and the input signal current iin coming from the transconductor stage: Iout0 + iout = F VLO(t),IDC + iin(t) , (4.34) Chapter 4. Downconversion Mixers 58
where Iout0 is the differential output signal without input signal present. Treating iin and iout terms as small-signal values, the above expression can be expanded in a time varying Taylor series:
2 3 iout = p1(t)iin + p2(t)iin + p3(t)iin. (4.35)
Because the coefficients pi(t) are periodic, each of them can be expanded in a Fourier series. Without loss of generality, they can be considered odd functions of time provided that no mismatches are present in the analyzed circuit. The Fourier series representing the coefficients reduces then to a series of sinusoids: ∞ 2 3 iout = p1,kiin + p2,kiin + p3,kiin sin(2πkfLOt). (4.36) k=1 Focusing on the distortion behavior in the frequency bands separated by one LO multiple, the following time-invariant power series results:
. 2 3 iout = b1iin + b2iin + b3iin, (4.37) . where = indicates that left- and right-hand side of (4.37) refer to different frequency bands and TLO bi = fLO pi(t)sin(2πfLOt)dt. (4.38) 0 The combined transfer characteristic of the active mixer can be calculated from (4.33) and (4.37) as . 2 3 iout = c1vin + c2vin + c3vin, (4.39) 3 ≈ 3 where c3 = a3b1 +2a1a2b2 + a1b3 a3b1 + a1b3. The approximation comes from the fact that distortion products generated in one stage induce negligible distortion when applied to nonlin- earities of the following stage. Thus, the total third order intermodulation is approximately equal to the sum of the intermodulation products that the transconductance stage and the switching stage would generate if the other stage were perfectly linear. Calculations presented in [25] showed that if memory effects in the switches are noticeable and the analysis needs to be based on the time-varying Volterra series, the overall mixer distortion can still be given as the sum of the intermodulation generated by the transconductance stage and the switching stage separately. Since the input stage usually dominates the overall mixer nonlinear performance, linearity optimization focuses on this part of the mixer. Apart from traditional techniques like negative feedback or increase of overdrive voltage, an interesting approach to IP3 improvement is based on a so-called derivative superposition method as presented e.g. in [26].
4.3.4 Imbalances In quadrature modulators/demodulators, it is necessary to use two mixers driven by quadra- ture LO signals. As a result of unavoidable parameter mismatches of fabricated devices (Ap- pendix B), errors in the nominal 90◦ phase shift as well as imbalances between the amplitudes of the signals in I and Q channels corrupt the constellations of processed signals. Illustrated in Fig. 4.12a, the gain imbalance leads to reduction in distances between modulation symbols along one of the axes with respect to another axis. The effect of phase imbalance is a skew of the constellation, as shown in Fig. 4.12b, which results in coupling of a fraction of the signal in one channel to the other channel. Chapter 4. Downconversion Mixers 59
Ideal Ideal Q Q Mismatched Mismatched
I I
(a) Gain mismatch error (b) Phase mismatch error
Figure 4.12: Effects of IQ mismatches on QPSK signal constellation
Ideal Ideal Q With DC Offset Q Contaminated With IMD2
I I
(a) DC offset (b) IMD2
Figure 4.13: Effects of DC offset and IMD2 on QPSK signal constellation
Both gain and phase imbalances in IQ demodulators affect also the image rejection ratio (IRR), an important issue in non-zero IF receivers. It can be shown that [17]
2 ΔA + θ2 IRR ≈ A , (4.40) 4 where ΔA/A denotes the relative gain mismatch and θ (expressed in radians) represents the total phase mismatch. In balanced mixers, mismatches between the differential paths in the mixer circuitry give rise to DC offsets as well as differential mode even order distortion [27], which in practice reduces to second-order distortion. Illustrated in Fig. 4.13a, DC offsets shift the signal constellation so that it is not circularly symmetrical around the origin of the IQ plane. Second order distortion manifests itself as dynamic variations in the center of the constellation relative to the origin of the IQ plane (Fig. 4.13b). The intensity of variations along a given axis depends on the amount of mismatch in the corresponding channel. Chapter 4. Downconversion Mixers 60
Iout,p Iout,n
gLO1 gLO2 gLO3 gLO4 SW1 SW2 SW3 SW4
Iin,p Iin,n
Vin,p Vin,n
Figure 4.14: Behavioral model of the Gilbert cell
4.4 Detailed Analysis of RFIC Mixer Second Order Distortion
In this section, a detailed analysis of second order intermodulation distortion mechanisms in downconversion mixers is presented. The focus is put on balanced mixer architectures as they are a preferred choice for monolithic implementations due to improved port isolation and minimized interference to other blocks on chip. Consequently, the problem of IMD2 is strictly related to parameter mismatches between differential signal paths. Therefore, the analysis highlights mismatch aspects of second order distortion rather than circuit nonlinearities alone. The analysis is divided into three distinct parts: behavioral modeling, whose purpose is to reveal how various mismatch types affect mixer second order distortion and static DC offsets; circuit level modeling, which analyzes underlying mechanisms of second-order distortion and sensitivity of IMD2 to various mixer operating conditions; and statistical modeling, which studies statistical dependence of IIP2 on previously identified mismatch parameters as well as correlation issues between IIP2 and static DC offsets.
4.4.1 Behavioral Modeling Behavioral modeling considers distortion generated only by circuit nonlinearities. Mixer op- eration is described by means of equations containing coefficients representing device parameter mismatches. However, the underlying physical causes of mismatches are not addressed. The analysis is an extension of the behavioral mismatch modeling presented in [28]. It is performed on a double balanced Gilbert cell mixer core and assumes mismatches both in the input stage and in the switching stage. Additionally, load mismatch considerations for mixers with and without output common mode feedback circuitry are presented. Distortion due to nonlinearities is assumed to originate from the input stage only. A more sophisticated modeling approach, including distortion generated by the switching stage, will be introduced after detailed circuit analysis performed in the next subsection. Fig. 4.14 shows a behavioral model used in the analysis of the mixer core. Input stage transistors are replaced with voltage controlled current sources while the switching stage tran- sistors are replaced with ideal current switches driven by respective square-wave gate functions gLOi(t) toggling between 0 and 1 and satisfying gLO1(t)+gLO2(t)=1andgLO3(t)+gLO4(t)=1 conditions. Behavioral models of the mixer load are described after the mismatch analysis of the mixer core. Chapter 4. Downconversion Mixers 61
Nonlinearity Modeling To include nonlinear effects in the analysis, the input transconductors can be modeled using Taylor series expansion as nonlinear voltage controlled current sources (VCCS):
2 3 iin(t)=gmvin(t)+g2vin(t)+g3vin(t)+... (4.41)
Although in practice the switching stage also generates distortion, its nonlinear behavior (apart from the obvious switching operation, which frequency-shifts input currents) is neglected in the behavioral analysis. The output current of each input stage transistor consists of a biasing DC current and a time-varying incremental component:
Iin(t)=IDC + iin(t) (4.42) Assuming that the RF input signal of each transconductor is given as vin = ARF cos ω1t + cos ω2t , which represents a two tone input excitation, and considering only the biasing and low-frequency second order distortion products, the current fed to the switching stage can be written as: 2 Iin(t)=IDC + g2ARF 1+cos Δωt (4.43) where Δω = |ω1 − ω2| is the angular frequency of the second order intermodulation tone.
Input Stage and Switching Stage Mismatches Because of unavoidable mismatches due to fabrication process variations, the input stage transconductors are generally biased not with exactly the same DC currents and they have slightly different AC transfer functions. Taking only DC and low-frequency second order distor- tion currents into account, the following expressions can be written: 2 Iin,p(t)=IDC,P + g2,pARF,P 1+cos Δωt 2 Iin,n(t)=IDC,N + g2,nARF,N 1+cos Δωt (4.44)
The above equations describe not only a mismatched condition of the differential input stage but also absorb a potentially mismatched condition of the circuitry preceding the mixer by varying amplitudes of the voltage signals in each differential input branch. Mismatches associated with the switching stage are taken into account by distorting duty cycles of gate functions, keeping the conditions:
η1 + η2 =1
η3 + η4 = 1 (4.45)
The above equations mean that only one switch in a given differential pair is assumed to be ON at a time with both switches having potentially different conduction times. The Fourier series expansions of gate functions can be expressed as:
gLOi(t)=ηi + a1,i cos(ωLOt)+a2,i cos(2ωLOt)+... (4.46) where a DC component is simply the duty cycle of the respective gate function. Note that the assumption of generally different duty cycles associated with each switching pair is reasonable since switch conduction times are determined not only by LO waveform but also by device parameter mismatches. Chapter 4. Downconversion Mixers 62
The differential output current of the mixer core is a combination of products of transcon- ductor currents with appropriate gate functions: Iout(t)=Iout,p(t) − Iout,n(t)= Iin,p(t)gLO1(t)+Iin,n(t)gLO3(t) − Iin,p(t)gLO2(t)+Iin,n(t)gLO4(t) . (4.47)
By introducing the following coefficients:
• Relative mismatch between biasing currents of the input stage transistors:
IDC,P − IDC,N ΔIDC = , IDC
where IDC =(IDC,P + IDC,N)/2
• Relative mismatch between amplitudes of voltage signals driving the differential inputs of the mixer: A − A ΔA = RF,P RF,N , ARF
where ARF =(ARF,P + ARF,N)/2
• Relative mismatch between second-order transconductances of the input stage transistors:
g2,p − g2,n Δg2 = , g2
where g2 =(g2,p + g2,n)/2.
• Mismatch in duty cycles between the switches of the first switching pair:
η1 − η2 Δη12 = , ηnom
where ηnom =0.5
• Mismatch in duty cycles between the switches of the second switching pair:
η3 − η4 Δη34 = , ηnom
where ηnom =0.5, the differential output current of the mixer core at Δω can be written as 2 iout,imd2(t)=ηnomg2ARF cos Δωt Δη Δg Δη Δg × 1+ 12 1+ 2 1+ΔA + 1 − 34 1 − 2 1 − ΔA 2 2 2 2 Δη Δg Δη Δg − 1 − 12 1+ 2 1+ΔA + 1+ 34 1 − 2 1 − ΔA 2 2 2 2 Δg ≈ η g A2 cos Δωt Δη − Δη + Δη +Δη 2 +ΔA . nom 2 RF 12 34 12 34 2 (4.48) Chapter 4. Downconversion Mixers 63
Note that in the above expression, an approximation (1 ± ΔA/2)2 ≈ 1 ± ΔA has been used. The last expression in square brackets will be referred to as an effective IMD2 mismatch of the double balanced mixer core and denoted as ΔIMD2eff : Δg Δ = Δη − Δη + Δη +Δη 2 +ΔA (4.49) IMD2eff 12 34 12 34 2 Similarly to the IMD2 component, the differential static DC offset component can be calcu- lated as:
IOUT,DC = ηnomIDC Δη ΔI Δη ΔI × 1+ 12 1+ DC + 1+ 34 1 − DC 2 2 2 2 Δη ΔI Δη ΔI − 1 − 12 1+ DC + 1+ 34 1 − DC 2 2 2 2 ΔI = η I Δη − Δη + Δη +Δη DC (4.50) nom DC 12 34 12 34 2 where the last expression in square brackets will be called an effective static DC offset mismatch of the double balanced mixer core and denoted as ΔDCeff : ΔI Δ = Δη − Δη + Δη +Δη DC (4.51) DCeff 12 34 12 34 2 The term static is used to distinguish a DC offset present when the mixer is not driven by any input signal from an additional DC offset component (called dynamic DC offset) which is generated together with second-order distortion via second-order circuit nonlinearities. From the developed equations it can be concluded that the effective IMD2 mismatch of the mixer core depends directly on a difference between duty cycle mismatches Δη12 and Δη34 associated with first and second switching pair, respectively. A sum of duty cycle mismatches, which includes a contribution from the LO waveform duty cycle mismatch, is multiplied by a sum of second order transconductance and input signal amplitude mismatches. Therefore, for a given LO waveform duty cycle mismatch, its contribution to the effective mixer core IMD2 mismatch is random in nature. Similarly, for given second-order transconductance mismatches and input signal amplitude mismatches, their contribution to the effective mixer core IMD2 mismatch depends on a sum of duty cycle mismatches and thus is also random. Finally, note that the effective static DC offset mismatch ΔDCeff differs from the effective IMD2 mismatch
ΔIMD2eff by the presence of ΔIDC mismatch and absence of Δg2 and ΔA mismatch terms.
Output Stage Mismatches The analysis of output stage mismatches and their impact on IMD2 and DC offsets at the differential mixer output is split into two parts: the analysis of a resistive load shown in Fig. 4.15a and the analysis of a load containing current sources within the output common mode feedback loop, as shown in Fig. 4.15b. The second architecture is especially suitable for low- voltage mixers, which are becoming more and more popular. The output voltage of a resistive load mixer is given by
V (t)=I (t)R − I (t)R out out,p LP out,n LN ΔR = R I (t) − I (t) + R I (t)+I (t) . (4.52) L out,p out,n L 2 out,p out,n Chapter 4. Downconversion Mixers 64
Ics,p Ics,n RLP RLN CMFB
RLP RLN
Iout,p Iout,n Iout,p Iout,n (a) Standard resistive load (b) Load with CMFB loop
Figure 4.15: Mixer load behavioral models
In the above equation, a relative load resistor mismatch ΔR =(RLP − RLN)/RL, where RL = (RLP +RLN)/2, has been introduced. It can be seen that the impact of load resistor mismatches manifests itself as a conversion of common mode output current of the mixer core [Iout,p(t)+ Iout,n(t)]/2 to the differential mode output voltage of the mixer. The differential voltage at Δω due to load resistor mismatches can be calculated as 2 vout,imd2,ΔR(t)=ηnomg2ARFRL cos Δωt ΔR Δη Δg Δη Δg × 1+ 12 1+ 2 1+ΔA + 1 − 34 1 − 2 1 − ΔA 2 2 2 2 2 Δη Δg Δη Δg + 1 − 12 1+ 2 1+ΔA + 1+ 34 1 − 2 1 − ΔA 2 2 2 2 ΔR = η g A2 R cos Δωt 4+2Δg ΔA ≈ η g A2 R 2ΔR cos Δωt nom 2 RF L 2 2 nom 2 RF L (4.53)
Similarly, the static DC offset induced by load resistor mismatches is calculated as
VOUT,DC,ΔR = ηnomIDCRL ΔR Δη ΔI Δη ΔI × 1+ 12 1+ DC + 1 − 34 1 − DC 2 2 2 2 2 Δη ΔI Δη ΔI + 1 − 12 1+ DC + 1+ 34 1 − DC 2 2 2 2
= ηnomIDCRL2ΔR (4.54) Comparing (4.48) and (4.50) with (4.53) and (4.54), respectively, it can be seen that load resistor mismatches contribute additively to the overall effective mixer mismatch. Because of this, the overall effective IMD2 and static DC offset mismatches of the mixer with a resistive load can be written as: Δg Δ = Δη − Δη + Δη +Δη 2 +ΔA +2ΔR (4.55) IMD2total 12 34 12 34 2
ΔI Δ = Δη − Δη + Δη +Δη DC +2ΔR (4.56) DCtotal 12 34 12 34 2 Since typical duty cycle mismatches are in the order of 10−2, they do not influence signifi- cantly switching stage conversion gain nominally equal to 2/π. Therefore, the IIP2 of the mixer Chapter 4. Downconversion Mixers 65 with a resistive load can be calculated as 2 η g (0.5A )2R Δ = g A R =⇒ nom 2 IIP2 L IMD2total π m IIP2 L 8gm AIIP2 = , (4.57) − Δg2 ηnomπg2 Δη12 Δη34 + Δη12 +Δη34 2 +ΔA +2ΔR which is a differential input-referred peak voltage quantity. The IMD2 mechanisms in the mixer load containing a common mode feedback (CMFB) loop, used mainly in low voltage architectures described earlier in this chapter, differ substantially from the resistive load without the CMFB block. Referring to Fig. 4.15b and neglecting feedback loop bandwidth considerations in the analysis, the differential output voltage is given by Vout(t)= Iout,p(t) − Ics,p(t) RLP + RLN = Ics,n(t) − Iout,n(t) RLP + RLN (4.58)
The CMFB block, apart from its primary task of setting a well defined common mode output voltage, absorbs the common mode current coming from the mixer core as a side effect:
Ics,p(t)+Ics,n(t)=Iout,p(t)+Iout,n(t) (4.59)
Upon introducing a relative current source mismatch parameter defined as ΔIcs =(Ics,p − Ics,n)/Ics where Ics =(Ics,p + Ics,n)/2, equation (4.58) can be rewritten as ΔI V (t)= I (t) − I (t) 1+ cs R + R out out,p cs 2 LP LN I (t)+I (t) ΔI = I (t) − out,p out,n 1+ cs R + R out,p 2 2 LP LN I (t) − I (t) = out,p out,n R + R 2 LP LN ΔI I (t)+I (t) − cs out,p out,n R + R (4.60) 2 2 LP LN
The differential voltage at Δω due to load current source mismatches can thus be expressed as − 2 vout,imd2,ΔIcs(t)= ηnomg2ARF RLP + RLN ΔIcs cos Δωt (4.61) while the static DC offset can be expressed as VOUT,DC,ΔIcs = −ηnomIDC RLP + RLN ΔIcs (4.62)
Using (4.48) and (4.61) for IMD2 as well as (4.50) with (4.62) for DC offset and noting that in the considered output stage architecture only half of the mixer core differential output current flows through serially connected resistors RLP and RLN, the overall effective IMD2 and static DC offset mismatches of the mixer with CMFB based load can be expressed as: Δg Δ = Δη − Δη + Δη +Δη 2 +ΔA − 2ΔI (4.63) IMD2total 12 34 12 34 2 cs
ΔI Δ = Δη − Δη + Δη +Δη DC − 2ΔI (4.64) DCtotal 12 34 12 34 2 cs Chapter 4. Downconversion Mixers 66
Iout = I1-I2
I1 I2
+ 0.5Vlo T1 T2 -0.5Vlo
+ 0.5Vcpl -0.5Vcpl
Vin TRF
Figure 4.16: RF-LO coupling model
The IIP2 of the mixer with a CMFB based load is found to be
8gm AIIP2 = (4.65) − Δg2 − ηnomπg2 Δη12 Δη34 + Δη12 +Δη34 2 +ΔA 2ΔIcs which is again a differential input-referred peak voltage quantity. To sum up, in case of mixers containing an output CMFB loop, load resistor mismatches do not contribute to the IMD2 and DC offsets. Instead, mismatches between load current sources become important and they contribute additively to the overall effective mixer mismatches. Although useful for gaining general insight into distortion leakage mechanisms and identifi- cation of relevant mismatch contributors, behavioral modeling cannot explain many important aspects of second order intermodulation distortion, for example its sensitivity to mixer operating conditions including LO frequency and RF interferer frequency. Thus, a more accurate, circuit- level modeling approach is needed in order to gain a deep understanding of such non-obvious effects.
4.4.2 Circuit Level Modeling
In this section, circuit-level modeling of second-order intermodulation distortion is presented. The investigation of IMD2 generation mechanisms follows the concept presented in [29] and [30] but it is extended by analyzing more thoroughly the self-mixing phenomenon, showing the impact of the output conductance of the mixer input stage on the IMD2 leakage mechanism as well as by a more detailed study of distortion due to switching pair nonlinearities. Along with second-order intermodulation distortion, static DC offset generation mechanisms are studied as well. The analysis is carried out for CMOS active mixers. The reasons are twofold. First, CMOS technologies are already widely used in high-volume production of RF integrated circuits. Sec- ondly, a modern RF-CMOS technology has been used in the implementation phase of the re- search. It should be noted, however, that many conclusions of the study are valid also for bipolar and BiCMOS technologies. A reference [31] can serve as a supplement of the IMD2 circuit-level analysis for the bipolar Gilbert mixer. The analysis is divided into two distinct parts. Firstly, RF-LO coupling based self-mixing phenomenon is described analytically. Next, generation of second order distortion due to nonlin- earities in the active devices combined with parameter mismatches between them is studied and relationships between previously developed behavioral and circuit level models are formulated. Chapter 4. Downconversion Mixers 67
Iout
-VL VL Vsw
Figure 4.17: I-V switching characteristic
Self-Mixing Self-mixing phenomenon results from coupling between mixer RF and LO ports due to electromagnetic (EM) and substrate coupling [32] as well as ground and power supply bounce, leading to multiplication of the input signals by their coupled replicas. To analyze the effects of self-mixing quantitatively, a single-balanced active mixer core is studied. The circuit model of the coupling is shown in Fig. 4.16. Vlo denotes the local oscillator signal, while Vin denotes the mixer input signal. The voltage applied to the gate of the input stage transistor consists of a biasing voltage component VDC as well as a time-varying voltage signal vin(t):
Vin(t)=VDC + vin(t). (4.66)
The voltage Vin is converted by the input stage to the current Iin:
Iin(t)=IDC + iin(t)=IDC + gmRFvin(t). (4.67)
At the same time, the signal vin(t) is coupled to the LO port via various physical phenomena like EM and substrate coupling. Although coupling may introduce some phase shift of the excitation signal, such effect will be neglected in the analysis for simplicity:
vcpl(t)=Γvin(t). (4.68) The real-valued parameter Γ models the coupling between RF and LO ports without distin- guishing the underlying physical phenomena. Note that this parameter is frequency dependent (due to the nature of electromagnetic coupling) as well as mismatch related. In an ideal case, the coupling coefficient should equal 0 because of the balanced structure of the mixer. However, layout and fabrication induced asymmetries cause the environment between RF and LO+ ports to be slightly different than between RF and LO- ports. As a consequence, finite coupling exists, resulting in self-mixing of the RF input signal causing IMD2 distortion as well as self-mixing of the local oscillator signal causing static DC offset at the mixer output. The total differential signal driving the switching pair is equal to:
Vsw(t)=Vlo(t)+vcpl(t)=Vlo(t)+Γvin(t). (4.69) In an ideal case of a perfect hard-switching behavior, the differential output current of the mixer Iout is equal to Iin for one half of the period and −Iin for the other half, regardless of the existence Chapter 4. Downconversion Mixers 68
Iout = I1-I2
I1 I2
+ 0.5Vlo T1 T2 -0.5Vlo
Vin TRF
Vlo_cpl
Figure 4.18: LO-RF coupling model or non-existence of the RF-LO coupling. Consequently, no second-order distortion products appear at the output. In reality, however, the switching characteristic of the commutating stage is not perfect. During the switching events, there is a time interval when both switches are on and contribute to the output current. A corresponding soft-switching model is presented in Fig. 4.17. VL is an absolute value of the differential voltage driving the switching stage, above which only one of the switches is in the on state. Although the model is quite simple, it enables capturing the self-mixing based second order distortion generation mechanism. Taking into account the soft switching characteristic of the commutating stage, the differen- tial output current of the mixer can be expressed as: ⎧ ⎨ IDC + gmRFvin Vlo +Γvin , for Vsw
In the above equation sgn(V ) denotes the signum function defined as follows: 1, for V>0 sgn(V )= (4.71) −1, for V<0
From equation 4.70, it can be concluded that if both switches are on, the differential output current contains a term proportional to the square of the input voltage - that is, a second order distortion product. If only one switch is conducting, no second order distortion is generated: ⎧ ⎨ 2 gmRFvinΓ , for VSW
Let TSW denote the time interval during which both switches are active (the time interval when −VL If ALO >> VL, the switching time interval can be approximated as VL TSW ≈ TLO . (4.74) πALO Chapter 4. Downconversion Mixers 69 IIP2 due to self−mixing vs. LO power level 50 Theory 45 Simulation 40 35 IIP2 [dBm] 30 25 20 −10 −5 0 5 10 LO power level [dBm] Figure 4.19: IIP2 due to self-mixing 2 The iout,imd2 can then be calculated as a product of gmRFvinΓ/VL times the unipolar square wave function sw(t) toggling between 0 and 1 with a period TLO/2 and a duty cycle 2TSW/TLO. Note that 2TSW sw(t) ≈ 1 + 2 cos 2ωLOt + ... , (4.75) TLO where the approximation referring to a coefficient of the first harmonic is reasonable for ALO >> VL and higher order harmonics are neglected as they are not relevant in the analysis. Assuming that the mixer input signal is an AM modulated interferer represented by vin(t)=ARF cos ω1t+ cos ω2t , the following expression for iout,imd2 can be written: g Γ 2g Γ i (t)= mRF v2 (t) × sw(t)= mRF A2 × 1+cos ω − ω t out,imd2 V in πA RF 1 2 L LO +0.5 cos 2 ωLO − ω1 t +0.5 cos 2 ωLO − ω2 t +cos 2ωLO − ω1 − ω2 t + ... . (4.76) From (4.76) it can be concluded that RF-LO self-mixing generates a DC offset component (the first term in (4.76)), a low-frequency second order intermodulation product (the second term in (4.76)) and other components, which can be easily filtered out in direct conversion and low-IF receiver architectures. However, the last three terms in (4.76) indicate that second order intermodulation can be problematic also in superheterodyne receivers if the blocker is situated at a frequency halfway between the LO frequency and the received signal frequency. In such a case, frequency-shifted distortion products land at the IF frequency together with the wanted signal. This kind of heterodyne receiver specific interference has been already described in Chapter 3, where it was referred to as a half-IF spurious response. The input referred second-order intercept point can be calculated from the following ex- pression equating the output second order intermodulation product with the linear response, assuming that the mixer transconductance conversion gain is given by 2gmRF/π: 2gmRFΓ 2 2 AIIP2 = gmRFAIIP2. (4.77) πALO π Chapter 4. Downconversion Mixers 70 DC offset due to self−mixing vs. LO power level −80 −85 −90 −95 −100 Theory −105 DC offset [dBA] Simulation −110 −115 −120 −10 −5 0 5 10 LO power level [dBm] Figure 4.20: DC offset due to self-mixing From the above equation, the expression for AIIP2 in dB scale results: AIIP2,dB =20lgALO − 20 lg Γ. (4.78) According to the above equation, the IIP2 due to self-mixing depends only on the LO amplitude and coupling. Note that the DC offset component in (4.76) depends on the level of the input interferer and as such it is a dynamic component of the overall DC offset, according to the definitions introduced in the section about behavioral modeling. It can be seen that by increasing the level of the LO signal, it is possible to both increase the IIP2 and reduce the dynamic DC offset. Another DC offset component results from self-mixing of the local oscillator signal and therefore it is a static component of the DC offset. Its value can be calculated by using the model presented in Fig. 4.18, where Vlo cpl(t)=ΓVlo(t), as: 2 I = g ΓA (4.79) OUT,DC π mRF LO In this case, increasing the level of the LO signal increases the value of the static DC offset. To verify the developed theory, simulations of self-mixing induced second-order intermodula- tion and DC offset have been performed. A 40dB RF-LO coupling has been assumed. For IIP2 simulations, the coupling model from Fig. 4.16 has been adopted. Fig. 4.19 shows IIP2 versus LO power. Simulation results match quite well the theoretical values predicted by (4.78) for high LO powers. For low LO powers, the simplifying assumptions used in the analysis are less valid, the mixer behaves more like a linear multiplier and the simulation results deviate from the calculated values. For DC offset simulations, no input blocking signals have been applied to avoid generation of a dynamic DC offset component. Instead, a 40dB attenuated replica of the LO signal has been applied to the mixer input, as in Fig. 4.18. The resulting simulated static DC offset values versus LO power are compared with values calculated by (4.79) in Fig. 4.20. Again, a very good agreement between simulated and theoretical values can be observed for high LO powers. For low LO powers, the conversion gain becomes lower than 2/π, which causes the simulated static DC offset values to depart from the theoretical predictions. Chapter 4. Downconversion Mixers 71 Iout = I1-I2 I1 I2 + 0.5Vlo T1 T2 -0.5Vlo + 0.5Vin_cpl -0.5Vin_cpl Vin TRF Vlo_cpl Figure 4.21: Complete coupling model IIP2 due to self−mixing vs. LO power level 90 Theory 80 Improved Theory Simulation 70 60 IIP2 [dBm] 50 40 30 −10 −5 0 5 10 LO power level [dBm] Figure 4.22: IIP2 due to self-mixing combined with 3rd order nonlinearities In reality, both RF signal leaks to the LO port and LO signal leaks to the RF port. Includ- ing these two effects simultaneously leads to an extended coupling model shown in Fig. 4.21. Corresponding IIP2 versus LO power simulation results presented in Fig. 4.22 show that (4.70) no longer describes the self-mixing phenomenon satisfactorily. In order to correct theoretical predictions, the impact of third-order nonlinearities of the mixer transconductor has to be included in the analysis [33], [34]. Accordingly, the current iin(t)isgivenby 3 iin(t)=gmRF vin(t)+ΓVlo(t) + g3RF vin(t)+ΓVlo(t) (4.80) where g3RF is the third order transconductance of the input stage. 2 In (4.80), the most important new term is 3g3RFΓVlo(t) vin(t) , which after normal mixing operation produces a spectral component at (ω1 −ω2), i.e. an extra second order intermodulation component. Assuming the conversion gain of the switching pair is 2/π, the resulting output IMD2 current is: 2 − iout,imd2(t)=6g3RFΓALOARF cos (ω1 ω2)t /π (4.81) From (4.81), this additional IMD2 component is directly proportional to ALO. Consequently, as Chapter 4. Downconversion Mixers 72 iout,imd2,1 iout,imd2,2 Vlo+VL1 L2 lo+ Vlo- iin,imd2,1 iin,imd2,2 Figure 4.23: Switching stage leakage the value of the output IMD2 current modeled with (4.76) decreases with increasing LO power level, the IMD2 current due to third order distortion combined with LO-RF coupling increases. Since typically linear and third-order transconductance have opposite signs, these two IMD2 components cancel each other at some value of the LO power, leading to a peak visible on the IIP2 vs. LO power plot in Fig. 4.22. For larger LO powers, the third-order distortion related IMD2 component dominates and IIP2 decreases while increasing the LO power level. By combining (4.76) and (4.81), the whole IMD2 distortion current due to self-mixing can 2 be expressed as iout,imd2(t)=ΛARF cos(Δωt), where 2g Γ(ω ) 6g Γ(ω )A Λ= mRF RF + 3RF LO LO , (4.82) πALO π ωRF is the angular frequency of the RF interferer and ωLO is the angular frequency of the local oscillator. The improved theoretical model has been fitted to the simulation results by choosing an appropriate value of the g3RF parameter. The resulting curve is shown in Fig. 4.22. A very good agreement is apparent, justifying the proposed model. The presented study analyzed coupling in a single balanced mixer. In double balanced mixer structures, effective RF-LO coupling between differential ports is much smaller than for single balanced structures. Consequently, the IIP2 values due to self-mixing can be high, even for high LO power levels. Input Stage Nonlinearity and Switching Pair Mismatches Another IMD2 generation mechanism is associated with the input stage nonlinearity com- bined with mismatches in the switching stage. In general, the input stage of a double-balanced mixer generates both common-mode and differential mode IMD2 distortion, the latter being a consequence of input stage mismatches. In case of a mixer with a perfectly balanced switching stage, no low-frequency second order intermodulation distortion current appears at the differen- tial output because differential mode distortion is upconverted while common mode distortion remains a common mode signal. In practice, unavoidable mismatches between switch transistor parameters lead to a finite transfer (leakage) of distortion generated in the input stage to the differential output of the mixer. Chapter 4. Downconversion Mixers 73 Iout = I1-I2 I1 I2 + 0.5Vlo Voff T1 T2 -0.5Vlo C ro,in IDC iin Figure 4.24: Switching pair model The output differential mode low-frequency IMD2 distortion current can be expressed as iout,imd2 = iout,imd2,1 − iout,imd2,2 = iin,imd2,1L1 − iin,imd2,2L2 (4.83) where Li denotes leakage gain associated with the i-th switching pair. Minus sign on the right hand side of (4.83) results from double balanced operation of the mixer (cross coupling at the output). The output differential IMD2 distortion depends on signs and absolute values of leakage gains and may significantly differ from the input differential distortion, as illustrated in Fig. 4.23. On the other hand, the common-mode distortion does not depend on switching stage mismatches and its value is the same both at the input and at the output of the switching stage. In order to analyze the leakage mechanisms, a single switching pair is studied. A circuit model shown in Fig. 4.24 is used. The input transconductor is replaced with a current source in parallel with a resistor ro,in, which models the output resistance of the input stage transistor. Additionally, a parasitic capacitor C is placed between common source node of the switches and ground. This component represents capacitances of both the switch source junction diode and the input stage drain junction diode as well as capacitive parasitics associated with metal connecting lines. Small signal current coming from the input stage is modeled with a current source iin. Mismatches between switching pair transistors are modeled as an equivalent DC voltage source attached to one of the switches. Such approach reflects threshold voltage VTH mismatches quite reasonably. As far as current factor β mismatches are concerned, they can be also modeled with an appropriate offset voltage source. However, its value may have to be adjusted for different operating conditions as explained in detail in Appendix B, where MOS transistor mismatch modeling methodology is described. Two distinct leakage mechanisms are considered: direct leakage and indirect leakage. Both leakage mechanisms are responsible not only for transfer of the IMD2 distortion generated by the input stage to the differential output but also for generation of a static DC offset component because of unequal distribution of the biasing current to the differential output branches. The mechanisms are described below analytically and compared with simulation results. Direct Leakage The direct leakage mechanism is associated with duty-cycle distortion in the operation of the switching pair. Its analysis is quite straightforward. A large LO signal drives the switching pair, causing the input current to be directed to either output branch of the mixer. Unlike in case of self-mixing modeling, instantaneous switching is assumed from here onwards in order to make the analysis tractable. Thus, the differential output current can Chapter 4. Downconversion Mixers 74 + 1 A(f) f -1 fLO 3fLO 5fLO TLO (a) Square wave with 50% duty cycle + 1 A(f) f -1 fLO 3fLO 5fLO TLO 2fLO 4fLO (b) Square wave with non-50% duty cycle Figure 4.25: Periodic bipolar square waves and their spectra be mathematically described as the input current multiplied by a bipolar square wave toggling between −1 and +1. Ideally, the duty cycle of the switching pair equals 50%, yielding a perfectly balanced operation. The corresponding square wave and its spectrum is shown in Fig. 4.25a. The square wave has only odd harmonics and no spectral DC component. All low-frequency input currents, including the biasing current, are therefore upconverted and do not cause any problems in the receiver as they are filtered in the subsequent BB filtering stage. In reality, mismatches in the LO waveform duty cycles as well as within the mixer switches result in a square wave switching function having a non-50% duty cycle. An example of such a square wave with its spectrum is shown in Fig. 4.25b. It contains not only odd harmonics but also even harmonics and a DC component, which is responsible for direct leakage. Referring to Fig. 4.26, a duty-cycle mismatched square wave can be decomposed into a 50% duty-cycle square wave toggling between −1 and +1 and a pulse sequence toggling between 0 and 2. Only the latter signal adds even harmonics and a DC component to the overall spectrum. Each pulse in the sequence has a time width ΔT . Assuming, as in the self-mixing analysis, that a differential local oscillator signal is represented as a large amplitude sinusoid Vlo(t)= ALO sin 2π/TLO t , the ΔT value can be calculated from the following expression, describing a condition in which the switching event occurs relative to the ideal non-mismatched case: 2π A sin ΔT = V (4.84) LO T off LO If ALO >> Voff , the pulse time width can be approximated as |Voff | ΔT ≈ TLO . (4.85) 2πALO In order to quantify the direct leakage, a parameter LDIR is introduced. It is defined as the differential output distortion signal of the switching pair divided by the input distortion signal at the same frequency. Consequently, LDIR must equal the DC component of the pulse wave, i.e. its average value. Since within every LO period TLO two pulses are present, each having width ΔT and height 2, the value of LDIR equals to: 2ΔT 2|Voff | LDIR =2 = (4.86) TLO πALO Chapter 4. Downconversion Mixers 75 + 1 -1 + 1 -1 2 0 TLO T Figure 4.26: Square wave decomposition Differential output IMD2 distortion current due to the direct leakage is simply a product of the input IMD2 distortion current multiplied by LDIR: iout,imd2(t)=iin,imd2(t)LDIR (4.87) Similarly, the output static DC offset current is a product of the input biasing current multiplied by LDIR: IOUT,DC = IDCLDIR (4.88) To verify the developed direct leakage mechanism theory, several simulations have been carried out. Both the parasitic capacitance C and the resistance ro,in have been removed from the model shown in Fig. 4.24 so that only duty-cycle mismatch induced distortion leakage and DC offset were generated. Mismatches were introduced to the switching stage transistors by modifying a threshold voltage value in a model of one of the switches. A difference VTH,1 −VTH,2 has been used as an offset voltage value Voff in the analytical model. Switching pair biasing current IDC has been set to 1mA. Fig. 4.27 shows plots of direct leakage gain vs. threshold voltage mismatch for several values of the LO signal level. Clearly, larger offset voltage values result in larger direct leakage gains. For a given mismatch scenario, increase of the LO signal level results in decreased value of the direct leakage. At small LO powers, simulated value of the direct leakage is always larger than predicted theoretically. Nonetheless, typical LO power levels driving the switching stage in CMOS technologies are usually around 10dBm or higher, which means that even for large offset voltages, direct leakage gain rarely exceeds 0.01. Fig. 4.28 shows static DC offset versus threshold voltage mismatch for several values of the LO signal level. Simulation results match reasonably well the theoretical predictions for large LO signal levels. For low LO powers, assumption of instantaneous switching is less valid and a discrepancy between theory and simulations is quite large. Chapter 4. Downconversion Mixers 76 Direct leakage vs. threshold voltage mismatch 0.1 0.09 Theory 0.08 LOpwr = −5dBm 0.07 LOpwr = 0dBm LOpwr = 5dBm 0.06 LOpwr = 10dBm 0.05 0.04 Direct leakage 0.03 0.02 0.01 0 0 5 10 15 20 Threshold voltage mismatch [mV] Figure 4.27: Direct leakage vs. threshold voltage mismatch Static DC offset vs. threshold voltage mismatch 100 90 80 Theory LOpwr = −5dBm 70 LOpwr = 0dBm LOpwr = 5dBm 60 LOpwr = 10dBm 50 40 Static DC offset [uA] 30 20 10 0 0 5 10 15 20 Threshold voltage mismatch [mV] Figure 4.28: DC offset vs. threshold voltage mismatch Chapter 4. Downconversion Mixers 77 A(f) f fLO 2fLO 3fLO f Figure 4.29: IMD2 distortion sidebands Indirect Leakage The indirect leakage mechanism is induced by the parasitic capacitance C and the output resistance of the input stage transistor ro,in, both loading the common source of the switching pair. The term indirect stems from the fact that the distortion current iin,imd2 modulates parameters of the switching transistors, resulting in distortion sidebands around harmonics of the LO signal in the spectrum of the current flowing through C and ro,in, as shown in Fig. 4.29. These currents are then downconverted by the normal mixer operation, causing a low-frequency distortion product to appear at the mixer differential output. Thus, second order distortion leaks to the output indirectly, via a simultaneous modulation-demodulation process. In order to analyze the indirect mechanism quantitatively, a general model shown in Fig. 4.24 is translated to an equivalent single source follower model, shown in Fig. 4.30. In this model, the DC offset voltage source Voff is replaced with a square wave offset voltage source toggling between 0 and Voff . The differential LO signal driving the switching pair is replaced with a rectified sinusoid voltage source driving the source follower. The amplitude of the rectified sinusoid equals half of the differential LO signal. Z(ω) represents the impedance loading the source node. The operating point of the source follower is assumed to be constant. Although this is a significant simplification, the model is able to identify essential leakage mechanisms. To find the differential output current of the switching pair, the drain current Id of the source follower is multiplied by a duty-cycle mismatched square wave signal. Referring back to Fig. 4.26, the ideal 50% duty-cycle square wave demodulates to baseband only sidebands around odd-order LO harmonics while the pulse sequence demodulates to baseband only sidebands around even-order LO harmonics. This is because multiplication of an odd harmonic by an even harmonic never gives a product at baseband. In the spectrum of the current flowing through the impedance Z(ω), odd-order LO harmonics are generated by the square wave offset voltage source while even-order LO harmonics are generated by the rectified sinusoid voltage source. First, the indirect leakage caused only by the parasitic capacitance C is analyzed using the equivalent source follower model from Fig. 4.30, in which 1 Z(ω)= . (4.89) jωC The current flowing through the parasitic capacitance C in response to a gate excitation can be described by the following equation: (vg − vs)gm = vs ◦ jωC = iC (4.90) By defining a time constant τ = C/gm, the following expression relating vg and vs can be written: 1 v = v ◦ (4.91) s g 1+jωτ Chapter 4. Downconversion Mixers 78 Id Z( ) IDC iin Figure 4.30: Equivalent model of the switching pair The source voltage signal can be expressed as: ∂vs(t, τ) ∂τ vs(t, τ)=vs(t, τ0)+ iin,imd2(t) (4.92) ∂τ ∂I I=IDC where iin,imd2 is the small signal distortion current. The dependence of the source voltage on τ can be seen directly from (4.91) whereas time-varying nature results from time variation of both offset voltage and rectified sinusoid signals driving the gate of the switch in Fig. 4.30. The distortion sidebands around odd harmonics result from the gate square wave offset voltage. AC component of the offset square wave, i.e. the square wave toggling between −Voff /2 and Voff /2, can be expanded into the following Fourier series, whose coefficients are calculated in Appendix A: ∞ + V v (t)= off ej(2k+1)ωLOt (4.93) g j(2k +1)π k=−∞ From (4.91) and (4.93), a derivative of source voltage with respect to τ is given by ∞ ∂v (t, τ) −jω ◦ v + −V ω ej(2k+1)ωLOt s = g = off LO (4.94) ∂τ (1 + jωτ)2 2 k=−∞ π 1+j(2k +1)ωLOτ In order to calculate ∂τ/∂I, a simple square law transistor model is used, which implies that gm =2I/(VGS − VTH). Consequently ∂τ C(V − V ) ∂ 1 C(V − V ) 1 = GS TH = − GS TH (4.95) ∂I 2 ∂I I 2 I2 Noting that for a square law transistor the second order transconductance equals to g2 = 2 2 − ∂ I/∂vgs = ∂gm/∂vgs = gm/(VGS VTH), the final expression for ∂τ/∂I is given by: ∂τ − Cg2 = 2 3 (4.96) ∂I gm Having closed form expressions for ∂vs(t, τ)/∂τ and ∂τ/∂I, the current flowing through C at sideband frequencies induced by the offset square wave voltage source can be calculated as: ∞ −2Cg −V ω + (2k +1)ω ej(2k+1)ωLOt i (t)=i (t) 2 jC off LO LO C in,imd2 g3 π 2 m k=−∞ 1+j(2k +1)ωLOτ ∞ 2jg V (ω τ)2 + (2k +1)ej(2k+1)ωLOt 2 off LO = iin,imd2(t) 2 (4.97) πgm k=−∞ 1+j(2k +1)ωLOτ Chapter 4. Downconversion Mixers 79 The output, low-frequency differential second order distortion current is found as a low- pass filtered product of the parasitic capacitor current iC times the 50%-duty cycle switching function, expressed below by means of its Fourier series expansion: ∞ + 2 i (t)=LPF i (t) ej(2k+1)ωLOt out,imd2 C j(2k +1)π k=−∞ ∞ ∞ 4V g (ω τ)2 + (2k +1)ej(2k+1)ωLOt + ej(2k+1)ωLOt off 2 LO = iin,imd2(t) 2 LPF 2 π gm (2k +1) k=−∞ 1+j(2k +1)ωLOτ k=−∞ ∞ −4V g (ω τ)2 + 1 off 2 LO = iin,imd2(t) 2 2 π gm 1+j(2k +1)ω τ k=−∞ LO ∞ −4V g (ω τ)2 + 1 1 off 2 LO = iin,imd2(t) 2 2 + 2 π gm 1+j(2k − 1)ωLOτ 1 − j(2k − 1)ωLOτ k=1 ∞ 2 −8V g (ω τ)2 + 1 − (2k − 1)ω τ off 2 LO LO = iin,imd2(t) 2 2 (4.98) π gm 2 k=1 1+ (2k − 1)ωLOτ The distortion sidebands around even harmonics result from the rectified sinusoid voltage signal. To calculate them, the rectified sinusoid signal is expanded into the following Fourier series, whose coefficients are calculated in Appendix A: ∞ A + ej2kωLOt v (t)= LO (4.99) g π 1 − 4k2 k=−∞ Sensitivity of source voltage to the time constant τ equals to ∞ ∂v (t, τ) −jω ◦ v A + −j2kω ej2kωLOt s = g = LO LO (4.100) ∂τ (1 + jωτ)2 π − 2 2 k=−∞ 1 4k 1+j2kωLOτ Using closed form expressions for ∂vs(t, τ)/∂τ and ∂τ/∂I, the current flowing through C at sideband frequencies induced by the rectified sinusoid can be calculated as: ∞ − + − 2 2 j2kωLOt 2Cg2 ALO j4k ωLOe iC(t)=iin,imd2(t) jC g3 π − 2 2 m k=−∞ 1 4k 1+j2kωLOτ ∞ −8g (ω τ)2A + k2ej2kωLOt 2 LO LO = iin,imd2(t) 2 (4.101) πgm − 2 k=−∞ 1 4k 1+j2kωLOτ The output, low-frequency differential second order distortion due to this current is a low-pass filtered product of iC times the offset-induced pulse sequence (Fig. 4.26) having approximately the following Fourier series expansion, calculated in Appendix A: +∞ sin k Voff 2 ALO T (t) ≈ ej2kωLOt (4.102) π k k=−∞ The approximation comes from the fact that in reality the pulses in the sequence are not equally spaced by TLO/2. Nevertheless, spectra of the actual pulse sequence and the ideal pulse sequence match quite well for several first harmonics. Chapter 4. Downconversion Mixers 80 Assuming sin(kVoff /ALO) ≈ kVoff /ALO, which holds for several first harmonics, the following low frequency distortion current is found: i (t)=LPF i (t)T (t) out,imd2 C ∞ ∞ −16g (ω τ)2V + k2ej2kωLOt + ≈ 2 LO off j2kωLOt iin,imd2(t) 2 LPF 2 e π gm − 2 k=−∞ 1 4k 1+j2kωLOτ k=−∞ ∞ −16g (ω τ)2V + k2 2 LO off = iin,imd2(t) 2 2 π gm 1 − 4k2 1+j2kω τ k=−∞ LO ∞ −16g (ω τ)2V + k2 k2 2 LO off = iin,imd2(t) 2 2 + 2 π gm − 2 − 2 − k=1 1 4k 1+j2kωLOτ 1 4k 1 j2kωLOτ ∞ −32g (ω τ)2V + k2 1 − (2kω τ)2 2 LO off LO = iin,imd2(t) 2 2 (4.103) π gm − 2 2 k=1 1 4k 1+(2kωLOτ) To quantify the indirect leakage of second-order distortion due the parasitic capacitance C, a parameter LIND,C is introduced. It is defined as the differential output low-frequency second- order distortion divided by the input low-frequency second-order distortion. From (4.98) and (4.103), the value of LIND,C is calculated as ! " ∞ 2 g (ω τ)2V + 8 1 − (2k − 1)ω τ 32k2 1 − (2kω τ)2 − 2 LO off ! LO " LO LIND,C = 2 2 2 + 2 π gm − − 2 2 k=1 1+ (2k 1)ωLOτ 1 4k 1+(2kωLOτ) (4.104) It can be seen that LIND,C is directly proportional to the offset voltage Voff . Moreover, it depends on the value of the parasitic capacitance C through the time constant τ as well as on the LO signal frequency and operating points of the switching pair transistors (gm and g2). As such, LIND,C depends also on the biasing current IDC, which sets the operating points of the switches. The fact that indirect leakage depends on second order nonlinearity of the switches is quite obvious. If the switch transconductance did not depend on the current flowing though the switch (implying g2=0), the time constant τ would not be modulated and no distortion sidebands around LO harmonics would be generated. From (4.104), LIND,C does not depend explicitly on the amplitude ALO of the LO signal driv- ing the switches. However, in reality such dependence exists. The LO signal has an influence on the time-varying parameters of the switching transistors, including gm and g2 and consequently affects the value of the indirect leakage LIND,C, although in a much more complicated manner than in the case of the direct leakage, where simple inverse proportionality holds. To calculate a static DC offset component resulting from the indirect leakage due to the parasitic capacitance C, the first term on the right hand side of (4.92) is taken to calculate the current at LO harmonic frequencies flowing through C. For odd harmonics generated by the square wave offset voltage source, the following expres- sion results ∞ + j(2k+1)ωLOt Voff CωLO e iC(t)=jωC ◦ vs = (4.105) π 1+j(2k +1)ω τ k=−∞ LO The DC offset component can now be calculated as a low-pass filtered product of iC times the Chapter 4. Downconversion Mixers 81 −3 x 10 Total leakage vs. LO frequency 8 7 6 5 4 Total leakage 3 Theory C = 0.1pF 2 C = 0.3pF C = 0.5pF 1 0 0.5 1 1.5 2 2.5 LO frequency [GHz] Figure 4.31: Total leakage vs. LO frequency 50%-duty cycle switching function ∞ + 2 I =LPF i (t) ej(2k+1)ωLOt OUT,DC C j(2k +1)π k=−∞ +∞ − 2Voff CωLO 1 = 2 jπ 2k +1 1+j(2k +1)ωLOτ k=−∞ ∞ 2V Cω + −1 1 = off LO + jπ2 2k − 1 1+j(2k − 1)ω τ 2k − 1 1 − j(2k − 1)ω τ k=1 LO LO ∞ ∞ 2V Cω + 2jω τ 4V Cω2 τ + 1 = off LO LO = off LO jπ2 − 2 π2 − 2 k=1 1+ (2k 1)ωLOτ k=1 1+ (2k 1)ωLOτ (4.106) Similarly, for even harmonics due to the rectified sinusoid ∞ + j2kωLOt jALOCωLO 2ke iC(t)=jωC ◦ vs = (4.107) π 1 − 4k2 1+j2kω τ k=−∞ LO The DC offset component is a low-pass filtered product of the current iC times the offset-induced pulse sequence T (t). Assuming again that sin(kVoff /ALO) ≈ kVoff /ALO, the static DC offset is Chapter 4. Downconversion Mixers 82 found to be +∞ 2Voff j2kωLOt IOUT,DC =LPF iC(t) e πALO k=−∞ ∞ j4V Cω + k = off LO 2 2 π 1 − 4k 1+j2kωLOτ k=−∞ ∞ j4V Cω + k k = off LO − π2 1 − 4k2 1+j2kω τ 1 − 4k2 1 − j2kω τ k=1 LO LO ∞ j4V Cω + k −j4kω τ = off LO LO π2 1 − 4k2 1+(2kω τ)2 k=1 LO ∞ 16V Cω2 τ + k2 = off LO (4.108) π2 1 − 4k2 1+(2kω τ)2 k=1 LO Using (4.106) and (4.108), the overall static DC offset due to the indirect mechanism asso- ciated with the parasitic capacitance C can be written as 2 +∞ 2 Voff gm(ωLOτ) 4 16k IOUT,DC,C = + π2 − 2 1 − 4k2 1+(2kω τ)2 k=1 1+ (2k 1)ωLOτ LO (4.109) Static DC offset due to the indirect leakage mechanism induced by the parasitic capacitance C is directly proportional to the offset voltage Voff . Moreover, it depends on the value of par- asitic capacitance C through the time constant τ, on the LO signal frequency and on linear transconductance gm of the switching pair transistors. Comparing (4.104) and (4.109), a dif- ferent dependence of low-frequency distortion and static DC offsets on switching pair operating conditions including LO frequency and biasing current can be noticed. To validate the presented indirect leakage mechanism analysis, simulations of the IMD2 leakage and static DC offset versus LO frequency for various values of the parasitic capacitance C were carried out. Switching pair biasing current IDC has been set to 2mA. LO signal with 10dBm power referred to 50Ω has been used. A threshold voltage mismatch of 10mV has been introduced. The series in (4.104) and (4.109) has been truncated for k=32. Total IMD2 leakage (sum of direct and indirect leakage components) vs. LO frequency for various values of parasitic capacitance C is plotted in Fig. 4.31. Despite using a very simplified model, theoretical predictions match quite well with simulations. At low LO frequencies, the leakage is dominated by the direct component. As the LO frequency increases, the indirect component becomes significant and it effectively reduces the value of the total distortion leakage. For larger parasitic capacitances, the dependence of the total leakage on the LO frequency becomes more pronounced. A discrepancy between simulated and theoretical results in the form of slight constant shift of the leakage across all LO frequencies can be attributed to the inaccuracy of the direct leakage model, as has been already observed in Fig. 4.27. Predictions of the static DC offset vs. LO frequency according to the theoretical model and simulations are compared in Fig. 4.32. The accuracy of theoretical predictions is satisfactory. The model reveals a dependence of the DC offset on the LO frequency and increased sensitivity to LO frequency for larger values of the parasitic capacitance C. Figures 4.31 and 4.32 show that differential low-frequency second-order intermodulation distortion and static DC offsets change differently in response to variations of the LO frequency. Chapter 4. Downconversion Mixers 83 Static DC offset vs. LO frequency 28 26 Theory C = 0.1pF 24 C = 0.3pF C = 0.5pF 22 20 18 Static DC offset [uA] 16 14 12 0.5 1 1.5 2 2.5 LO frequency [GHz] Figure 4.32: Total static DC offset vs. LO frequency Since for given mismatches and operating conditions the total IMD2 leakage decreases with increasing LO frequency while the static DC offset increases, it may happen that at some LO frequency the differential output second-order distortion is zero despite the significant static DC offset. Such situation is not possible if only the direct mechanism determines the distortion leakage. Next, the indirect mechanism caused by the output conductance of the input stage is studied. To estimate its impact on the overall leakage, an equivalent source follower circuit model shown in Fig. 4.30 is used, where the generic impedance Z(ω) is replaced with the small-signal output resistance of the input stage. Since the output resistance is an inverse of the output conductance 1 Z(ω)=ro,in = , (4.110) gds,in the following equation can be written, which describes a current flowing through ro,in in response to a gate excitation: (vg − vs)gm = vsgds,in (4.111) By introducing a parameter α = gds,in/gm, the following equation relating vg and vs can be written: v v = g (4.112) s 1+α Similarly to the analysis of the switching pair loaded with parasitic capacitance C, the source voltage signal can be expressed as: ∂vs(t, α) ∂α vs(t, α)=vs(t, α0)+ iin,imd2(t) (4.113) ∂α ∂I I=IDC Sensitivities of source voltage to the parameter α as well as the α parameter to the biasing current are found in a similar manner as in the previous case of C-induced indirect leakage considerations ∂v (t, α) −v s = g (4.114) ∂α (1 + α)2 Chapter 4. Downconversion Mixers 84 ∂α − g2gds,in = 2 3 (4.115) ∂I gm The current flowing through the output resistance ro,in at sideband frequencies due to the square wave offset voltage is given by ∞ 2 + j(2k+1)ωLOt 2Voff g2g e i (t)=i (t) ds,in (4.116) r in,imd2 jπ(1 + α)2g3 (2k +1) m k=−∞ Thus, the differential output low-frequency second order distortion current is calculated as ∞ + 2 i (t)=LPF i (t) ej(2k+1)ωLOt out,imd2 r j(2k +1)π k=−∞ 2 +∞ 2 4Voff g2gds,in 1 Voff g2α = iin,imd2(t) 2 2 3 2 = iin,imd2(t) 2 (4.117) π (1 + α) g (2k +1) (1 + α) gm m k=−∞ +∞ 2 2 where an identity k=−∞ 1/(2k +1) = π /4, derived in Appendix A, has been used. Similarly, the current flowing through the output resistance ro,in at sideband frequencies due to the rectified sinusoid is given by 2 +∞ 2ALOg2g ej2kωLOt i (t)=i (t) ds,in (4.118) r in,imd2 π(1 + α)2g3 (1 − 4k2) m k=−∞ Consequently, the differential output low-frequency second order distortion current is ⎡ ⎤ +∞ sin k Voff 2 ALO i (t)=LPF⎣i (t) ej2kωLOt⎦ out,imd2 r π k k=−∞ 2 +∞ ≈ 4Voff g2α 1 iin,imd2(t) 2 2 2 = 0 (4.119) π (1 + α) gm (1 − 4k ) k=−∞ ≈ where an approximation sin(kVoff /ALO) kVoff /ALO has been used once again. Additionally, +∞ − 2 an identity k=−∞ 1/(1 4k ) = 0, proved in Appendix A, has been used, which leads to a conclusion that the indirect leakage induced by ro,in due to the rectified sinusoid is equal zero (according to the presented model). In reality, it is not equal zero, because consecutive pulses are not spaced from each other exactly by TLO/2 but nevertheless its value is small. To quantify the indirect leakage of second-order distortion due to the output resistance of the input stage ro,in, a parameter LIND,roin is used. Similarly to LIND,C, it is defined as the differential output low-frequency second-order distortion divided by the input low-frequency second-order distortion. From (4.117) and (4.119), the overall indirect leakage gain due to the output resistance of the input stage is found to be 2 g2α Voff LIND,roin = 2 (4.120) gm(1 + α) The indirect leakage gain LIND,roin is directly proportional to the offset voltage Voff .Ad- ditionally, it depends on the value of the output conductance of the input stage gds,in through the parameter α. Moreover, it depends on the operating points of the switching pair transistors (gm and g2) and thus implicitly on the biasing current IDC. In contrast to the indirect leakage induced by the parasitic capacitance C, LIND,roin does not depend on the LO frequency. Chapter 4. Downconversion Mixers 85 −3 x 10 Total leakage vs. LO frequency 7.4 7.2 7 Theory roin = 1kOhm 6.8 roin = 2kOhm roin = 3kOhm Total leakage 6.6 6.4 6.2 0.5 1 1.5 2 2.5 LO frequency [GHz] Figure 4.33: Total leakage vs. LO frequency Calculation of the static DC offset component resulting from the indirect leakage mechanism due to the output resistance ro,in is performed in the same manner as in the case of the parasitic capacitance C. For odd LO harmonics generated by the offset voltage, the respective current flowing through ro,in is found to be ∞ V g + ej(2k+1)ωLOt i (t)=g v (t)= off ds,in (4.121) r ds,in s jπ(1 + α) (2k +1) k=−∞ The DC offset component is calculated as a low-pass filtered product of ir(t) times the 50%-duty cycle switching function ∞ + 2 I =LPF i (t) ej(2k+1)ωLOt OUT,DC r j(2k +1)π k=−∞ ∞ 2V g + 1 V g α = off ds,in = off m (4.122) π2(1 + α) (2k +1)2 2(1 + α) k=−∞ Similarly, for even harmonics due to the rectified sinusoid, the current flowing through ro,in is ∞ A g + ej2kωLOt i (t)=g v (t)= LO ds,in (4.123) r ds,in s π(1 + α) (1 − 4k2) k=−∞ and after taking the previously discussed simplifying assumption into account, the corresponding DC offset component is found to be +∞ +∞ 2Voff j2kωLOt 2Voff gmα 1 IOUT,DC =LPF ir(t) e = 2 2 = 0 (4.124) πALO π (1 + α) 1 − 4k k=−∞ k=−∞ As in the case of ro,in induced indirect IMD2 leakage, the DC offset due to even LO harmonics is zero according to the developed model. Chapter 4. Downconversion Mixers 86 Static DC offset vs. LO frequency 21 20 Theory 19 roin = 1kOhm roin = 2kOhm 18 roin = 3kOhm 17 Static DC offset [uA] 16 15 14 0.5 1 1.5 2 2.5 LO frequency [GHz] Figure 4.34: Total static DC offset vs. LO frequency Using (4.122) and (4.124), the overall static DC offset due to the indirect mechanism asso- ciated with the output resistance ro,in of the input stage can be written as V g α I = off m (4.125) OUT,DC,roin 2(1 + α) It can be seen that the static DC offset (4.125) is directly proportional to the offset voltage Voff . Moreover, it depends on the value of the output conductance of the input stage gds,in through the parameter α and on the transconductance gm of the switching pair transistors. Similarly to the indirect leakage gain LIND,roin, the static DC offset IOUT,DC,roin does not depend on the LO frequency. To verify the presented theory of indirect leakage mechanism associated with the output resistance ro,in of the mixer input stage, simulations of the IMD2 leakage and static DC offset versus LO frequency have been carried out. The same biasing, mismatch and LO power level conditions have been set as in the case of simulations with the parasitic capacitance C.Fig.4.33 shows plots of the total IMD2 leakage including an indirect component due to ro,in versus LO frequency for various values of the resistance ro,in. As in the case of C-induced indirect leakage, a constant shift of the leakage across all LO frequencies is visible and it can be attributed to the inaccuracy of the direct leakage model. Despite this shift, the simulated relative contributions of the indirect leakage are comparable with the theoretical predictions. It can be seen that the distortion leakage increases as the output resistance decreases. The plots also confirm the theoretical prediction that there is no significant dependence of the IMD2 leakage on the LO frequency. Theoretical and simulated static DC offset current vs LO frequency for various values of ro,in are plotted in Fig. 4.34. Again, no dependence on the LO frequency is observed. The static DC offset increases as the output resistance of the input stage decreases. Chapter 4. Downconversion Mixers 87 Id Z( ) IDC irf1 irf2 Figure 4.35: Equivalent model of the switching pair - nonlinearity analysis Switching Pair Nonlinearity and Mismatches Second order intermodulation distortion is generated also as a result of nonlinearities of the switching pair. To analyze this IMD2 generation mechanism, an equivalent source follower model of the switching pair shown in Fig. 4.35 is used. In comparison to the model used in the leakage analysis, a current source injecting low-frequency IMD2 distortion is replaced with current sources representing a two-tone RF interferer irf = IRF(cos ω1t +cosω2t). The I-V characteristic of the transistor can be expressed by means of its Taylor series ex- pansion 2 3 id = gm(vg − vs)+g2(vg − vs) + g3(vg − vs) + ... (4.126) The source voltage signal vs can be related to the applied input signals by means of a Volterra series expansion ◦ ◦ 2 ◦ vs = G1(ω) irf + G11(ω, ω) irf + H1(ω) vg ◦ ◦ ◦ ◦ 2 + F11(ω, ω) vg irf + F111(ω, ω, ω) vg irf + ... (4.127) where other Volterra kernels have been omitted as they play less significant or no role at all in the following analysis. In (4.127), the third-order nonlinear transfer function F111(ω, ω, ω) is responsible for distor- tion sidebands in the source voltage spectrum around LO harmonics. Its closed form expression is derived in Appendix A. Distortion sidebands in the spectrum of the current flowing through the impedance Z can be jωt −jωt calculated by first noting that cos ωt =(e + e )/2 and assuming that Δω = |ω1 − ω2| << ωLO,ω1,ω2, which also implies that F111(kωLO,ω1, −ω2) ≈ F111(kωLO, −ω1,ω2). For sidebands around odd LO harmonics, which result from the gate square wave offset voltage, the distortion current is given by ∞ + V I2 i (t)= off RF Y (2k +1)ω F (2k +1)ω , ±ω , ∓ω Z 4j(2k +1)π LO 111 LO 1 2 k=−∞ × ej[(2k+1)ωLO−Δω]t + ej[(2k+1)ωLO+Δω]t , (4.128) where Y (ω)=1/Z(ω) is the admittance loading the source node. Chapter 4. Downconversion Mixers 88 −8 −8 x 10 IMD2 distortion vs. RF interferer frequency x 10 IMD2 distortion vs. RF interferer frequency 2.5 2.5 C = 0.1pF C = 0.1pF C = 0.2pF C = 0.2pF 2 C = 0.3pF 2 C = 0.3pF 1.5 1.5 IMD2 [A] 1 IMD2 [A] 1 0.5 0.5 0 0 1.5 1.75 2 2.25 2.5 1.5 1.75 2 2.25 2.5 RF frequency [GHz] RF frequency [GHz] (a) Simulation (b) Theory Figure 4.36: IMD2 distortion vs. RF interferer frequency The differential output low-frequency second order distortion current is calculated as a low- pass filtered product of the current iZ times the 50%-duty cycle switching function ∞ + 2 i (t)=LPF i (t) ej(2k+1)ωLOt out,imd2 Z j(2k +1)π k=−∞ ∞ + V I2 = off RF Y (2k +1)ω F (2k +1)ω , ±ω , ∓ω cos(Δωt) (2k +1)2π2 LO 111 LO 1 2 k=−∞ (4.129) For sidebands around even LO harmonics resulting from the rectified sinusoid voltage signal, the distortion current is given by ∞ + A I2 i (t)= LO RF Y 2kω F 2kω , ±ω , ∓ω Z 4π(1 − 4k2) LO 111 LO 1 2 k=−∞ × ej(2kωLO−Δω)t + ej(2kωLO+Δω)t . (4.130) The differential output low-frequency second order distortion current is calculated as a low- pass filtered product of the current iZ times the offset-induced pulse sequence (4.102). As in the case of distortion leakage considerations, using the approximation sin(kVoff /ALO) ≈ kVoff /ALO, the low-frequency second-order distortion current is +∞ 2Voff j2kωLOt iout,imd2(t)=LPF iZ(t) e πALO k=−∞ ∞ + V I2 = off RF Y 2kω F 2kω , ±ω , ∓ω cos(Δωt) (4.131) (1 − 4k2)π2 LO 111 LO 1 2 k=−∞ Chapter 4. Downconversion Mixers 89 Id ro,sw Cp IDC irf1 irf2 Co Figure 4.37: Equivalent model of the switching pair - mismatch asymmetry analysis Taking into account distortion demodulated from around odd (4.129) and even harmonics (4.131) as well as considering a direct leakage of distortion generated by the second-order trans- fer function G11(ω, ω) (Appendix A), the total differential output low-frequency second-order distortion can be written as: 2 +∞ ± ∓ Voff IRF Y (2k +1)ωLO F111 (2k +1)ωLO, ω1, ω2 iout,imd2(t)= 2 2 π −∞ (2k +1) k= Y 2kω F 2kω , ±ω , ∓ω 2 LO 111 LO 1 2 Voff IRF ± ∓ + 2 cos(Δωt)+ Y (0)G11( ω1, ω2)cos(Δωt) (1 − 4k ) πALO 2 =ΦSWNLIRF cos(Δωt), (4.132) where ΦSWNL collectively describes the switching pair differential second order distortion gen- eration behavior. Equation (4.132) shows that second order distortion generated by the switching pair is di- rectly proportional to the offset voltage Voff . Moreover, it depends on the impedance loading the common source node, on the operating points of the switches (gm, g2 and g3) through F111 and G11 as well as on the LO frequency. Most importantly, the switching pair nonlinearity introduces dependence of IMD2 on the frequency of RF interferers. The presence of the third order transfer function F111(ω, ω, ω) in (4.132) leads to an effect which can be called a self cross modulation phenomenon. The AM modulation of the input current interferer is transferred in a form of its squared envelope on the harmonics of the LO signal, which are subsequently demodulated to baseband. Fig. 4.36a shows simulation results of differential second-order intermodulation distortion generated by the switching pair versus RF interferer frequency for various capacitances loading the common source node. The operating conditions of the switching pair were the same as in the case of indirect leakage simulations. The LO frequency has been fixed to 2GHz. A two-tone RF current with each tone having an amplitude of 0.1mA has been injected. The resulting output second-order distortion significantly depends on the value of parasitic capacitance. As far as dependence of distortion on RF interferer frequency is concerned, a relatively mild relationship is observed. It is more pronounced for larger parasitic capacitances, where the distortion decreases with increasing RF frequency. In Fig. 4.36b, the corresponding theoretical predictions are plotted. The second-order dis- tortion is overestimated but general dependence on parasitic capacitance and RF interferer frequency is qualitatively well modeled. Chapter 4. Downconversion Mixers 90 −9 −9 x 10 IMD2 distortion vs. RF interferer frequency x 10 IMD2 distortion vs. RF interferer frequency −3 Cp = 0.1pF C = 0.1pF 2.5 Cp = 0.2pF −3.5 C = 0.2pF Cp = 0.3pF C = 0.3pF 2 −4 1.5 −4.5 IMD2 [A] IMD2 [A] 1 −5 0.5 −5.5 0 −6 1.5 1.75 2 2.25 2.5 1.5 1.75 2 2.25 2.5 RF frequency [GHz] RF frequency [GHz] (a) Simulation (b) Theory Figure 4.38: IMD2 distortion vs. RF interferer frequency - mismatch asymmetry Switching pair nonlinearities are also responsible for generation of low-frequency common mode second-order distortion, provided that the admittance Y has non-zero value at DC. This is usually the case because of finite output conductance of the mixer input stage. The value of common-mode IMD2 distortion is given by 1 A i (t)= Y (0)G11(±ω , ∓ω )+ LO Y (0)F 0, ±ω , ∓ω I2 cos(Δωt) cm,imd2 2 1 2 2π 111 1 2 RF 2 =ΨSWNLIRF cos(Δωt), (4.133) where ΨSWNL collectively describes the switching pair common mode second-order distortion generation behavior. In current-mode output mixers operating at low supply voltages, switching transistors are often driven to deep triode region. The large output conductance of the switches combined with capacitances connected to the output of the switching pair leads then to an interesting effect in generation of second order intermodulation distortion. To analyze it, a model shown in Fig. 4.37 is used. Cp is the parasitic capacitance loading the common source node of the switching pair. Co is the output capacitance while ro,sw denotes the small-signal output resistance of the switch. The source follower itself is assumed to have an infinite output resistance. The presented model is not equivalent to the switching pair loaded at input and output by capacitances and operating in deep triode region. However, it reproduces an environment (in terms of impedances) seen by the common source node, which is crucial to the second order distortion generation mechanisms. The effect of impedance containing a serial Co − ro,sw connection can be seen in Fig. 4.38a, which shows plots of second order distortion as a function of the RF interferer frequency for several values of the parasitic capacitance Cp. As in previous simulations, the LO frequency has been fixed to 2GHz. An asymmetry between magnitudes of second order distortion current for RF interferer frequencies below and above the LO frequency is evident. The effect is also predicted by the analytical model developed earlier, in which the impedance Z(ω) is replaced with the structure shown in Fig. 4.37. As seen in Fig. 4.38b, the theoretical predictions do not match well with the simulated values. In fact, the polarities of simulated and theoretical distortion currents are opposite. The differences can be attributed to the serious simplifications made in the analysis. Nevertheless, the effect of asymmetrical IMD2 generation (relative to the LO frequency) is captured. Chapter 4. Downconversion Mixers 91 By examining the structure of the third-order Volterra kernel F111(ω, ω, ω) (Appendix A), the presented phenomenon has been traced to the second-order mixed transfer function F11(ω1,ω2) relating a product of gate voltage and input current with a source voltage response at an angular frequency (ω1 + ω2). The closed form expression, derived in appendix A, is repeated here for convenience: F11(ω1,ω2)=2g2 1 − H1(ω1) G1(ω2)G1(ω1 + ω2). (4.134) In the above expression, ω1 is the angular frequency of the gate voltage (i.e. it corresponds to the LO frequency) while ω2 is the angular frequency of the input current (i.e. it corresponds to the RF frequency). Therefore, for ω1 = ωLO and ω2 = −ωRF, the first order transfer − function G1(ω LO ωRF) depends on the difference between LO and RF frequencies. Since G1(ω)=−1/ gm + Y (ω) , the value of admittance Y at (ωLO − ωRF) plays a major role in the asymmetrical IMD2 generation. In a particular case when the resistance ro,sw is small (several hundred Ohms), Co has several pF while the parasitic capacitance Cp has several hundred fF, the antisymmetrical phase characteristic of the resulting admittance contains local extrema, leading to asymmetry in IMD2 generation. Second order distortion can be generated by the switching pair nonlinearities also in case of no mismatches between parameters of the switching transistors. This may happen if there is coupling of the LO signal to the input of the mixer. Denoting by ILO sin ωLOt the current injected to the common source node of the switching pair due to coupling mechanisms, it can be shown that the resulting second order distortion at the differential output of the switching pair is 2 IRFILO cos(Δωt) iout,imd2(t)= Y −ωLO G111 −ωLO, ±ω1, ∓ω2 2π + Y ωLO G111 ωLO, ±ω1, ∓ω2 , (4.135) where G111(ω, ω, ω) is the third-order nonlinear transfer function, whose closed form expression is derived in Appendix A. From (4.135), the output differential second order distortion current is directly proportional to the amplitude of the current at LO frequency, which in turn is pro- portional to the linear transconductance of the input stage as well as to the coupling coefficient (see (4.80)). Output Stage Mismatches The output stage of the mixer influences the second-order distortion performance through its own mismatches, which convert common mode distortion generated in the mixer core to the differential output distortion. The effects of load mismatches in case of mixers without a common mode feedback in the output stage differ substantially from those in mixers containing a CMFB block. In voltage mode output mixers, traditional resistive loads are usually implemented as first order low-pass filters by using additional capacitors in parallel with load resistors in order to relax the linearity requirements of the blocks following the mixer (Fig. 4.39a). The output differential second-order distortion voltage can then be written as v (t)=Z i (t) − Z i (t) out,imd2 1 imd2,1 2 imd2,2 i (t) i (t) = Z i (t)+ diff,imd2 − Z i (t) − diff,imd2 1 cm,imd2 2 2 cm,imd2 2 = ZΔZicm,imd2(t)+Zidiff,imd2(t) (4.136) where Zi = RiCi = Ri/(1 + jωRiCi), ΔZ =(Z1 − Z2)/Z and Z =(Z1 + Z2)/2. Chapter 4. Downconversion Mixers 92 Difference between phases of ZΔZ and Z 40 35 30 25 20 RC pole frequencies mismatched Ro Co Co+ C Ro+ R 15 RC pole frequencies equal 10 Phase difference [°] 5 0 iimd2,1 iimd2,2 −5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Offset frequency [MHz] (a) RC load (b) Phase difference between ZΔZ and Z Figure 4.39: RC load mismatches in voltage mode output mixers Potentially different mismatches between load resistors and capacitors lead to different pole frequencies in the output branches, which in turn result in different phase characteristics of ZΔZ and Z. As an illustration, simulated difference between phases of ZΔZ and Z is plotted in Fig. 4.39b as a function of baseband frequency (offset frequency between interferer tone frequencies). It can be observed that in case of mismatched pole frequencies (R1C1 = R2C2) the difference between phases of ZΔZ and Z increases rapidly with the frequency offset while it remains relatively constant if the pole frequencies are equal. The most important effect of RC pole frequency mismatches in voltage mode output mixers is that common mode and differential mode distortion currents are converted to differential output voltages with different phase relationships. More details about RC load mismatch effects in voltage mode output mixers can be found in [35]. In mixers containing an output common mode feedback block, two issues need to be ad- dressed. First, bandwidth of the CMFB loop which affects the response of output current sources to common mode excitation coming from the mixer core as well as determines voltage swings in the output branches of the switching stage. Second, the impact of RC load mismatches on IIP2. Both issues need to be analyzed for mixers operating at high and low voltage supplies. The analysis of effects of CMFB loop bandwidth is carried out based on a model shown in Fig. 4.40. To understand how the loop bandwidth affects the differential second order distortion, a common mode response of the current sources ics =(ics,p + ics,n)/2 to a common mode excitation iimd2 =(iimd2,p + iimd2,n)/2 is analyzed at first. Using Kirchoff’s current law, the following equation can be written ZGm(f) ics = iimd2, (4.137) 1+ZGm(f) where Z =(Zp + Zn)/2andGm(f) is a frequency dependent transconductance of the common mode feedback loop from the common mode voltage across the impedance Z to the common mode current ics. From (4.137) is can be concluded that if the impedance Z contains a reactive component then as the transconductance Gm(f) decreases with increasing frequency, the difference in phases of iimd2 and ics common mode currents should become apparent. This is confirmed by simulations, whose results are shown in Fig. 4.40b. It can be seen that for CFMB loops having narrow loop bandwidths (referred to as slow CMFB loops) the phase difference becomes significant as the frequency increases. In case of CMFB loops with wide bandwidths (referred to as fast CMFB Chapter 4. Downconversion Mixers 93 Phase difference between CM excitation and response 4 3.5 3 Zp(f) Ics,p Ics,n Zn(f) 2.5 CMFB 2 Slow CMFB loop 1.5 Fast CMFB loop Phase difference [°] 1 RR 0.5 iimd2,1 iimd2,2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Offset frequency [MHz] (a) CMFB loop (b) Phase difference between iimd2 and ics Figure 4.40: Effects of CMFB loop bandwidth loops), phase difference between iimd2 and ics remains negligible in the simulated frequency range. An important consequence of these mechanisms is that possible mismatches between the current sources in slow CMFB loops result in a differential current component (ics,p − ics,n) having a potentially different phase than both the differential (iimd2,p − iimd2,n) and common mode (iimd2,p + iimd2,n)/2 components exciting the structure. Another effect associated with CMFB loop bandwidth appears in low-voltage current mode output mixers. A decreased loop gain at higher frequencies leads to larger common mode voltage swings at the output branches of the switching stage. In combination with large output conductance of the switches, these voltage swings generate a potentially phase shifted current component (with respect to current coming from the mixer core) flowing through the switch output conductance, which gets translated to the differential output current in case of unequal conduction times of the switches caused by mismatches between the switching devices. Frequency dependent gain characteristic of the CMFB loop affects also the impact of RC load mismatches on differential second order distortion. The mechanisms are studied for a current mode output mixer with an opamp-based RC load (shown in Fig. 4.6c), in which the current sources are controlled by a CMFB block. The effects of RC load imbalances are demonstrated for two mixers operating at different supply voltages. The first case corresponds to a mixer operating at 2.5V. Such high voltage supply allows to implement a common-gate amplifier structure on top of the switching stage, increasing its isolation from the output stage. In this case, mismatches between the load resistors and capacitors affect the differential IMD2 depending only on the bandwidth of the CMFB circuit. Simulation results shown in Figure 4.41a correspond to an equally mismatched opamp- based RC load, where mismatches have been introduced between both resistors and capacitors. It can be seen that for fast CFMB loops the IIP2 is much less sensitive to load mismatches than for slow CMFB loops. In both cases, the IIP2 decreases with frequency offset because CMFB gain decreases at higher frequencies, allowing more common-mode distortion to flow through the RC load rather than through the current sources. In low-voltage current mode output mixers, it is often not feasible to use an isolating common- gate amplifier on top of the switching stage. Consequently, output stage mismatches affect the switching behavior of transistors in the switching stage. As an example, a current mode output mixer operating at 1.5V is simulated after introducing mismatches to the opamp RC load. Simulations, whose results are shown in Fig. 4.41b, reveal a much higher sensitivity of IIP2 to output capacitance mismatches than to load resistor mismatches. This happens despite the fact that the example corresponds to a mixer equipped with a fast CFMB loop. Chapter 4. Downconversion Mixers 94 IIP2 vs offset frequency IIP2 vs offset frequency 120 110 Slow CMFB loop 115 Fast CMFB loop 105 110 100 105 95 R and C mismatches 100 90 R mismatch only C mismatch only 95 85 IIP2 [dBm] IIP2 [dBm] 90 80 85 75 80 70 75 65 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Offset frequency [MHz] Offset frequency [MHz] (a) High VDD case (b) Low VDD case Figure 4.41: Impact of RC load mismatches in current mode output mixers Effective Gilbert Cell Mixer Mismatch Having analyzed second order intermodulation mechanisms in the mixer on a circuit level, it is useful to revisit behavioral mismatch modeling and to account for various effects not modeled initially. From considerations in the behavioral modeling section (equations (4.48) and (4.49)), the effective mixer core mismatch can be written as idiff,imd2 ΔIMD2eff = , (4.138) ηnomicm,imd2 where idiff,imd2 is the output differential mode distortion current while icm,imd2 is the common mode distortion current. To extend the usefulness of ΔIMD2eff parameter, the behavioral expressions developed earlier in this chapter need to be updated by incorporating the effects of self-mixing and contribution of the switching stage nonlinearities, which determine both indirect leakage of distortion generated in the input stage as well as distortion generated by the switching pairs themselves. To include the distortion due to self-mixing phenomenon in the Gilbert cell core, it is nec- essary to introduce a parameter ΔΛ = (ΛP − ΛN)/Λ where Λ = (ΛP +ΛN)/2andΛP,ΛN are given by (4.82) and depend on the coupling between the differential LO port and each branch of the differential input stage. The contribution of the indirect IMD2 leakage mechanism can be taken into account by simply replacing duty cycle mismatches of the LO switching functions η in (4.49) with so-called effective switching pair mismatches associated with distortion leakage mechanisms, denoted by ΔζL: 1 ΔζL = LDIR + LIND (4.139) ηnom In the above equation, the nominal duty cycle ηnom is used in order to scale the leakage gains so that the resulting mismatch coefficient is consistent with mismatch definition introduced in the behavioral modeling section. In particular, if no indirect leakage is present, the effective switching pair mismatch reduces to the duty cycle mismatch of the LO switching function, i.e. Δη = LDIR/ηnom. Chapter 4. Downconversion Mixers 95 Distortion generated by the switching pairs must be considered separately. For compatibility with the notation associated with leakage mechanisms, the following coefficient is introduced: 1 ΔζSW = ΦSWNL (4.140) ηnom where ΦSWNL is defined by (4.132). The expression for second order intermodulation distortion generated by the switching stage of the Gilbert cell core has to include mismatch between linear transconductances of the input stage transistors Δgm, because such mismatches determine differences in RF interferer current levels injected to each differential pair of the switching stage. It must be noted that in general linear transconductance mismatch Δgm is different from the second-order transconductance mismatch Δg2. Finally, the contribution of the output stage to the effective mixer mismatch is idiff,imd2 = icm,imd2Δχ, (4.141) where Δχ denotes either mismatch between the load resistors or mismatch between the current sources within the CMFB section, depending on which mixer output architecture is used, and icm,imd2 is the total common mode IMD2 current signal of the mixer core: icm,imd2 = icm,in ,imd2 + icm,sw,imd2 2 2 = ARF g2RF + gmRFΨSWNL cos(Δωt). (4.142) Above, icm,in,imd2 is the common mode second order distortion current generated by the input stage of the mixer while icm,sw,imd2 is the common mode second order distortion current generated by the switching stage and given by (4.133). Using the introduced notation, the overall differential output IMD2 signal of the mixer can be written as: 2 idiff,imd2 = ηnomARF 2Λ ΔΛ + 2ΔARF + g2RF ΔζL12 +ΔζL34 0.5Δg2RF +ΔARF + ΔζL12 − ΔζL34 2 − + gmRF ΔζSW12 +ΔζSW34 ΔgmRF +ΔARF + ΔζSW12 ΔζSW34 2 + g2RF + gmRFΨSWNL 2Δχ cos(Δωt) (4.143) From (4.138), (4.142) and (4.143), the effective Gilbert cell mixer mismatch is given by A ΔIMD2eff = 2 (4.144) g2RF + gmRFΨSWNL where A =2ΛΔΛ + 2ΔARF + g2RF ΔζL12 +ΔζL34 0.5Δg2RF +ΔARF + ΔζL12 − ΔζL34 2 − + gmRF ΔζSW12 +ΔζSW34 ΔgmRF +ΔARF + ΔζSW12 ΔζSW34 2 + g2RF + gmRFΨSWNL 2Δχ (4.145) Chapter 4. Downconversion Mixers 96 IIP2 vs. temperature 100 95 90 85 IIP2 [dBm] 80 75 70 −40 −20 0 20 40 60 80 Temperature [C] Figure 4.42: IIP2 vs. temperature 4.4.3 Dependence of IMD2 on Operating Conditions Second order intermodulation distortion of a complete mixer is generated as a result of a mixture of mechanisms analyzed above, each introducing its own dependencies on operating conditions like temperature, voltage supply, biasing current, LO frequency and RF interferer frequency. Specifically, self-mixing mechanism introduces dependence of IMD2 on LO signal amplitude. When using rail-to-rail LO buffers, this means that IMD2 is directly related to the voltage supply. Moreover, it has been shown that self-mixing is affected by the linear and third order nonlinear transconductances of the input stage, both of which depend for example on temperature and biasing current. Direct leakage mechanism is affected by the LO amplitude. Indirect leakage depends on LO frequency and switch transconductances gm and g2, which in turn depend on the biasing current flowing through the switches. Because the source junction diode capacitance forms a part of the parasitic capacitance, it introduces certain temperature dependencies. Distortion generated by switching pair nonlinearities depends on the same pa- rameters as indirect leakage and additionally on third order switch transconductance g3 and on RF interferer frequency. Since even small changes of the above parameters may affect the overall matching, it is instructive to find out to what extent such changes affect the IMD2 performance of the whole mixer. IIP2 Sensitivity to Temperature To check the dependence of IIP2 on temperature, a sample CMOS double balanced mixer has been simulated. Mismatches in the form of threshold voltage variations were introduced both to the input stage and the switching stage in such a way that Δζ12 was different from Δζ34. Additionally, by adding a DC component to the differential LO signal, a duty-cycle mismatched LO waveform was obtained. Mismatches were selected in such a way as to obtain a high IIP2 at room temperature due to cancelling of various mismatch terms. The mixer has been simulated in a temperature range −40◦C ÷ 80◦C. Fig. 4.42 shows that IIP2 depends on temperature, although rather high rejection of IMD2, sufficient for many systems, is maintained over the given temperature range. Chapter 4. Downconversion Mixers 97 IIP2 vs. VDD 110 105 Low LO power 100 High LO power 95 90 85 IIP2 [dBm] 80 75 70 65 1.4 1.45 1.5 1.55 1.6 Supply voltage [V] Figure 4.43: IIP2 vs. supply voltage Temperature dependence of IIP2 can be attributed to its dependence on operating points of active devices (in particular linear and higher order transconductances of the input stage and the switching stage), which in turn depend on charge carrier mobility and threshold voltages, both being affected by temperature. The parasitic source-bulk junction capacitance involved in indirect leakage and switching pair distortion generation mechanisms introduces temperature dependence as well. IIP2 Sensitivity to Supply Voltage To check how IIP2 depends on supply voltage, a low voltage double balanced CMOS mixer with current mode output has been simulated. The same mismatches were introduced to the mixer as in the simulation of IIP2 temperature dependence, except for LO duty cycle mismatch, which was slightly modified to obtain more informative results. In the simulations, an LO signal level was independent of supply voltage (no rail-to-rail LO buffers were used). Fig. 4.43 shows simulation results for two LO power levels, differing by 6dB. The observed dependence of IIP2 on VDD is quite significant only for low LO powers. A peak in the curve corresponds to perfect cancelling of various mismatch terms. For high LO power levels, the dependence of IIP2 on VDD is much weaker. Despite changing the supply voltage, very high IIP2 values are maintained. The observed sensitivity of IIP2 to VDD suggests that periodically varying operating points of the switching transistors (which influence the values of Δζ mismatch parameters) are affected by VDD variations to a higher extent at low LO powers. The dependence results from variations in the output common mode voltage of the mixer, which is set by the CMFB block to half of VDD in this particular mixer. IIP2 Sensitivity to LO Frequency In order to test IIP2 dependence on LO frequency, a two-tone RF interferer at a fixed frequency of 1.5GHz and tone spacing of 100kHz was injected to the mixer input, while the LO frequency was swept from 0.5GHz to 2.5GHz. Supply voltage of the mixer was set to 2.5V. Chapter 4. Downconversion Mixers 98 IIP2 vs. LO frequency 95 90 85 80 75 IIP2 [dBm] 70 65 60 0.5 1 1.5 2 2.5 LO frequency [GHz] Figure 4.44: IIP2 vs. LO frequency Mismatches were introduced in such a way as to obtain a peak in the plot for some LO frequency. RF-LO coupling was not included in the simulation setup. Fig. 4.44 shows that IIP2 depends heavily on LO frequency. Although a relatively high IMD2 rejection is visible for LO frequencies around 1GHz, the IIP2 drops down at 2GHz to unacceptably low values from the viewpoint of some wireless systems. Moreover, the observed dependence of IIP2 on LO frequency is not monotonic. The presented effects can be easily attributed to the dependence of indirect leakage and nonlinear distortion generation mechanisms in the switching pairs on ωLO in the presence of parasitic capacitances loading the common source node of the switches. As seen in (4.104) and (4.132), the dependence of IMD2 on LO frequency is indeed quite complicated. IIP2 Sensitivity to RF Interferer Frequency To check how serious is the dependence of IMD2 on RF interferer frequency, a sample CMOS double balanced mixer has been simulated in various voltage supply conditions. The LO frequency was fixed at 2GHz. A center frequency of a two-tone RF interferer with fixed tone spacing of 100kHz was swept from 1.5GHz to 2.5GHz. Mismatches were introduced to the mixer in a similar manner as in previous simulations. No coupling mechanisms were modeled in the simulation setup. Therefore, the obtained results reflect only device parameter mismatch dependence on RF interferer frequency. Fig. 4.45 shows the simulation results for three cases: a mixer operating at 1.5V supply, a mixer operating at 2.5V supply and a mixer operating also at 2.5V supply but with an additional common gate amplifier stage on top of the switching stage. In case of the mixer operating at 1.5V, a significant dependence of IIP2 on RF interferer frequency exists. The observed asymmetry in IIP2 values for interferers applied below and above the LO frequency can be attributed to the large output conductance of the switching transistors combined with output stage capacitances, as explained analytically earlier in this chapter. In case of the mixer operating at 2.5V without an additional common gate structure, the asymmetry is greatly suppressed due to smaller output conductance of the switches, which pro- vides some isolation of the switching pair common source node from the mixer output. However, Chapter 4. Downconversion Mixers 99 IIP2 vs. RF frequency 78 VDD=1.5V VDD=2.5V VDD=2.5V, 74 Mixer with cascode 70 IIP2 [dBm] 66 62 58 1.5 1.75 2 2.25 2.5 RF frequency [GHz] Figure 4.45: IIP2 vs. RF frequency since transistors in the switching pairs operate in saturation, they are slower. This means that their nonlinear behavior is more pronounced, which affects such mechanisms as indirect IMD2 leakage or distortion generation by the switching pairs. Consequently, the obtained IIP2 values are lower than for the 1.5V mixer. Operation at 2.5V supply enables implementation of a common gate transistor structure on top of the mixer switching stage. The advantage of such solution is that it provides a very good isolation of the switching stage from the mixer output while allowing the switches to operate in deep triode region, where they are faster and generate less distortion. A corresponding plot of IIP2 vs RF interferer frequency in Fig. 4.45 shows that for the same mismatch conditions, a common gate structure indeed improves the IMD2 rejection. Moreover, virtually no dependence on RF interferer frequency is observed. Sensitivity of Effective IMD2 Mismatch to RF Interferer Amplitude At high input levels, second order distortion generated by a given system depends not only on second order nonlinearity but also on higher even order nonlinear terms, in the same way as linear response becomes dependent on third order nonlinearities. In differential circuits, common mode and differential mode transfer functions have to be specified. For these two functions, higher-order nonlinear terms may become significant at different input levels. In the context of second order distortion in downconversion mixers, this behavior can be analyzed by first noting that differential distortion is proportional to a product of common mode distortion and the effective mixer mismatch. At low input levels, both common mode and differential mode distortion levels change at a rate 2dB/1dB with the input signal level. The fact that levels of differential IMD2 and common mode IMD2 start to change at different rates means that effective mixer mismatch becomes dependent on the level of the input signal. Such dependence of ΔIMD2eff on RF interferer amplitude manifests itself for instance in low voltage active mixers with pseudo-differential input transconductors. As an example, a low voltage double balanced mixer has been simulated in two cases. At first, mismatches were introduced to the mixer input and switching stages. RF-LO coupling was not modeled. Fig. 4.46a shows that at high input levels, the effective mixer mismatch becomes dependent on the Chapter 4. Downconversion Mixers 100 IIP2 and vs. RF input power IIP2 and vs. RF input power ΔIMD2eff ΔIMD2eff 0.02 74 0.05 62 0.018 72 0.045 60 0.016 70 0.04 58 0.014 68 0.035 56 IIP2 [dBm] IIP2 [dBm] 0.012 66 0.03 54 Effective IMD2 mismatch Effective IMD2 mismatch 0.01 64 0.025 52 0.008 62 0.02 50 −25 −20 −15 −10 −5 0 5 −25 −20 −15 −10 −5 0 5 Total RF input power [dBm] Total RF input power [dBm] (a) Mismatched switching stage (b) Significant RF-LO coupling Figure 4.46: IIP2 and ΔIMD2eff vs. RF input power −3 x 10 Biasing current vs. RF input power 2.2 2.15 2.1 2.05 DC current [A] 2 1.95 −25 −20 −15 −10 −5 0 5 Total RF input power [dBm] Figure 4.47: Biasing current vs. RF input power input signal level. In the same figure, IIP2 is plotted versus RF input power. Although formally an intercept point does not depend on the input signal level, an exception was made here for illustrative purposes and IIP2 was calculated from the level of differential distortion products at high input signal levels. A significant drop of IIP2 is observed. Since the effective IMD2 mismatch changed, common mode distortion must have been changing at a different rate than differential distortion. In the second simulation, no parameter mismatches were introduced in the mixer. Instead, a 60dB LO-RF coupling was included in the simulation setup. Fig. 4.46b shows the corresponding IIP2 and effective mismatch. In this case, differential IIP2 changed only within 2dB, while ΔIMD2eff decreased almost 2 times. This means that common mode distortion must have been increasing at a rate higher than 2dB/1dB at high input signal levels. The presented effects can be attributed to the dependence of the biasing current flowing through the switches on the input signal level. Fig. 4.47 shows a plot of such current vs. in- put signal level. It can be seen that the DC current starts to deviate from its nominal value approximately at the same input level at which the effective mismatch begins to vary. Previ- ous analysis revealed that the indirect distortion leakage mechanism as well as switching stage nonlinear behavior depend on the biasing current. In case of mismatched switching pairs, such dependence affects both common mode and differential second order distortion. If the switching devices are perfectly matched, only common mode distortion is affected. Chapter 4. Downconversion Mixers 101 Correlation of IIP2 and DC offset 120 110 100 90 IIP2 [dBm] 80 70 60 −60 −40 −20 0 20 40 60 Static DC offset [mV] Figure 4.48: Monte Carlo simulations: IIP2 vs static DC offset 4.4.4 Statistical Analysis Apart from a detailed mismatch analysis on behavioral and circuit levels, it is also useful to analyze the random nature of mismatches using statistical techniques and to show its influence on IIP2 and DC offsets. In particular, it is valuable to understand IIP2 distributions as well as correlation between IIP2 and static DC offsets. Monte-Carlo Statistical Analysis To get an impression of the overall impact of various random mismatches occurring in dif- ferent parts of the mixer on IIP2 and static DC offsets, circuit level Monte Carlo statistical simulations of a double balanced active mixer were carried out at first. A low voltage current mode output CMOS mixer with a CMFB loop and an RC opamp filter in the output stage was used in simulations. LO-RF port coupling effects were not modeled. Accordingly, the simulated IMD2 and DC offsets resulted only from randomly introduced parameter mismatches. Fig. 4.48 shows a plot of simulated IIP2 vs. simulated static DC offset. To create the plot, results of 100 simulation runs were used. The plot shows a random nature of both IIP2 and DC offsets. Furthermore, although in general large DC offsets correspond to low IIP2 values, a rather poor correlation between these two parameters can be observed. Consequently, it is not proper to judge about IIP2 performance of a mixer based on a level of static DC offset at its output and vice versa. This is true even in case of no self-mixing effects caused by port-to-port coupling. Statistical Application of Mismatch Models Having shown the statistical simulation predictions, it is interesting to reconstruct them based on the developed theoretical mismatch models of the mixer. At first, only pure behavioral mismatch models for ΔIMD2total and ΔDCtotal given by (4.63) and (4.64), respectively, were taken into account. In the estimations based on these models, all relevant mismatch coefficients were generated as normally distributed random numbers. Stan- Chapter 4. Downconversion Mixers 102 IIP2 vs. static DC offset IIP2 vs. static DC offset 130 105 120 100 95 110 90 100 85 90 IIP2 [dBm] IIP2 [dBm] 80 80 75 70 70 60 65 −150 −100 −50 0 50 100 150 −80 −60 −40 −20 0 20 40 60 80 Static DC offset [mV] Static DC offset [mV] (a) Predictions based on behavioral modeling (b) Predictions based on circuit level modeling Figure 4.49: Theoretical predictions: IIP2 vs static DC offset dard deviations of relative mismatch coefficients were set based on the size of transistors. For larger devices, smaller values of standard deviation were assumed since such devices naturally match better. As far as input stage mismatches are concerned, Δg2 and ΔIDC relative mismatch coefficients were generated from relative current factor and threshold voltage mismatches, each having a standard deviation σd =0.01. Assuming CMOS square law transistors, it can be shown that Δg2 depends only on a current factor mismatch while ΔIDC depends on both current factor and threshold voltage mismatches. The relative amplitude mismatch coefficient ΔA was set to 0 since no amplitude mismatches were introduced in Monte Carlo circuit simulations. A standard deviation of switching pair duty cycle mismatch coefficients Δη was chosen to be only σd =0.002, which is a reasonable assumption since switching transistors of the simulated mixer were much larger than input stage transistors. Similarly, a very small standard deviation value of σd =0.001 was assumed for ΔICS relative mismatch parameter, because current sources in the output stage of the mixer were large. Fig. 4.49a shows a scatter plot with theoretical predictions of IIP2 versus static DC offset for 100 independent sets of mismatch coefficients. Because of the fact that pure behavioral models were used, in which switching pair duty cycle mismatches correspond to the direct leakage mechanism, it is reasonable to refer to these predictions as based only on direct leakage. Despite the differences in expressions for effective IMD2 and static DC offset mismatches given by (4.63) and (4.64), a very good correlation is apparent. This is because Δg2 and ΔIDC mismatch coefficients do not contribute significantly to the total effective IMD2 and DC offset mismatch, respectively, as they are multiplied by a sum (Δη12 +Δη34) of duty cycle mismatches. To obtain a de-correlated IIP2 vs DC offset relationship as shown in Fig. 4.48, a mismatch model including switching stage nonlinearities has to be used. As explained in the circuit level mismatch modeling section, such nonlinearities are responsible for an indirect leakage mecha- nism, which leads to different dependencies of IMD2 and static DC offsets on operating condi- tions. Additionally, switching pairs generate their own second order intermodulation distortion which adds to the distortion generated by the input stage transistors. As a result of these mech- anisms, physical mismatches between the switching pair transistors (modeled with a Voff voltage source attached to one of the switches) translate into effective switching pair mismatches Δζ with different proportionality constants for IMD2 distortion and for static DC offsets. Theoretical predictions of IIP2 versus static DC offset taking the switching stage nonlinear- ities into account are shown in Fig. 4.49b. The desired de-correlation is achieved. Chapter 4. Downconversion Mixers 103 Effective IMD2 mismatch histogram IIP2 histogram 140 250 120 200 100 150 80 60 100 40 50 20 0 0 −0.02 −0.015 −0.01 −0.005 0 0.005 0.01 0.015 0.02 60 70 80 90 100 110 120 130 140 Effective IMD2 mismatch IIP2 [dBm] (a) Effective IMD2 mismatch histogram (b) IIP2 histogram Figure 4.50: Theoretical predictions: Histograms of effective IMD2 mismatch and IIP2 Figures 4.50a and 4.50b show histograms of effective IMD2 mismatch and IIP2 obtained using 1000 independent sets of mismatch coefficients based on circuit level modeling predictions. The histogram of effective IMD2 mismatch is symmetrical around 0 (meaning that device parameter mismatches do not cause any deterministic imbalance) and resembles a Gaussian shape, which is an expected result since the effective IMD2 mismatch contains a sum of relative mismatch coefficients having normal distributions. The shape of IIP2 histogram in the logarithmic scale (in dBm) is not symmetrical around any value. A peak on the IIP2 histogram plot corresponds to the most frequent IIP2 value. Additionally, the IIP2 histogram allows to distinguish with better resolution between samples having smaller effective IMD2 mismatch values. This is because for a given range of mismatch values, a corresponding range of IIP2 values in the log scale is wider when the mismatches are smaller. In conclusion, the developed IMD2 mismatch theory is able to account for poor correlation between IIP2 and static DC offsets. The primary cause of this effect lies in nonlinear behavior of transistors in the switching stage of the mixer. References [1] S. Maas, Microwave Mixers. Norwood, MA: Artech House, 1993. [2] J. Crols and M. S. J. Steyaert, “A 1.5 GHz Highly Linear CMOS Downconversion Mixer,” IEEE Journal of Solid-State Circuits, vol. 30, pp. 736–742, July 1995. [3] K. L. Fong and R. G. Meyer, “Monolithic RF Active Mixer Design,” IEEE Transactions on Circuits and Systems II, vol. 46, pp. 231–239, March 1999. [4] K. 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Halonen, “Characterization of IIP2 and DC-Offsets in Transconductance Mixers,” IEEE Transactions on Circuits and Systems II, vol. 48, pp. 1028–1038, November 2001. Chapter 4. Downconversion Mixers 106 [29] D. Manstretta and F. Svelto, “Analysis and Optimization of IIP2 in CMOS Direct Down- Converters,” in Proceedings of the IEEE 2002 Custom Integrated Circuit Conference, pp. 243–246, May 2002. [30] D. Manstretta, M. Brandolini, and F. Svelto, “Second-Order Intermodulation Mechanisms in CMOS Downconverters,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 394–406, March 2003. [31] S. Kang and B. Kim, “Second Order Nonlinearity Analysis of Gilbert Mixer,” in Proceedings of the 2003 IEEE MTT-S International Microwave Symposium, pp. 45–48, June 2003. [32] R. Amaya, P. H. R. Popplewell, M. Cloutier, and C. Plett, “EM and Substrate Coupling in Silicon RFICs,” IEEE Journal of Solid-State Circuits, vol. 40, pp. 1968–1971, September 2005. [33] A. A. Abidi, “General Relations Between IP2, IP3, and Offsets in Differential Circuits and the Effects of Feedback,” IEEE Transactions on Microwave Theory and Techniques, vol. 51, pp. 1610–1612, May 2003. [34] I. Elahi, K. Muhammad, and P. T. Balsara, “IIP2 and DC Offsets in the Presence of Leakage at LO Frequency,” IEEE Transactions on Circuits and Systems II, vol. 53, pp. 647–651, August 2006. [35] M. Hotti, J. Ryyn¨anen, and K. Halonen, “RC-load Analysis of the Downconversion Mixer IIP2,” in Proceedings of the European Conference on Circuit Theory and Design, pp. 237– 240, August 2005. Chapter 5 IMD2 Cancellation Methods 5.1 General Considerations IIP2 requirements derived in Chapter 3 for certain wireless systems are in the range of 50dBm at the receiver input. Assuming a typical gain of LNA is around 20dB, this translates into a minimum of 70dBm at the input of the downconversion mixer. Such tough requirements can be fulfilled by sufficient filtering of interferers before the active part of the Rx RF front end. However, this approach lies in contradiction to the current trends aimed at reduction of the component count of mobile transceivers. In particular, certain RF filtering stages like interstage surface-acoustic wave filters in CDMA receivers are not welcome, not only because of their size and cost but also because they degrade receiver sensitivity by introducing in-band loss. Furthermore, tunable band-pass RF filters are preferred in multi-band transceivers instead of a bank of fixed band RF filters, as they occupy less space. Since tunable filters usually have poorer attenuation in their stop bands, they provide less attenuation of out-of-band interferers. Therefore, second order intermodulation distortion is a serious issue in modern receiver design and techniques of its mitigation have to be provided to fulfill system requirements. The use of differential circuit topologies in mixer design is mandatory in order to reduce second order intermodulation distortion by making it a common mode signal. However, un- avoidable asymmetries in the physical layout and device parameter mismatches due to inherent fabricationprocessvariationsleadtoconversionofsomepartofcommonmodedistortionto differential form. To make IIP2 less affected by mismatches, circuit linearity can be increased, thereby reducing the magnitude of common mode second order distortion, which gets translated to differential mode. However, because of random nature of mismatches (and consequently random nature of IIP2), sufficiently high performance for every fabricated chip may still not be guaranteed during the design stage, especially in high volume production. Moreover, as shown in Chapter 4, the impact of mismatches in different parts of the mixer varies with operating conditions, including temperature, voltage supply, LO frequency, RF interferer frequency, and RF interferer level. In the light of these facts, IIP2 production testing taking into account all possible combinations of operating conditions would become prohibitively long. Thus, what is needed is some sort of on-chip distortion cancellation allowing not only to achieve but also to maintain over time sufficiently high rejection of second order intermodulation distortion for every fabricated receiver chip. In this chapter, various IMD2 reduction techniques suitable for integrated RFIC downcon- version mixers are studied, indicating their strengths and weaknesses [W1], [W2]. Next, a novel IMD2 cancellation method that overcomes those weaknesses and thus significantly advances the state-of-the-art, is proposed and analyzed. Chapter 5. IMD2 Cancellation Methods 108 Metal 3 Via Metal 2 Metal 1 a) Highly Grounded resistive guardring Sensitive Circuit substrate ring b) Figure 5.1: LO-RF coupling reduction techniques 5.2 Overview of IMD2 Cancellation Methods 5.2.1 Layout Techniques Layout techniques can be classified into device-matching improvement techniques and RF-LO coupling reduction techniques. Careful, symmetrical layout of both active and passive devices as well as their interconnects improves matching between differential paths of the circuit. Parameter mismatches of active devices are significantly reduced by applying a so-called common centroid layout technique, which includes cross-coupling and interdigitation patterns (see Appendix B). Another category of IMD2-cancelling layout techniques deals with minimization of the impact of RF self-mixing on the overall even order distortion performance. Three coupling mechanisms responsible for self-mixing phenomenon need attention: EM crosstalk, substrate coupling as well as ground and power supply bounce. Shielding of LO transmission lines by using neighboring grounded metal layers (Fig. 5.1a) reduces EM crosstalk since metal ground planes confine elec- tromagnetic fields [1]. The disadvantage is an increased power consumption of LO buffers driving such transmission lines required to maintain high-quality LO waveforms. Substrate coupling can be suppressed by placing highly resistive substrate rings around the sensitive downconversion mixer circuit (Fig. 5.1b). Other substrate coupling reduction techniques are reported in [2]. Finally, ground and power bounce can be reduced by connecting circuit and substrate grounds together using densely placed substrate contacts as well as by using de-coupling capacitors be- tween power and ground lines. All of the presented layout techniques increase IIP2 on average, i.e. shift its histogram toward higher values. However, they cannot totally remove circuit and interconnection asymmetries as well as completely eliminate random parameter variations. Chapter 5. IMD2 Cancellation Methods 109 IF+ IF- LO+ LO- LO+ RF+ RF- Figure 5.2: IMD2 cancellation with frequency dependent negative feedback 5.2.2 Circuit Techniques Circuit techniques focus on decreasing second order nonlinearity of mixer devices rather than on reducing mismatches between them. This is done by exploiting negative feedback in various embodiments, as described below. RC Degenerated Input Stage In MOS transconductors, negative feedback can be applied by connecting an impedance between the source of the active device and ground. In case of simple resistive feedback, this technique reduces the effective first and higher-order transconductances of the transistor at all frequencies. Since in practice only second-order transconductance has to be reduced, it is advantageous to apply negative feedback with resistor and capacitor connected in parallel, as shown in Fig. 5.2. At low frequencies, the absolute value of the impedance of such network is determined mainly by the resistance R, implying a strong negative feedback and significant attenuation of low-frequency distortion products. At high frequencies, the absolute value of the impedance is determined by the capacitance C, which shorts R to ground so that effectively no feedback exists. Consequently, the effective transconductance is larger, which improves e.g. mixer noise performance. Although intuitively simple to understand, it is instructive to examine the behavior of the negative feedback circuit analytically. For that purpose, consider a single transistor of the input stage with an admittance Y connected between source and ground. The Taylor series expansion of the I-V characteristic of the transistor is expressed as 2 id = gm(vg − vs)+g2(vg − vs) , (5.1) where vg and vs are the small signal gate and source voltages. The source voltage vs is related to the input voltage by the following Volterra series expansion: ◦ ◦ 2 vs = H1(ω) vin + H11(ω, ω) vin + ... (5.2) where H1(ω) is the linear transfer function, while H11(ω, ω) is the second-order transfer function. Both transfer functions are found by applying the Kirchoff law at the source node vsY (ω)=id. (5.3) Chapter 5. IMD2 Cancellation Methods 110 G1 vs. RF frequency G2 magnitude vs. tone frequency offset 0.012 0.08 No feedback 0.07 R feedback 0.01 RC feedback 0.06 0.008 0.05 ] 2 0.006 0.04 G1 [S] G2 [A/V 0.03 0.004 0.02 No feedback 0.002 R feedback RC feedback 0.01 0 0 0.5 1 1.5 2 2.5 0 2 4 6 8 10 RF frequency [GHz] dRF frequency [MHz] (a) Magnitude of G1(ω) (b) Magnitude of G11(ω1, −ω2) Figure 5.3: Magnitudes of transconductances for 3 different feedback implementations After calculations, reported in Appendix A, gm H1(ω)= (5.4) gm + Y (ω) 2g2 1 − H1(ω1) − H1(ω2)+H1(ω1)H1(ω2) H11(ω1,ω2)= (5.5) gm + Y (ω1 + ω2) By means of (5.2), (5.3) and (5.5), the linear and second order transconductances of the analyzed system are gmY (ω) G1(ω)=H1(ω)Y (ω)= (5.6) gm + Y (ω) G11(ω1,ω2)=H11(ω 1,ω2)Y (ω1 + ω2)=Y (ω1 + ω2) (5.7) 2g 1 − H (ω ) − H (ω )+H (ω )H (ω ) × 2 1 1 1 2 1 1 1 2 gm + Y (ω1 + ω2) To show the effectiveness of the negative feedback utilizing the RC network, magnitudes of G1(ω)andG11(ω1, −ω2) are analyzed in 3 cases: no feedback (Y = ∞), resistance-based feedback (Y = R), and parallel RC-network based feedback (Y =1/R + jωC). Simulations assume typical values of intrinsic transistor transconductances gm = 10mS, g2 = 30mS/V as well as negative feedback resistance R = 100Ω and capacitance C = 10pF. Fig. 5.3a shows magnitudes of the linear transconductance G1(ω) versus frequency of the RF input signal. As can be seen, purely resistive degeneration causes the effective transconductance to be half of the intrinsic transistor tranconductance across all input frequencies. Addition of the capacitance C increases the magnitude of G1(ω) at high frequencies so that it is close to the intrinsic linear transconductance gm. In Fig. 5.3b, magnitudes of the second order transconductance G11(ω1, −ω2) are plotted versus frequency offset between the input tones. The magnitude is equal to 2g2 in case of no feedback. Resistive degeneration reduces the magnitude significantly. Addition of capacitance C increases the magnitude of second order transconductance in comparison to purely resistive feedback but still provides some attenuation, forming a good compromise between distortion suppression and degradation of linear transconductance. Chapter 5. IMD2 Cancellation Methods 111 IF+ IF- LO+ LO- LO- LO+ W/LW/2L W/2L W/L RF+ RF- Figure 5.4: Mixer core with IMD2-cancelling biasing circuit In low voltage applications, transistors operating on the verge of saturation (but still in triode region) can be used instead of feedback resistors shown in Fig. 5.2. The advantage of such solution is that DC current does not cause excessive voltage drop while small signal output resistance is large enough to enforce proper feedback. By linearizing the mixer input stage, common mode second order distortion can be sig- nificantly reduced. Therefore, direct and indirect leakage mechanisms in the switching stage (modeled by ΔζL mismatch coefficient in (4.144)) as well as output stage imbalances (modeled by Δχ mismatch coefficient) do not contribute significantly to the differential output second order distortion. Unfortunately, the presented method does not alleviate the problem of second- order distortion of the complete mixer because of the remaining distortion products due to RF-LO coupling characterized by Λ coefficient as well as switching stage nonlinearities modeled by the ΔζSW mismatch coefficient. Input Stage with IMD2-Cancelling Biasing Circuit IMD2 distortion generated in the mixer input stage can be also reduced by using a special kind of biasing configuration. Introduced in [3] and patented in [4], the biasing arrangement is shown in Fig. 5.4. To understand this cancellation technique, it is necessary to see how the IMD2 product is generated at the transconductor output. In general, assuming two-tone RF input voltage signal vin,RF = AC cos(ω1t)+cos(ω2t) , the low-frequency IMD2 product in the output current of the nonlinear transconductor is given as 2 iout,Δω = gmvin,Δω + g2AC cos(Δωt), (5.8) where gm is the linear transconductance, g2 is the second-order nonlinear transconductance, while vin,Δω is the input voltage of the transconductor at Δω. It is seen that the output current at Δω consists of two components. One is generated by the input voltage at Δω via the linear transconductance. Another component is due to the second-order nonlinearity coefficient of the − 2 nonlinear transconductance. If a value of the voltage vin at Δω is set to g2AC cos(Δωt)/gm, the IMD2 component at the transconductor output can be cancelled. The biasing arrangement shown in Fig. 5.4 generates exactly this voltage, provided that the biasing current source has an infinite output impedance and the coupling capacitors can be approximated by an open circuit Chapter 5. IMD2 Cancellation Methods 112 Common mode IIP2 100 Transconductor − Standard Biasing 90 Mixer − Standard Biasing Transconductor − IMD2 Cancellation 80 Mixer − IMD2 Cancellation 70 60 50 40 CM IIP2 [dBm] 30 20 10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Biasing current [mA] Figure 5.5: Common mode IIP2 for standard and IMD2 cancelling biasing circuit at Δω. In such case, the current flowing through the biasing transistors at Δω must equal zero: 2 gmBvin,Δω + g2BAC cos(Δωt)=0. (5.9) The voltage vin,Δω is therefore given as 2 g2BAC cos(Δωt) vin,Δω = − (5.10) gmB In the ideal case, when the biasing transistor and the main transistor are perfectly matched, the ratio of the second-order transconductance to the first order transconductance for both transistors is the same: g2B/gmB = g2/gm. Then, the IMD2 component iout,Δω at the output of the transconductor is indeed zero. In reality, however, matching is not perfect and some residual distortion still exists in the output current. Nevertheless, for typical mismatches in the order of 10−2, its value is around 20dB to 40dB lower than in case of the conventional transconductor. The presented IMD2 cancellation technique has a clear advantage over the negative feedback linearization technique in that it is more suitable for mixers operating at low supply voltage since there are no linearizing feedback components, which consume voltage headroom. Similarly to the negative feedback linearization technique, the main disadvantage of the biasing technique is its inability to cope with coupling mechanisms and distortion generated by the switching stage. In the presence of mismatches, the switching stage contributes to the differential output even-order distortion regardless of what kind of linearization has been applied to the input stage. Although in [3], a significant improvement has been reported, (20dB to 40dB higher IIP2 than in case of classical biasing), those results were obtained for a BiCMOS mixer with bipolar switches. In full CMOS solutions, switches obviously have to be implemented with MOS devices, which have much poorer switching characteristics, resulting in higher distortion. As an illustration, Fig. 5.5 compares common mode IIP2 of a transconductor (with fixed drain potentials) and a complete mixer core. It can be seen that for higher biasing currents (required for high IIP3 and 1dB compression point) the IMD2 cancelling technique is less efficient as more distortion is generated by the switching stage. A peak in the plot for the mixer core biased using the standard technique suggests that CM distortion generated by the input and switching stages have actually opposite signs and they add up to zero in certain conditions. Chapter 5. IMD2 Cancellation Methods 113 Reduction of Common Mode Distortion with CMFB Second order intermodulation distortion can be reduced by exploiting common mode feed- back loops in order to eliminate the flow of common mode distortion current through certain elements, which could otherwise convert it to differential mode. Two such methods have been proposed. The first technique suppresses common mode IMD2 current flowing through the mixer load impedances by injecting almost equal amplitude but out-of-phase common mode distortion cur- rent to the outputs of the switching stage [5],[6]. In this manner, load impedance mismatches contribute negligibly to the effective mixer mismatch, i.e. the impact of Δχ mismatch term in (4.144) is greatly reduced. The amount of injected current is determined by the CMFB loop gain. Mismatches between the current sources affect the performance of this technique. Since only low-frequency distortion has to be suppressed in downconversion applications, relatively large (and thus better matching) current sources can be used so in practice performance degradation is small. This technique effectively reduces common mode to differential mode conversion ratio due to load impedance mismatches, which can be significant in traditional voltage mode mixers, where values of load resistors are rather low because of limited voltage headroom. Low resistor values mean that these devices occupy small area and therefore their matching is poor. In [5] and [6], the method was applied to a bipolar mixer with a fully differential input stage. Presence of the tail current source reduces significantly generation of common mode second order distortion in comparison with low voltage pseudodifferential transconductors, while the bipolar switching stage features very good matching, i.e. Δζ terms in (4.144) have small variances. For these reasons, the output stage is a dominant source of mismatch and the technique results in distinct IIP2 improvement. However, in low voltage CMOS mixers, it does not solve all mismatch problems. The second technique eliminates flow of common mode IMD2 current through the switching stage of the mixer by either controlling the biasing current of the mixer input stage [7] or by injecting common mode distortion current to the outputs of the input stage [8]. In both cases, the amount of current is controlled by the common mode feedback loop, which senses common mode distortion voltage at the output of the mixer. This method effectively eliminates mismatch terms associated with switching stage leakage mechanisms (ΔζL) and output stage imbalances (Δχ) from (4.144). However, RF-LO coupling mechanisms characterized by the Λ coefficient and switching stage nonlinearities modeled by ΔζSW mismatch coefficients are not addressed. Other Circuit Techniques In addition to the techniques described above, several other IMD2 mitigation methods based on certain circuit configurations have been published. Since they are less general in nature than the previous techniques, only a brief description is provided below. In [9], a method for reducing even order distortion based on injection of out-of-phase dis- tortion current has been presented. It is suitable only for mixers implemented in bipolar tech- nologies. The idea is to utilize an additional bipolar differential pair. The bases of transistors forming the differential pair are connected to the outputs of the mixer and inject out-of-phase even-order distortion current, reducing the flow of distortion current through the load resistors. Therefore, Δχ mismatch term is effectively removed from (4.144). Good suppression of dis- tortion is achieved provided that additional transistors are appropriately scaled to produce the amount of distortion close to that generated in the mixer core. Process variations as well as varying operating conditions limit the effectiveness of this technique. Chapter 5. IMD2 Cancellation Methods 114 Input RF Output Switches Mixer Switches RF Baseband Input Output LO Mitigating Signal Mitigating Signal μ(t) μ(t) Figure 5.6: Concept of mixer dynamic matching Even-order distortion caused by RF-LO crosstalk can be significantly reduced by using har- monic mixers. In such mixers, the RF input signal is mixed with one of the higher order LO harmonics, usually the second harmonic. The impact of the fundamental LO harmonic coupling on second-order distortion mechanisms becomes much smaller. However, second-order distor- tion products due to active device nonlinearities and mismatches still exist. Moreover, harmonic mixers offer smaller conversion gain for a given current consumption than traditional mixers. An interesting concept, which reduces the impact of indirect leakage and distortion gener- ated by the switching stage due to parasitic capacitances loading the switching pairs has been presented in [10] and [11]. The idea is to attach an inductor to the common source node of the switches so as to cause a parallel resonance with the parasitic capacitor at the LO frequency. The effective impedance loading the common source node of the switching pair is thus high, which decreases the indirect leakage and linearizes the switching devices via negative feedback. Values of the corresponding coefficients ΔζL and ΔζSW in (4.144) are thus reduced by the amount as- sociated with the fundamental LO harmonic. Consequently, they contribute less to the effective mixer mismatch. However, the mismatch coefficients associated with coupling and output stage mismatches remain unaffected by the proposed technique. Apart from its inability to deal with RF-LO coupling, the concept of tuning out parasitic capacitances by means of integrated inductors entails several practical limitations. First, such so- lution can function only for mixers operating in a single band. In case of multiband transceivers, this would require having separate mixers for each band, which increases the total chip area. As inductors are usually used in low-noise amplifiers and oscillators, adding another set of these passive devices to the whole receiver would make the whole implementation quite costly. Additionally, multiple inductors introduce undesirable cross-talk between distinct signal lines. Finally, the inductor tunes-out parasitic capacitance and thus distortion sidebands only for the fundamental LO harmonic. When using strong LO signals to drive the mixer switches quickly (for instance in order to decrease their noise contribution), distortion sidebands around higher order harmonics are still demodulated to baseband without significant attenuation, lowering the effectiveness of the proposed technique. 5.2.3 Dynamic Matching The concept of dynamic matching for direct downconversion mixers has been introduced in [12] and patented in [13]. The idea, shown in Fig. 5.6, is equivalent to chopper stabilization technique, which has been successfully used to combat DC offsets and low frequency noise in operational amplifiers. Prior to downconversion with the LO signal, the input signal is multiplied with a mitigating signal μ(t) in a dynamic matching block. The mitigating signal can be either Chapter 5. IMD2 Cancellation Methods 115 RL RL μx(t) IF+ μ(t) IF- μx(t) LO+ LO- LO+ μ(t) μx(t) μx(t) μ(t) RF+ RF- Figure 5.7: Dynamic matching - implementation a periodic waveform or a pseudorandom signal. After the main mixing process, the second dynamic matching block restores the desired signal. The low frequency IMD2 distortion as well as static DC offsets generated in the main mixer are either frequency translated or spreaded, depending on the choice of the μ(t) waveform. In addition to reducing IMD2 distortion and static DC offsets, dynamic matching simultaneously reduces flicker (1/f) noise generated in the main mixer, making it an appealing solution especially for CMOS mixers. An example of dynamically matched mixer implementation is shown in Fig. 5.7. Differential input signal in the current domain is mixed with the mitigating signal μ(t) using a double balanced switching mixer structure. Another double balanced structure is placed after the main mixing block (driven with the differential LO signal) and it restores the desired signal in the voltage domain. Despite its valuable properties, dynamic matching possesses a number of drawbacks. First of all, mitigating signals generate interference at the fundamental frequency of μ(t) and its har- monics. Despite the fact that differential signalling, transmission line shielding and decoupling capacitors in signal buffers reduce on-chip crosstalk, taking the mitigating signals into account makes the whole design more complicated and consuming more power, which is a disadvantage by itself. Besides, although the LO and mitigation signals can be derived in a simple way from a single reference source by means of odd and even integer dividers (e.g. odd dividers used to generate mitigation signals while even dividers used for LO signal generation), such approach may result in mixing of even division multiple frequency component with odd division multiple frequency component causing a spurious response which self quiets the receiver. This deficiency has been pointed out in [14], which also suggests a solution to the problem: the use of mit- igation signals with frequency having a non-integer relationship to the LO frequency (or the reference oscillator signal frequency). This can be accomplished for example with the help of a direct digital synthesizer (DDS) unit. However, it further increases the complexity of the whole system. Another weakness of dynamic matching is poor noise performance of the whole block, since each mitigating stage introduces loss associated with the mixing process (see Chapter 4). This amplifies the noise contribution of the following stages when referred to the input. Finally, dynamic matching units are also nonlinear and prone to mismatches. Their contribution to the overall even-order distortion can be lowered by implementing them as highly linear passive mixers and driving them with mitigation signals at low frequencies, where fast switching reduces the direct leakage while memory effects due to parasitic capacitances are less troublesome. Chapter 5. IMD2 Cancellation Methods 116 Vbb + Vrf Vimd2 Vbb RF BLOCK Vcomp ( )2 LPF Figure 5.8: IMD2 compensation scheme 5.2.4 IMD2 Compensation All techniques presented above feature certain limitations that prevent them from eliminating completely the problem of second order intermodulation distortion. Some wireless standards (e.g. cellular telephony) pose such stringent linearity requirements that circuit and layout techniques alone cannot provide sufficiently high AM interference suppression. Therefore, additional IIP2 improvement techniques have to be applied. Instead of trying to eliminate sources of distortion, another approach is to try to eliminate the distortion itself. This is where the idea of distortion compensation comes in. It can be loosely defined as addition of an out-of-phase, appropriately scaled distortion generated by a dedicated block featuring second order nonlinearity to the output signal of an RF block, as shown in Fig. 5.8. In case of downconversion mixers, input signals of the squaring block can be actually ob- tained either from the mixer input as shown in Fig. 5.9a or from the mixer output, before filtering of the interferers takes place, as shown in Fig. 5.9b. In the latter approach, a high pass filter removes the wanted signal while passing through the downconverted, out-of-channel interferers. Generally, separate gain settings are required for I and Q channels. The functions of the compensation system, including generation of reference distortion, scaling and subtrac- tion can be carried out either in the analog or in the digital domain. When implemented in the analog domain, squaring operation can be performed by an instantaneous power detector. If implemented in the digital domain, squaring can be carried out by a dedicated multiplier. Since interfering signals are relatively large, high resolution analog-to-digital converters in the reference path are not required. The concept of IMD2 compensation was proposed in several publications. One of the first was a patent showing the IMD2 compensation architecture in a homodyne receiver [15]. The reference signal for the total power detector was obtained directly from the antenna through a by-pass filter. In [16], a compensation system using the reference distortion generation path illustrated in Fig. 5.9b was described. A technique for compensating for second-order distortion using the reference distortion path shown in Fig. 5.9a was proposed in [17]. The implementation of the concept can be found in [18]. Compensation techniques possess a number of drawbacks. First, they rely on accurate mod- eling of even-order nonlinearity of the RF block of interest. Since the modeling usually takes only second order distortion into account, compensation provides improvement for relatively small input blocker levels while it fails at high input levels, where higher even order intermodulation terms become important. Next, compensation schemes require an additional path with its own set of filters, increasing the required area for on-chip integration. Moreover, an additional analog to digital converter is required if the compensation is to be carried out using digital techniques. Chapter 5. IMD2 Cancellation Methods 117 LPF BPF LPF ( )2 LPF (a) Reference signal obtained from the mixer input LPF BPF LPF HPF ( )2 LPF (b) Reference signal obtained from the mixer output Figure 5.9: Reference distortion paths for compensation of mixer IMD2 distortion Another important aspect associated with compensation is that the main path (after the nonlin- ear RF block in Fig. 5.8) and the auxiliary path (after the squaring block) must be well-matched in terms of their transfer functions. This may require performing an extra equalization, raising the complexity of the whole system. 5.2.5 IP2 Calibration Instead of generating reference distortion by an additional block, it is possible to exploit common-mode distortion generated by existing circuit nonlinearities. Called IP2 calibration, such self-compensating technique alters the RF block of interest by controlled tuning of compo- nent parameters in order to convert part of common mode distortion to differential mode. Since no additional active circuitry generating reference distortion is necessary, considerable savings in power consumption are possible. Moreover, the problem of modeling accuracy of the RF block nonlinearity is eliminated. For these reasons, IP2 calibration is the most robust IMD2 cancellation technique. As the topic of IP2 calibration is very broad, the whole next section is devoted to its in-depth study. Chapter 5. IMD2 Cancellation Methods 118 IF IF LO LO RF Gm RF Gm Figure 5.10: Possible approaches to intentional mismatch introduction 5.3 Detailed Analysis of IP2 Calibration 5.3.1 Background The goal of IP2 calibration is to minimize the effective mixer IMD2 mismatch ΔIMD2eff defined by expression (4.144). This can be accomplished by introducing an intentional mismatch to the mixer circuit so as to make the value of ΔIMD2eff as close to zero as possible. To explain the calibration technique analytically, it is advantageous to split the effective mismatch function into two parts: initial mismatch ΔIMD2initial , which is random and depends on fabrication process mismatches, and intentional mismatch ΔIMD2intentional , which is adjustable both in sign and its absolute value: ΔIMD2eff = ΔIMD2initial + ΔIMD2intentional . (5.11) The output low-frequency second-order distortion signal of the mixer, which is proportional to the effective mixer mismatch and to common mode distortion, can thus be written as: yout,imd2 = K ΔIMD2initial + ΔIMD2intentional icm,imd2. (5.12) where yout,imd2 denotes either output voltage or current (depending on the mixer topology) and K is an appropriate proportionality constant. Intentional mismatches are introduced by so-called IP2 tuning circuits (IP2 tuners). An IP2 tuner changes the effective IMD2 mixer mismatch according to a control signal, usually in the form of digital tuning codes. Thus, a so-called tuning characteristic of the IP2 tuner can be written as ΔIMD2intentional = αw, (5.13) where α is a constant coefficient describing the resolution of the IP2 tuner and w is a digital tuning code. An optimum intentional mismatch is given by − ΔIMD2intentional,opt = αwopt = ΔIMD2initial , (5.14) where wopt is the corresponding optimum tuning code. Chapter 5. IMD2 Cancellation Methods 119 5.3.2 Tuning Circuits An in-depth mixer mismatch analysis performed in the previous chapter revealed which imbalances are relevant in the mechanisms of second order intermodulation distortion. The conclusions of that analysis can be also used for the design of IP2 tuning circuits. In order to explain how various IP2 tuners work, it is convenient to repeat here the closed- form expression for the numerator of effective IMD2 double balanced mixer mismatch given by (4.144): A =2ΛΔΛ + 2ΔARF + g2RF ΔζL12 +ΔζL34 0.5Δg2RF +ΔARF + ΔζL12 − ΔζL34 2 − + gmRF ΔζSW12 +ΔζSW34 ΔgmRF +ΔARF + ΔζSW12 ΔζSW34 2 + g2RF + gmRFΨSWNL 2Δχ. (5.15) From the above equation it can be concluded that intentional mismatches can be introduced in various parts of the mixer, as also illustrated in Fig. 5.10. Therefore, it is useful to categorize the tuning methods according to which section of the mixer is modified by the tuning circuit. One possibility is to classify them into input stage, switching stage and output stage intentional mismatching circuits. Two important parameters that describe the quality of the IP2 tuner are its resolution, which determines the achievable IIP2 and the tuning range, which determines the lowest IIP2 that can be satisfactorily improved. Since the IP2 tuner may degrade other mixer performance metrics like noise or conversion gain and because its tuning range and resolution depend on operating conditions, the design of such circuit is not a trivial task. Below, several tuning methods are described, two of them being partial contributions of the research documented in this dissertation. Basic IP2 Tuners Basic IP2 tuners are adjusted by only one tuning code. This is sufficient as long as frequency dependent mismatches in the output stage of the mixer are negligible. In [19], intentional mis- matches were introduced between the biasing currents of the double-balanced harmonic mixer. In this way, operating points of the switching transistors were changed, affecting mismatches associated with the indirect leakage (ΔζL) and switching stage distortion (ΔζSW). Although for such mixer the effective IMD2 mismatch is not exactly given by (4.144), the idea is applicable also to standard Gilbert cell like mixers. In [20], a concept based on tuning the biasing voltages of both switching pairs separately was proposed. Therefore, values of mismatch coefficients associated with the first switching pair (ΔζL12 and ΔζSW12) as well as the second switching pair (ΔζL34 and ΔζSW34) could be decreased, cancelling simultaneously the impact of input stage transconductance mismatches ΔgmRF and Δg2RF. However, existence of ΔΛ, ΔARF and Δχ mismatches introduces undesirable ambiguity about which switching pair mismatch to tune in order to compensate for coupling or output stage imbalances. Similar IP2 tuning concepts were suggested in patents [21] and [22], suffering from the same drawbacks. In [23], a remark was made that it is not necessary to change mismatches of both switch- ing pairs separately. This becomes evident after careful inspection of (4.144). Accordingly, a technique based on introducing intentional mismatch in only one switching pair was proposed. Yet another approach to intentional mismatching of the switching stage by placing additional devices in parallel with the main switches was patented in [24]. The concept is more complicated Chapter 5. IMD2 Cancellation Methods 120 Vlo+ Vlo- irf+ irf- VB + dV VB -dV Figure 5.11: Proposed IP2 tuner - switching stage biasing Tuning characteristic IIP2 vs tuning code 0.05 90 0.04 85 0.03 0.02 80 0.01 0 75 −0.01 IIP2[dBm] Effective mismatch 70 −0.02 −0.03 65 −0.04 −0.05 60 −15 −10 −5 0 5 10 15 −15 −10 −5 0 5 10 15 Tuning code Tuning code (a) Tuning characteristic (b) IIP2 Figure 5.12: Tuning performance of the IP2 tuner shown in Fig. 5.11 than other IP2 tuning approaches described above. Moreover, it may degrade performance of the mixer because additional switches add their own parasitic capacitances loading the switching pairs. In [25], calibration techniques for current mode output mixers were discussed, including input and switching stage mismatching. Although in the publication it was stated that introducing mismatch between linear transconductances Δgm by tuning the biasing current flowing through each branch of the input stage has an impact on IIP2, it is strongly believed that in fact biasing current mismatching affects IIP2 much more through related switching stage mismatches than through input stage transconductance mismatches. Tuning circuits introducing mismatches Δχ in the output stage of the mixer can be divided into two groups: load resistance tuning circuits and common mode feedback loop mismatch- ing circuits. In traditional voltage mode output mixers which don’t employ output common mode feedback loops, controlling mismatches between the load resistors has proven effective. A so-called load balancing technique, which can be implemented by connecting a bank of large resistors in parallel to the main loads, was presented in [26] and patented in [27]. Chapter 5. IMD2 Cancellation Methods 121 IIP2 Improvement Curves 100 90 80 70 60 IIP2 [dBm] ΔV :0mV,5mV,10mV,15mV 50 TH V :15mV,10mV,5mV,0mV Δ TH V :0mV,10mV,0mV,10mV 40 Δ TH V :15mV,0mV,15mV,0mV Δ TH 30 −15 −10 −5 0 5 10 15 Tuning Code Figure 5.13: Examples of IIP2 improvement curves The second output stage IP2 tuning method introduces mismatches in the CMFB loop, provided that the mixer is equipped with such block. Variants of this technique were patented in [28] and [29] and also shown in [30] and [31]. One of the two IP2 tuners proposed in this work adds to the collection of methods described above another technique based on intentional mismatching of the switching stage [C3], [C4]. The proposed IP2 tuner is shown in Fig. 5.11. It modifies a difference between effective switching pair mismatches due to leakage mechanisms (ΔζL12 −ΔζL34) and due to switching stage nonlinearities (ΔζSW12 − ΔζSW34). This is achieved by tuning the biasing voltages of two transistors (not from the same switching pair) in opposite direction to the biasing voltages of another two transistors. A tuning characteristic of the designed IP2 tuner is shown in Fig. 5.12a. A corresponding plot of IIP2 of the complete mixer versus tuning code, obtained by simulating the mixer without any initial mismatches or RF-LO coupling, is shown in Fig.5.12b. By analyzing the plot it can be concluded that the resolution of the tuner allows to achieve minimum IIP2 of 85dBm, while the minimum initial IIP2 that can be improved to at least 85dBm is around 60dBm. Sample IIP2 improvement curves for an initially mismatched mixer are shown in Fig. 5.13. Mismatches were introduced in the switching stage by altering threshold voltages of the switching transistors from their nominal values as described on the legend. The improvement of even over 30dB can be observed in case of the most mismatched mixer. Since effective switching pair mismatches are directly proportional to the offset voltage Voff , they can be rewritten as ΔζL = Voff ζL and ΔζSW = Voff ζSW. Consequently, the coefficient α of the tuning characteristic (5.13) is proportional to: ∼ 2 α g2RFζL + gmRFζSW . (5.16) Because ζSW depends on RF interferer frequency, both resolution and tuning range of the proposed tuning method are RF frequency dependent. The same comment applies also to other previously published methods introducing mismatches to the switching stage. This feature is especially troublesome in low-voltage current-mode output mixers where the RF frequency dependence is significant and irregular. Chapter 5. IMD2 Cancellation Methods 122 CMFB TUNE iif+ iif- Figure 5.14: Proposed IP2 tuner - adjustment of CMFB current source widths Tuning characteristic IIP2 vs tuning code 0.15 95 90 0.1 85 0.05 80 0 75 −0.05 70 IIP2[dBm] Effective mismatch 65 −0.1 60 −0.15 55 −0.2 50 −100 −50 0 50 100 −100 −50 0 50 100 Tuning code Tuning code (a) Tuning characteristic (b) IIP2 Figure 5.15: Tuning performance of the IP2 tuner shown in Fig. 5.14 Combined IP2 - Static DC Offset Tuners Intentional mismatching changes the static DC offset at the mixer output. As was shown in Chapter 4, maximizing IIP2 does not necessarily lead to a minimized DC offset. Therefore, large DC offsets may exist after calibration. If they are too large, they may saturate the receiver back-end. Thus, it is desirable to suppress DC offsets due to the IP2 tuner. One possible solution is to use an additional DC offset tuner. In current commutating mixers this can be easily implemented in the output stage by controllable current sources as described in [32]. By combining the IP2 tuner and the DC offset tuner in such a way that for a given tuning code they introduce DC offsets with opposite signs, the overall DC offset is not degraded. The presented concept was implemented in an IP2 tuner embedded in the CMFB loop as shown in Fig. 5.14 [C6]. Unlike solutions presented in [28], [29], [30] and [31], where the loop gain was modified, the proposed IP2 tuner introduces mismatches between the current sources by changing their widths. Tuning performance of the IP2 tuner is shown in Fig. 5.15. The tuner offers much finer resolution and wider tuning range in comparison to the previous design of Fig. 5.11. The coefficient α of the tuning characteristic is directly proportional to: ∼ 2 α g2RF + gmRFΨSWNL . (5.17) Chapter 5. IMD2 Cancellation Methods 123 Static DC offset vs tuning code 150 IP2 tuner without DC compensation IP2 tuner with DC compensation 100 50 0 −50 Static DC offset[uA] −100 −150 −150 −100 −50 0 50 100 150 Tuning code Figure 5.16: DC offset due to IP2 tuner Although ΨSWNL depends on RF interferer frequency, in practice this dependence is weak, making the resolution and tuning range fairly constant across RF frequency. Fig. 5.16 compares performance of the tuner in terms of DC offset generated at the output of the mixer with the compensating DC offset tuner OFF and ON. It can be seen that without DC compensation, generated DC offsets are large and after being converted to voltage on resistances in the order of 1kΩ, they may significantly affect the dynamic range of the receiver, especially in low-voltage applications. With the DC compensation turned on, the generated DC offset is negligible across the whole tuning range. IP2 Tuners with Output RC Pole Trimming In voltage mode output mixers, mismatches in output RC pole frequencies between the differential branches result in frequency dependent phase shift of differential IMD2 distortion component with respect to common mode distortion. This means that IIP2 improvement ob- tained with basic IP2 tuners becomes frequency dependent as well. To correct this imperfection, two dimensional tuners have to be used. One tuning code reduces the effective mismatch while another is used to match the output pole frequencies. This can be done by tuning the output stage capacitances in addition to introducing intentional mismatch in a conventional manner somewhere in the circuit. As an illustration, Fig. 5.17 shows calibrated IIP2 of a sample voltage mode output mixer by means of load resistor mismatching in two cases: without and with RC-pole tuning. It can be seen that without correction of the output pole frequency, the IIP2 drops down quickly as the offset frequency between the input tones increases. If the pole frequencies are made equal, the R tuning changes the magnitudes of voltage signals in the two branches, keeping their phases the same. Therefore, improved IIP2 can be maintained over much wider bandwidth. More details about the RC pole trimming technique can be found for example in [33], [34]. In mixers equipped with CMFB loops, wide loop bandwidths are necessary to prevent sig- nificant phase shift of differential mode distortion with respect to common mode distortion due to both current source and RC load mismatches. The required loop bandwidths depend on the bandwidth of desired signals downconverted by the mixer. Chapter 5. IMD2 Cancellation Methods 124 IIP2 vs offset frequency 110 105 100 RC pole uncalibrated 95 RC pole calibrated 90 IIP2 [dBm] 85 80 75 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Offset frequency [MHz] Figure 5.17: Calibrated IIP2 vs offset frequency with and without RC pole tuning 5.4 Automatic IMD2 Cancellation 5.4.1 Motivation Based on the presented overview of IMD2 cancellation methods it can be stated that two most reliable second order distortion cancellation techniques are IMD2 compensation and IP2 calibration. An important issue associated with these methods is how to appropriately scale the reference distortion (in case of IMD2 compensation) or adjust the settings of IP2 tuners (in case of IP2 calibration) so that the required suppression of second order intermodulation distortion is achieved. As already mentioned at the beginning of this chapter, performing necessary adjustments as a part of post-production testing with the aid of dedicated measurement setups is not desirable for cost and time reasons. A much more preferable solution is to let every fabricated receiver chip adjust itself automatically, without the help of external equipment. Such automatic IMD2 cancellation approach poses however several challenges. As discussed in Chapter 3, IMD2 distortion should be well below the noise floor to meet sensitivity specifica- tions. Therefore, an issue of detection of distortion hidden in noise becomes apparent. Further- more, using the obtained information about distortion level to perform correct adjustments that actually decrease distortion level is not an easy task. Finally, the question of when to perform such automatic adjustments needs to be answered, taking all system-level considerations into account. One of the first publications dealing with the subject of automatic IMD2 cancellation was [35]. The calibration settings were set based on measurements of received signal strength in- dicator (RSSI) and frame error rate (FER) for a specific communication system (PHS). Such approach is not advantageous for two reasons. First, it is a system dependent concept, requiring interaction with receiver blocks performing higher level system tasks including FER and RSSI measurements. Although technically feasible, this concept may be difficult to implement for organizational reasons since RF transceivers are usually developed independently from the base- band units. Secondly, the method presented in [35] is rather slow as signal level measurements take time and it may happen that they have to be performed for the whole range of tuning codes. Chapter 5. IMD2 Cancellation Methods 125 LPF Rx Backend LPF RF Test Source ( )2 LPF (a) Test signal based compensation LPF Rx Backend LPF RF Test Source (b) Test signal based calibration Figure 5.18: Test signal based IMD2 cancellation schemes Modern RF transceivers are complex mixed-signal systems incorporating not only RF/analog building blocks but also analog-to-digital and digital-to-analog converters as well as digital sec- tion performing pre- or post-filtering tasks. Because such transceivers contain digital logic, they are well suited for performing automatic IMD2 cancellation task independently of higher- level system components. The rest of this section describes such IMD2 cancellation techniques, including a method proposed as a part of research documented in this dissertation. 5.4.2 Cancellation Schemes with Test Signals Basic automatic IMD2 cancellation schemes utilize test signals as receiver excitations, as shown in Fig. 5.18. By detecting circuit response to known interferers, imbalance quantified by effective mixer mismatch can be estimated and appropriate adjustments can be introduced. When performing such IMD2 cancellation, it is essential to supply test signals to the parts of the receiver before single-ended to differential conversion. Otherwise, differences in ΔARF mismatches in the test signal path and in the main signal path may differ, leading to potentially wrong adjustments. Unfortunately, this means that IMD2 cancellation systems relying on input test signals are difficult to be fully integrated in case of integrated receivers having differential inputs. Chapter 5. IMD2 Cancellation Methods 126 IIP2 [dBm] 80 70 60 50 40 Time Initial Tracking Cancellation Figure 5.19: Automatic IMD2 cancellation: IIP2 vs time In [20], injecting low-frequency pseudo-random sequence currents directly to the mixer switching stage was proposed as a means of detecting mismatches between the switching transis- tors. The imbalances were estimated by correlating the excitation and response sequences in the analog domain. Apart from the fact that analog correlation is prone to inaccuracies due to DC offsets or mismatches, the technique completely ignored coupling effects and mismatches in the input stage, which are important even in double-balanced structures. Furthermore, the effects associated with high-frequency nonlinear behavior of the switches were not taken into account. Additionally, injection of signals directly to the inputs of the switching stage degrades perfor- mance of the mixer because parasitic capacitances loading the switching pairs are inevitably increased. In conclusion, the usefulness of the technique presented in [20] is limited. In [36], a general automatic calibration scheme was patented based on exciting the receiver with an AM modulated interferer having a known AM content and correlating the response with that AM content in order to determine necessary adjustments of one of the differential branches at the output of the downconverter. In another patent, supplying test tones and measuring the resulting DC offsets was proposed to determine the scaling factor of compensating currents injected to the differential outputs of the mixer [37]. A technique based on reusing existing transceiver building blocks for generation of out-of- band tones and AM modulating them using simple switches was proposed in [38]. The optimum IP2 tuner code was selected as the one corresponding to minimum interference level measured at the receiver output. Another method based on supplying an out-of-band test tone and detecting dynamic part of the output DC offset was presented in [39] and patented in [40] and [41]. The dynamic DC offset was measured simply as a difference between total DC offsets for the blocker in ON and OFF states. The proposed method suggested using power amplifier leakage through the T/R (transmit/receive) switch as test tones. The same concept of estimating imbalance by measuring the dynamic DC offset component was proposed in [33]. In general, solutions based on measuring pure DC offsets can be effective for systems not employing DC offset compensation in the baseband section of the receiver. However, their usefulness is doubtful in low-voltage applications, where DC offset compensation is mandatory because otherwise amplified DC offsets would saturate the baseband path. Reliable measure- ments of a significantly attenuated dynamic DC offset component are questionable, especially in CMOS technologies due to presence of flicker noise. Chapter 5. IMD2 Cancellation Methods 127 Primary Signal + e(n) - Interference Reference Adaptive Filter Estimate w(n) Figure 5.20: Adaptive interference cancellation system architecture 5.4.3 Adaptive IMD2 Cancellation Adjustments of certain parameters in test signal based compensation and calibration schemes can be done only when the receiver is in idle mode, i.e. when it does not receive any desired signal. This happens for example just after power-up of the transceiver. However, it has been shown that the effective mixer mismatch varies with changes in operating conditions. For ex- ample, it depends on temperature, which changes rapidly after power-up. Thus, maintaining sufficient IMD2 suppression requires updating reference distortion gain coefficients (in case of IMD2 compensation schemes) or tuning codes (in case of IP2 calibration). Such updates can be performed with test signals in a periodic manner. However, determi- nation of when and how often to trigger the adjustment procedure requires careful planning on a system level. Moreover, in case of wireless systems employing continuous transmission and reception, performing necessary adjustments periodically may be impossible. Thus, it is desir- able to employ IMD2 cancellation techniques which are system independent and allow to keep satisfactory IMD2 suppression even with simultaneous reception of the desired signal. As a possible solution, statistical adaptive signal processing techniques can be utilized. Such methods have already proven useful in wireless receivers, for example in compensating static DC offsets and I/Q imbalances [42], [43], [44]. They are also an interesting option for IMD2 cancellation for a number of reasons. First, adaptive techniques heavily exploit correlation properties between certain signals. Therefore, they allow to detect distortion hidden in noise, in the same way as spread-spectrum systems are able to detect transmitted signals even when they are considerably below the noise floor. This property is essential to reliably decrease distortion to a level for which system sensitivity specifications are met. Second, IMD2 cancellation settings can be adjusted while re- ceiving the desired signal, provided that the wanted signal and distortion signal to be cancelled are statistically independent, which is a reasonable assumption. This feature of adaptive IMD2 cancellation will be referred to as online cancellation. Third, adaptive techniques are well-suited to track non-stationary systems. In the context of second order distortion, nonstationarities result from sensitivity of effective IMD2 mismatch to operating conditions as described in the previous chapter. Generally, performing the adaptation task in the digital domain is preferred because the adaptation procedure should be free of mismatches in order to estimate correctly correlation between certain signals. As modern wireless transceivers contain digital logic, they provide the ideal platform for implementation of adaptive systems. Chapter 5. IMD2 Cancellation Methods 128 −3 −3 x 10 Trajectory of Distorted Signal x 10 Trajectory of Compensated Signal 8 6 6 4 4 2 Q 2 Q 0 0 −2 −2 −4 −4 −6 −4 −2 0 2 4 6 8 −6 −4 −2 0 2 4 6 −3 −3 I x 10 I x 10 (a) Uncompensated QPSK trajectory (b) Compensated QPSK trajectory Figure 5.21: Adaptive IMD2 compensation: signal trajectories Adaptive techniques can serve as a supplement to test signal based IMD2 cancellation. For example, initial cancellation can be carried out with the help of test signals, while tracking the effective mismatch variations may be a task of some adaptive system, as illustrated in Fig. 5.19. However, adaptive methods can be obviously used for both initial cancellation and tracking. The only issues are that a strong interferer must be actually present at the receiver input for the adaptation procedure to succeed and that the adaptation process takes some time, which means that system specifications may be temporarily not fulfilled. Out of four major categories of adaptive systems [45], the IMD2 cancellation task fits into the adaptive interference cancellation architecture presented in Fig. 5.20. It can be customized to both IMD2 compensation and IP2 calibration schemes. As far as the adaptation algorithm is concerned, the one most suitable for real-time applications is the least-mean square (LMS) algorithm [45]. Below, adaptive IMD2 cancellation system architectures as well as adaptation algorithms are studied more thoroughly. Adaptive IMD2 Compensation The general adaptive interference cancellation system of Fig. 5.20 can be applied to adap- tively adjust gain of the amplifier being a part of the compensation system shown in Fig. 5.8. The primary signal should be associated with an output signal of the mixer, potentially con- taining the undesired second order distortion component. The amplifier scaling the reference distortion forms a one-tap adaptive filter, whose output signal (an interference estimate) is sub- tracted from the output signal of the mixer. The error signal driving an adaptation procedure of the scaling amplifier is calculated as a difference between the mixer output signal and the interference estimate. The adaptive IMD2 compensation scheme was proposed in several publications. In [46], the reference signal was obtained by squaring the output signal of the mixer, as in Fig. 5.9b. For good cancellation of distortion, a multi-tap finite impulse response (FIR) equalizer was used, which combined the functions of scaling the amplitude of reference distortion and equalizing the main and reference signal paths. In [47], the reference second order distortion signal was Chapter 5. IMD2 Cancellation Methods 129 LO BB OUT RF IN LPF we CM A/D Detector ref LMS LPF A/D Adaptation Figure 5.22: Adaptive IP2 calibration system with common mode reference signal obtained from the low-pass filtered output signal of the low-noise amplifier, thereby avoiding the use of a dedicated squaring block. However, an issue of nonlinear behavior of the LNA and downconversion mixer at high input signal levels, where higher order distortion products start to play an important role, was not addressed. Publications [48] and [49] propose again the use of reference signal path shown in Fig. 5.9b but apply it to cancel not only even order distortion but also odd order distortion. The adaptive IMD2 compensation scheme performs very well in case of reception of a desired signal. As an illustration, a zero-IF receiver with an IMD2 compensation system was simulated. In the simulation setup, the reference signal was obtained from the output of the mixer, as in Fig. 5.9b. Additionally, a 3-tap equalizer was used in the digital section. The desired signal at the Rx input was -100dBm, while the power of a two-tone blocker was -30dBm. The IIP2 of the receiver was set to 30dBm. Fig. 5.21 shows trajectories of a quadrature-phase shift keying (QPSK) modulated signal with a 4MBd baud rate before compensation and after convergence of the compensating adaptive filter. The effect of second order intermodulation distortion in the form of dynamic variations of the constellation center (as already discussed in the previous chapter and shown in Fig. 4.13b) is greatly suppressed. Adaptive IP2 Calibration The concept of adaptive adjustment of the scaling factor in the IMD2 compensation scheme can be also applied to the IP2 calibration scheme [C6]. A parameter suitable for adaptive adjustment is a code of the IP2 tuner. The adaptive IP2 calibration scheme has different associations with generic signals of the adaptive interference cancellation architecture shown in Fig. 5.20 than the IMD2 compensation scheme. The primary signal should be associated with the differential baseband output signal of the mixer after exclusion of the differential signal from the IP2 tuner. The IP2 tuning circuit forms a one-tap adaptive filter, whose output signal is an IMD2 component converted intentionally from common mode to differential mode. The total output signal of the mixer is an error signal, which drives the adaptation procedure of the tuning circuit. In order to facilitate online adaptive IP2 calibration, an appropriate reference distortion signal has to be provided. The most general idea is to exploit common mode distortion reference signal as shown in Fig. 5.22. Such reference signal can be detected with the help of output Chapter 5. IMD2 Cancellation Methods 130 Zoomed output signal: begin Zoomed output signal: end 0.1 0.1 0.08 0.08 0.06 0.06 0.04 0.04 0.02 0.02 0 0 −0.02 −0.02 Voltage [V] Voltage [V] −0.04 −0.04 −0.06 −0.06 −0.08 −0.08 −0.1 −0.1 0.9 1 1.1 1.2 1.88 1.89 1.9 1.91 1.92 −4 Time [mS] Time [mS] x 10 (a) Zoomed version: begin (b) Zoomed version: end Output signal 0.1 0.08 0.06 0.04 0.02 0 −0.02 Voltage [V] −0.04 −0.06 −0.08 −0.1 0 0.5 1 1.5 2 −3 Time [mS] x 10 (c) Output signal Figure 5.23: Adaptive IP2 calibration: output signal common mode feedback loop of the downconversion mixer. An important advantage of using common mode reference signal is that no squaring of the interferer envelope is necessary. The system of Fig. 5.22 is suitable for both direct conversion receivers and low-IF receivers, but only those which use real analog baseband filters followed by a complex multiplication as in Fig. 3.4b. The error signals for I and Q paths must be obtained from the inputs of such complex multiplier because otherwise the correlation with the reference signal would be lost. To demonstrate the feasibility of adaptive IP2 calibration using common mode reference signal, a sample downconverter equipped with a common mode detector (circuit details are described in the next chapter) and a digital LMS adaptation engine, was simulated. The initial IIP2 of the mixer was set to 60dBm. An out-of-band AM modulated interferer with -10dBm mean power was supplied to the mixer input. Fig. 5.23 shows an output baseband signal of the downconverter during adaptive calibration. The calibration effectively removes the AM interference. After convergence, the signal contains significantly reduced amount of IMD2 and noise, which cannot be cancelled anyway. In a special case of integrated transceivers operating in continuous transmission/reception mode, for example in full-duplex CDMA transceivers, it is possible to obtain the reference signal directly from the transmitter as shown in Fig. 5.24, provided that transmitter leakage to the Chapter 5. IMD2 Cancellation Methods 131 LO BB OUT LNA LPF w e A/D I 2 ref LMS PA Tx Adaptation Q Figure 5.24: Adaptive IP2 calibration system with reference signal obtained from Tx Rx input due to finite diplexer isolation is the only dominant AM interferer in the system. The reference signal can be computed as a squared envelope of the transmitted (uplink) signal. In case of direct up-conversion transmitters, the envelope can be calculated from I and Q signals using special algorithms for computation of complex number magnitudes [50] while squaring can be accomplished by employing efficient digital squaring algorithms [51]. In transceivers based on the polar architecture (see Chapter 3), obtaining the reference signal is straightforward as the transmitter envelope signal is readily available. In the adaptive IP2 calibration scheme with the reference signal obtained from the transmit- ter, it is necessary to estimate the total group delay of the transmitter signal path and diplexer leakage path prior to performing the correlation because otherwise the adaptation process might not converge. Adaptive IP2 calibration scheme can be also used for initial (offline) test signal based IMD2 cancellation [C2], as an embodiment of the patent described in [36]. Such offline adaptive IP2 calibration scheme with internally generated AM test signal offers some advantages over the methods described earlier in this chapter. First, it contains a built-in correlation-based distortion level detector. Second, it can find the optimum solution without the need for scanning all possible tuning codes. The offline adaptive IP2 calibration system, shown in Fig. 5.25 consists of a mixer with an IP2 tuning circuit, an RF oscillator generating an out-of-band tone, which is further AM modulated by an envelope pattern test source, as well as a digital section performing the adaptation task. An out-of-band tone is required so that it can be removed by a baseband channel select filter after downconversion. In this way, the signal to be detected by the digital section consists only of a low frequency second-order intermodulation beat plus noise. The adaptation is carried out by correlating a squared version of the envelope pattern with the output signal of the mixer. Obtaining the squared envelope signal is not difficult because the envelope pattern is known as it is generated locally. The squaring block can be avoided by employing common mode signal detection as in the basic online calibration mode. Alternatively, in a special case of square wave AM modulation, the digital envelope pattern can be fed directly to the adaptation circuit and the squaring block doesn’t have to be used at all. Moreover, AM modulation of the RF test tone becomes very easy as no sophisticated modulator is needed. Chapter 5. IMD2 Cancellation Methods 132 AM LO Modulated RF Blocker BB OUT LPF w e D/A A/D ref LMS ^2 Adaptation Digital Envelope Pattern Source Figure 5.25: Optional offline adaptive IP2 calibration system Adaptation Algorithms In general, adaptive algorithms adjust parameters of adaptive filters in order to minimize an appropriately defined objective (cost) function. Therefore, they perform in principle an optimization task. One of the most widely used cost functions is the mean-squared error (MSE) cost function defined as: 2 JMSE =E e (k) , (5.18) where the error signal is e(k)=d(k) − y(k). (5.19) In case of the adaptive IP2 calibration task, d(k) denotes a part of the sampled output signal of the mixer consisting of a sampled signal iout(k) downconverted by the normal mixer operation, a sampled noise signal n(k), and a sampled differential second order distortion signal due to initial (unknown) effective mixer mismatch d(k)=iout(k)+KΔIMD2initial icm,imd2(k)+n(k). (5.20) The signal y(k) is a sampled differential distortion converted intentionally from common mode distortion and is given by − y(k)= KΔIMD2intentional icm,imd2(k). (5.21) Therefore, the error signal can be written as e(k)=iout(k)+K ΔIMD2initial + ΔIMD2intentional icm,imd2(k)+n(k). (5.22) Assuming that in (5.22) all signals are independent, the mean-squared error can be calcu- lated as a sum of mean powers of the desired signal, noise and second-order intermodulation distortion. Fig. 5.26 shows the mean-squared error cost function JMSE versus effective mixer mismatch ΔIMD2eff in 3 distinct cases. The dotted line corresponds to the noiseless output with no demodulated desired signal present. In this case, JMSE is zero for ΔIMD2eff = 0. The dashed Chapter 5. IMD2 Cancellation Methods 133 Distortion + Noise + Desired Signal Distortion + Noise 2 Distortion Only MSE, E[e] Effective Mismatch 0 Figure 5.26: Mean square error vs mismatch line corresponds to the noisy output but also with no demodulated desired signal present. The minimum value of JMSE is no longer zero but is equal to the noise power. Finally, the solid line corresponds to the most general case with noise, wanted signal and second order distortion present. The minimum value of JMSE is a sum of noise power and desired signal power. In all three cases, JMSE achieves its minimum for ΔIMD2eff = 0, which coincides with the aim of IP2 calibration. Once the cost function is defined, it can be minimized using a gradient descent optimization method, which iteratively updates system parameters in a direction opposite the cost function’s gradient. Unfortunately, in most practical cases, including IMD2 cancellation, the expected value of the squared error signal is unavailable. Therefore, adaptive algorithms are used as approximate gradient decent optimizers. The approximation comes in using the instantaneous value of the squared error as a noisy estimate of its expected value. A widely used adaptive algorithm is the least mean square (LMS) algorithm [45] because of its simplicity, which translates to low implementation cost, and ability to quickly track non- stationary systems. The LMS algorithm, which updates the coefficient of a one-dimensional IP2 tuner is given by the following equation: 2 w(k +1)=w(k) − μ∇we (k). (5.23) One dimensional tuners are suitable for IP2 calibration of mixers equipped with output common mode feedback loop and also for RC loaded mixers without CMFB block, provided that output poles are matched. In case of mismatched poles, two-dimensional tuners (and thus two-dimensional LMS algorithms) have to be used in conjunction with additional 90◦-phase shifted reference signals but these are not discussed here. In (5.23), the updated value of the IP2 tuner code w(k +1) is equal to the current value w(k) plus a change proportional to the negative gradient of the cost function (squared error signal) with respect to the coefficient w. The parameter μ is the algorithm step size, determining how much the adaptive filter coefficients may change from one step to another for a given gradient. Since the intentional mismatch is related to the tuning code w by the following equation: ΔIMD2intentional = αw(k), (5.24) Chapter 5. IMD2 Cancellation Methods 134 2 MSE, E[eMSE, ] w(1) w(2) w(3) w(k) MSEmin Effective Mismatch 0 Figure 5.27: Adaptation process the gradient of the instantaneous squared error with respect to the filter coefficient w is given by ∂e(k) ∇ e2(k)=2e(k) =2αKe(k)i (k). (5.25) w ∂w cm,imd2 Consequently, the filter coefficient update equation takes the form: w(k +1)=w(k) − 2μαKe(k)icm,imd2(k). (5.26) Fig. 5.27 illustrates the adaptation process carried out according to (5.26). The algorithm iteratively changes the effective mixer mismatch towards zero, where the minimum value of the mean-squared error is obtained. The basic LMS algorithm (5.26) requires multiplication of the error signal e(k) by the com- mon mode distortion signal icm,imd2(k) or some other sampled signal proportional to the common mode distortion signal (proportionality constant can be compensated by the algorithm step size μ). However, the LMS algorithm has proven to perform robustly even in the presence of sig- nificant approximations of (5.26) that are more easily implemented in dedicated hardware [52]. The general form of such low-complexity LMS algorithms is w(k +1)=w(k) − μg1 e(k) g2 icm,imd2(k) . (5.27) where g1(·)andg2(·) are odd-symmetric nonlinearities that are chosen to simplify the imple- mentation of the system. Especially attractive are sign functions as they require for their operation only sufficiently fast comparators instead of multi-bit analog to digital converters. If g1(e)=e and g2(icm,imd2)=sgn(icm,imd2), the algorithm is called sign-data LMS algorithm. If g1(e)=sgn(e)andg2(icm,imd2)=icm,imd2, the algorithm is called sign-error LMS algo- rithm. If g1(e)=sgn(e)andg2(icm,imd2)=sgn(icm,imd2), the algorithm is called sign-sign LMS algorithm. Out of more sophisticated variations, power-of-two quantized algorithms deserve at- tention as their performance is very close to the original LMS algorithm but their hardware implementation is much simpler [52]. Chapter 5. IMD2 Cancellation Methods 135 IP2 tuner learning curves 0 −20 −40 −60 −80 Largest step size Tuning code Nominal step size −100 Smallest step size −120 −140 0 0.5 1 1.5 2 2.5 3 3.5 4 Sample x 10 Figure 5.28: IP2 tuner learning curves for 3 different LMS step sizes When using these low-complexity algorithms, especially the simplest sign-sign LMS algo- rithm, their stability has to be examined carefully [53]. As nonlinearities g1(·)andg2(·) change the actual cost function into one for which usually no closed expression exists, stability has to be verified in practice using extensive simulations. Fortunately, it can be shown that in case of one dimensional filters stability is guaranteed and the only aspects to optimize are the convergence speed and steady state behavior, both affected by the algorithm step size μ. Transient Behavior Transient behavior of an adaptive algorithm, i.e. speed at which it approaches the optimal solution, depends on the algorithm step size but also on statistics of the processed signals. In the context of IIP2 calibration, baseband transients occurring when the IP2 tuner changes its settings also affect the convergence speed, because whenever such transient response occurs, it worsens correlation between the error and reference signals. To show how the algorithm step size affects learning curves of the IP2 tuner, a sample downconverter equipped with a sign-sign LMS equalizer was simulated. In the adaptive IP2 calibration scheme, which belongs to the category of mixed-signal adaptive techniques, the step size value can be controlled either in analog or digital sections. Fig. 5.28 shows learning curves for adaptive SS-LMS IP2 calibration of the given downconverter carried out with 3 different step sizes controlled by varying the resolution of the analog IP2 tuner (stated equivalently, by varying the coefficient α of the tuning characteristic). As expected, smaller step sizes result in a longer convergence time. Because the simulated mixer had the same initial effective mismatch, the intentional mismatch to be introduced by the IP2 tuner was also the same is all 3 cases. Since it equals to the product of the IP2 tuner coefficient α and the digital tuning code w, finer tuner resolutions result in higher values of the optimal digital tuning code to which the algorithm converges, as seen in Fig. 5.28. Statistics of reference signals also influence the convergence time. As an illustration, Fig. 5.29 compares learning curves for two distinct interferers. The first one is a QPSK modulated signal continuously supplied to the mixer input. Another one is a GMSK modulated interferer transmitted in bursts as a single slot of the frame as defined in the GSM standard. Note that a rather small step size was chosen, resulting in long convergence time for both interferers. However, the relative convergence speed is much faster in case of the QPSK interferer than in Chapter 5. IMD2 Cancellation Methods 136 IP2 tuner learning curves 0.016 0.014 0.012 0.01 0.008 QPSK interferer 0.006 TDMA GMSK interferer Intentional mismatch 0.004 0.002 0 0 0.5 1 1.5 2 2.5 5 Sample x 10 Figure 5.29: IP2 tuner learning curves for 2 different interferers case of the TDMA burst interferer. Generally, interferers having poorly correlated envelopes will result in faster convergence than signals with well-correlated envelopes. Besides, the learning curve for the TDMA interferer plotted in Fig. 5.29 shows that whenever the RF interferer disappears, the adaptive algorithm keeps the IP2 tuner settings unchanged. Steady State Behavior Once the algorithm has converged, the tuning codes fluctuate around their optimum values. Therefore, the optimum solution is never achieved exactly by an adaptive algorithm. Depending on the algorithm step size, the solution fluctuates more or less but always it gives rise to the mean-squared error J∞ larger than Jmin. To quantify this behavior, a parameter called misadjustment is used. It is defined as J∞ − J M = min . (5.28) Jmin The numerator of the above equation is often called excess mean-squared error and is denoted by Jexc = J∞ − Jmin. Fig. 5.30 illustrates the idea of excess mean-squared error caused by the LMS algorithm behavior. For smaller step size values, the tuner settings fluctuate between the optimum state and neighboring states, which correspond to smaller MSE than in case of larger step size values. Hence, the average MSE is closer to the optimum value Jmin for smaller step size values. In Fig. 5.30, a situation is shown in which one of the tuner states corresponds to the complete cancellation of distortion. In practice, the optimum tuning code corresponds to the effective mismatch somewhere around 0 within the resolution of the IP2 tuner. Nevertheless, the above considerations remain valid also in case when the optimum tuning code does not lead to perfect cancellation. Excess MSE limits the IMD2 suppression performance in the steady state. As an illustration, Fig. 5.31 compares distortion-to-noise ratio for two different step size values. The plot was created by averaging 100 simulation runs. A downconverter equipped with a sign-sign LMS equalizer was used in simulations. One step size was two times smaller than another. To shorten the simulation time, the IIP2 of the mixer in case (a) was 10dB higher than in case (b). From the plots it can be seen that the IMD2 suppression improves by more than 6dB in case of the smaller step size. However, this is achieved at the expense of slower convergence speed. Chapter 5. IMD2 Cancellation Methods 137 2 2 MSE, E[e ] E[e MSE, ] E[e MSE, MSEmin MSEmin Effective Effective Mismatch Mismatch 0 0 (a) Small parameter bounce (b) Large parameter bounce Figure 5.30: Graphical explanation of excess MSE Distortion to noise ratio Distortion to noise ratio 10 20 5 15 0 10 −5 5 DNR [dB] DNR [dB] −10 0 −15 −5 −20 −10 0 200 400 600 800 1000 0 200 400 600 800 1000 Time [us] Time [us] (a) Small step size (b) Large step size Figure 5.31: Distortion to noise ratio vs time for two different step sizes The same trade-off between convergence time and steady state behavior exists when using oversampling of a given band-limited random process. For high oversampling ratios and a given bandwidth of the primary and reference signals, increasing the sampling rate is equivalent to increasing the algorithm step size, which means faster convergence but poorer final IMD2 suppression. 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Chapter 6 Hardware Demonstrator 6.1 System Architecture To verify the concept of adaptive IP2 calibration introduced in the previous chapter, a dedicated hardware prototype was designed. Fig. 6.1 shows a block diagram of the system. It comprises an IP2-tunable IQ downconverter driven by a quadrature LO signal derived from the double LO frequency signal, a baseband filter for attenuating out-of-band interferers, a set of one-bit analog-to-digital converters, a simple switch-based AM modulator, a detector of the common mode signal of the mixer and a digital section performing the adaptation task by means of a low-complexity sign-sign LMS algorithm. The prototype was intended to test two calibration modes: an online mode with a common mode based reference signal and an offline mode with a square wave reference signal obtained from the local envelope pattern source. The AM modulator is turned off in the online mode, allowing an externally amplitude-modulated RF interferer to pass through to the input of the IQ mixer. In the offline mode, a continuous wave signal is fed to the RF input of the whole system, where it is AM modulated with a square wave signal and then processed by the mixer. 6.2 Circuit Design 6.2.1 Mixer Design Fig. 6.2 shows a schematic of the IP2-tunable downconversion mixer, being a central part of the calibration system. Since one of the goals was to implement a low-voltage demonstrator operating at only 1.5V, a current mode output mixer architecture with opamp-based RC active filter interface to baseband was chosen. Mixer Core Circuit The mixer core is based on a CMOS version of the Gilbert cell [1], [2]. It consists of a pseudodifferential input stage transconductor and a switching quad. A choice of the input stage without a tail current source was dictated by low voltage supply. The mixer was designed for high-linearity (in terms of 1dB compression point and IIP3) in the first place [C1], [C5], [J1]. The lack of a tail current source improves odd-order nonlinearity of the mixer because the saturation effect present in fully differential transconductors is removed. However, the even-order nonlinearity of such transconductor becomes significant. Linearity of the input stage was determined by setting appropriate bias overdrive voltage of transistors. Since CMOS devices have poor switching characteristics, their nonlinearity was also taken into account during the design process. Chapter 6. Hardware Demonstrator 143 1bit ENV D/A GEN CM 1bit DET A/D SS LMS ENGINE AM RF IN BB 1bit MOD FILTER A/D DIV2 BB OUT 2 LO IN Figure 6.1: Demonstrator architecture - concept CM ref Detector CMFB mag(w) sgn(w) IF+ IF- LO+ LO- LO+ RF+ RF- Figure 6.2: IP2-tunable downconversion mixer The major noise contributors are the input stage transistors and the switching devices. For a given linearity, the noise performance of the input stage is determined by transistor widths. The overall noise contribution of the switches was reduced by driving them to deep triode region, which decreased their transconductance. Additionally, the flicker noise component was lowered by increasing dimensions of the switches. Current consumption of the mixer core is 4mA. Common Mode Feedback Circuit The output CMFB loop is required to set a well defined common mode voltage at the output of the mixer, necessary for proper operation of the following opamp-based RC load. The CMFB block, consuming 400μA of current, was built around a differential pair with a current mirror load [3], while the current sources closing the loop were implemented as appropriately scaled PMOS transistors. Main design challenges were the noise contribution of the current sources as well overall CMFB loop bandwidth sufficient to respond to common mode distortion without generating excessive common mode voltage swings in the mixer output branches [4]. Chapter 6. Hardware Demonstrator 144 CMFB CNTL TUNE<7:0> TUNE<7:0> IREF OUT OUTx OUT OUTx (a) IP2 tuner (b) DC offset tuner Figure 6.3: Tuner schematics CMFB R CNTL OUT R MIX BIAS Figure 6.4: Schematic of the common mode signal detector Mixer Load Circuit The opamp based active RC filter serves as the mixer load and simultaneously as a first section of the baseband filter. In the demonstrator, the RC pole frequency was set to about 1.6MHz by using 10kΩ resistors and 10pF capacitors. The opamp consumes 3mA of biasing current, most of which flows through the opamp output stage. Such high current consumption is necessary to prevent degradation of the mixer core linearity. The simulated conversion gain of the complete mixer (i.e. including the active RC load) for a 2GHz RF signal was 34dB, 1dB compression point was√ -8.5dBVrms, IIP3 was -0.5dBVrms, while the DSB noise voltage density at 100kHz was 4.5nV/ Hz. 6.2.2 Tuning Circuits To prevent generating excessive DC offsets at the output of the mixer, a combined IP2 - static DC offset tuner was implemented in the demonstrator. The IP2 tuner reduces the effective mixer mismatch while the DC tuner compensates for the static DC offset introduced by the IP2 tuner. The combined tuner proves useful in mixer auto-calibration since undesired transients due to abrupt static DC offset changes are significantly reduced. Both IP2 and DC offset tuners were placed in the output stage of the mixer, which had a positive impact on mixer noise performance. Shown in Fig. 6.3, the calibration circuits are based on a current steering digital to analog converter architecture. The main difference between them is the fixed biasing of the DC tuner, which does not respond to common mode distortion. Moreover, each tuner is connected to the opposite output branch of the mixer core at a given time. Consequently, the combined tuner loads equally the output branches of the mixer and does not introduce any deterministic mismatch to the mixer. Chapter 6. Hardware Demonstrator 145 + + - - + + - - + + - IN - - + OUT + + - INx - + - OUTx Figure 6.5: Schematic of the baseband filter with DC compensation 6.2.3 Supporting Circuits Quadrature Generation Circuits and LO Buffers In order to reduce LO-to-RF coupling via bond wire mutual inductances, quadrature LO signals are generated on-chip from an externally supplied signal at double LO frequency using divide-by-2 master-slave flipflop circuits [1]. The circuitry consumes 10mA at 4GHz input LO frequency. To reduce noise contribution of the switching stage transistors, LO buffers in the form of differential inverters were placed between quadrature generation circuits and the mixer core circuit. The current consumption of the LO buffers is quite high and equals roughly 5mA per buffer at 2GHz effective LO frequency. Common Mode Detector For the online auto-calibration mode, a reference common mode signal detector was designed. Fig. 6.4 shows its schematic diagram. Basically, the detector consists of a scaled version of one branch of the mixer core and output stage current source. An NMOS transistor corresponding to the mixer input transconductor is biased with the same DC bias voltage as the mixer. The output stage current source is driven by the common-mode feedback loop control signal, whose AC component is proportional to the common mode distortion of the mixer core. The detector converts this signal to current and then back to voltage using an opamp-based active RC filter. The current consumption of the whole detector is roughly 800μA and is dominated by the network mirroring one of the mixer core branches (500μA). BB Filter Apart from the mixer RC load filter, an additional two-pole RC active filter was implemented in the demonstrator to better suppress out-of-band interferers and thus reduce the aliasing effect in the analog-to-digital converters. Furthermore, the role of the filter is to provide extra gain for in-band signals so that the small differential distortion could be detected using simple comparators. Chapter 6. Hardware Demonstrator 146 IN INx OUT Threshold Tuner TUNE<7:0> Figure 6.6: Comparator with the threshold tuner ref DQ clk Inner clk CLK Up/Down e Counter DQ clk CLK Outer 2s Complement Up/Down to Sign-Magnitude w Counter Adapter Figure 6.7: Implementation of the sign-sign LMS algorithm The architecture of the filter, implemented as a differential biquad section, is shown in Fig. 6.5. A static DC offset compensation loop was added to attenuate differential DC component at the output of the mixer load caused by LO self-mixing and device mismatches. The voltage gain of the designed baseband filter is 20dB, the upper corner frequency is about 2MHz, while the corner frequency of the DC loop is about 50kHz, being limited by the available chip area required by blocking capacitors. Contribution of the BB filter to the overall noise of the IQ downconverter can be neglected because the preceding stage provides large gain. The current consumption of the filter is 3mA in each quadrature path. Comparators The analog part of the demonstrator is linked with the digital section with fast comparators acting as one-bit analog-to-digital converters. A schematic of the comparator is shown in Fig. 6.6. Comparators in I and Q paths have differential inputs, while a comparator in the reference signal path has one of the inputs connected to mid-supply. Each comparator draws 300μA and is equipped with a threshold tuner, which compensates for any residual DC offset at the comparator input. The internal structure of the tuner is identical to the DC offset tuner used in the mixer output stage, except that PMOS transistors are replaced with NMOS transistors. Chapter 6. Hardware Demonstrator 147 LO Digital Digital Digital Section Section Interface Comp Comp Comp Mux BB BB IFi IFq filter filter LO I/Q LO OPamp OPamp Buffer Splitter Buffer RC load RC load CMFB CMFB AM Internal CM Mod IP2-DC Tuner IP2-DC Tuner Biasing detector RF Figure 6.8: Test chip floorplan 6.2.4 Digital Equalizer The digital section of the demonstrator adjusts the settings of various tuners placed in the analog section. It consists of separate adaptive engines for the mixer and each of the comparators. Every adaptive subsystem implements a sign-sign LMS (SS-LMS) algorithm. Fig.6.7 shows a block diagram of the SS-LMS engine. The clock frequency used in the demonstrator is 16MHz. In adaptive IP2 tuning loops working in the offline calibration mode, the comparator of the reference signal and the following latch (D flipflop) are not used, because the reference signal is obtained directly from the digital envelope pattern source. In adaptive DC tuning loops, which adjust the settings of threshold tuners within the comparators, the general adaptive engine structure of Fig. 6.7 is also simplified, because in such case the reference signal is simply a DC signal represented in the digital domain as a constant bit value. The core of the sign-sign LMS algorithm is an XOR gate, which effectively multiplies two one-bit streams. By integrating the resulting product, an estimate of the correlation between reference and error signals can be made. Because the output of the XOR gate is also a bit stream, the integrators could be implemented as compact up-down counters. In order to smooth the convergence of the LMS algorithm, two-stage counters are used in the demonstrator. A state of the least significant bit of the inner counter determines whether a value of the outer counter increases or decreases while the most significant bit triggers the change of the outer counter. Whenever a state of the outer counter changes, the inner counter is reset to half of its maximum value. This technique helps to reduce the impact of undesired transients (occurring when the analog tuner changes its state) on the correlation between reference and error signals. Each counter is 8bit wide. Since the analog tuners accept tuning codes in the sign-magnitude format, dedicated adapters converting digital words from the 2s complement format to the sign- magnitude format are included in the system. Chapter 6. Hardware Demonstrator 148 Figure 6.9: Test chip layout 6.3 Layout and Fabrication A floorplan of the complete test chip is shown in Fig. 6.8. Careful arrangement of various building blocks and estimation of the available area for each block was crucial for doing the layout efficiently [5]. The high frequency analog section was placed as far away from the digital section as possible to reduce self-interference. Quadrature generation circuitry and LO buffers were placed close to the mixer core to minimize the length of on-chip routing and thus reduce LO line parasitics and coupling of strong LO signals to other building blocks. For the fabrication of the IP2-tunable IQ downconverter, an advanced 0.13μmRFCMOS process from Infineon was chosen [6], [7]. It offers four thin copper metallization layers and two uppermost thick aluminum-copper metal layers. High-density (2.1fF/μm2) metal-insulator- metal (MIM) capacitors are available. The process features a P doped substrate, thin oxide transistors with a minimum feature size of 120nm and source-drain breakdown voltage of 1.5V as well as thick oxide transistors with a minimum feature size of 400nm and a source-drain breakdown voltage of 2.5V. Fig. 6.9 shows a top-level layout of the test chip. Bond pads contain electrostatic discharge (ESD) protection structures. Top-level power and ground lines were drawn using uppermost thick metal lines to reduce power losses. Differential input RF and LO lines were drawn in parallel to each other without a risk of coupling because a signal at twice LO frequency is supplied to the chip. LO signals after division by 2 are perpendicular to input RF lines wherever possible. In addition, LO signal lines are shielded with neighboring metal layers to minimize EM-coupling. The mixer core is surrounded by special highly resistive substrate rings to reduce coupling of substrate noise from the LO divider and buffers. Such rings were also placed around the digital section in order to decrease coupling of digital signals to the sensitive RF circuitry. To ensure maximum protection for given area resources, two parallel rings were placed. Within particular layout cells, special care was taken to provide matching of transistors by using symmetrical layout patterns, including cross-coupling and interdigitation patterns. Substrate and N-well connected guardrings were used around all transistors as well as polysilicon resistors. In the RF mixer core, special layout cells optimized for low parasitics were used. A micrograph of the fabricated test chip is shown in Fig. 6.10. The chip area is 2mm2. Chapter 6. Hardware Demonstrator 149 Figure 6.10: Test chip die microphotograph 6.4 Test Board Since the designed test chip is rather complex and contains many signal pads, it wasn’t feasi- ble to carry out its measurements using on-wafer techniques. Therefore, a dedicated evaluation board kit was designed and fabricated. It consists of 3 parts: a high frequency board, two base- band boards with converters from differential mode output signals of the chip to single-ended mode signals, and the main board which connects other boards, provides power supply and control logic circuitry. The test chip was bonded directly to the RF board. A bonding diagram, generated using a specialized IC package modeling tool [8], is shown in Fig. 6.11. Apart from differential RF, LO and IF signal lines, the following single-ended signal lines were connected to the test chip: Rbias - connection to an external resistor required by the biasing circuit, ON - test chip power up signal, CALIB - calibration mode signal, DATA - binary data signal, CLK - clock signal, RST - reset signal for on-chip registers. Ground pads were down-bonded to the ground plane below the chip in order to reduce the ground bounce by decreasing the bond inductance. Fig. 6.12 shows a photo of the chip attached to the RF board. The complete RF board is shown in Fig. 6.13. The RF input is single-ended and is converted to differential mode by means of a wideband RF transformer [9]. The LO signal is brought to the RF board differentially from an external LO balun. Fig. 6.14a shows a board with the wideband balun used for double LO frequencies up to 3GHz, while a rat race coupler based balun shown in Fig. 6.14b is used only for 4GHz double LO frequency. To facilitate measurements of the test chip with measurement devices having single-ended 50Ω inputs, buffering differential to single-ended converters were built. Two types of converters were designed. For AC measurements, converters built around AD8045 operational amplifiers [10] were used. Another set of converters, designed for precise DC offset measurements, was built around AD620 instrumentation amplifiers [11]. To avoid potential rectification errors [12], an additional filter was placed on each board with the instrumentation amplifier. A printed circuit board with one of the converters is shown in Fig. 6.15. Fig. 6.16 shows a photo of the main board with RF and baseband converter boards. The main board contains switches for manual setting of the chip control signals. Moreover, it is equipped with buffering circuitry of the clock signal driving the digital section of the test chip. Chapter 6. Hardware Demonstrator 150 Rbias IFqx VDD IFq RF RFx ON VDD CAL VDD RST LO LOx IFix VDD IFi CLK DATA Figure 6.11: Bonding diagram Figure 6.12: Chip on board Chapter 6. Hardware Demonstrator 151 Figure 6.13: RF board (a) Wideband LO balun (b) 4GHz rat-race coupler Figure 6.14: LO baluns Figure 6.15: Board with a differential to single-ended converter Chapter 6. Hardware Demonstrator 152 Figure 6.16: Main board References [1] B. Razavi, RF Microelectronics. Upper Saddle River, NJ: Prentice-Hall, 1998. [2] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, UK: Cambridge University Press, 2004. [3] B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw Hill, 2001. [4] P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits. New York: John Wiley & Sons, 2001. [5] A. Hastings, The Art of Analog Layout. Upper Saddle River, NJ: Prentice-Hall, 2001. [6] “C11N Design Manual,” Internal Documentation v3.1, Infineon Technologies, 2004. [7] “C11RF Design Manual,” Internal Documentation v1.0, Infineon Technologies, 2004. [8] “Package Modeling Tool,” Internal Documentation v1.0, Infineon Technologies, 2000. [9] “CX2156 RF Transformer for Wideband RF Applications,” Application Note , Pulse En- gineering, 2004. √ [10] “AD8045 - 3 nV/ Hz Ultralow Distortion, High Speed Opamp,” Application Note , Analog Devices. [11] “AD620 - Low Cost Low Power Instrumentation Amplifier,” Application Note , Analog Devices. [12] “Reducing RFI Rectification Errors in In-Amp Circuits,” Application Note AD671, Analog Devices. 153 Chapter 7 Experimental Results 7.1 Measurement Site Arrangement Measurements of the hardware prototype were carried out using measurement equipment in a configuration illustrated in Fig. 7.1. Two power supplies were used. One was utilized to bias the test chip and clock generation circuitry, while another power supply was used to provide bipolar biasing of the opamp-based single-ended to differential converters. Two separate arbitrary waveform generators were employed - one as a clock signal for digital on-chip circuitry, second as an interferer envelope pattern generator for online IP2 calibration tests. Two RF signal generators were used for two-tone intermodulation tests, desensitization tests as well as online calibration tests. One microwave signal generator served as a local oscillator signal source at double LO frequency. RF filters (not shown in Fig. 7.1) were used to filter out undesired harmonics of the generators [1]. Device under test (DUT) responses were measured with a spectrum analyzer and an oscilloscope. A corresponding photo of the measurement site is shown in Fig. 7.2. 7.2 Measurement Results Measurements of the IQ demodulator were preceded by determination of cable and RF filter losses as well as the RF input balun insertion loss for proper extraction of raw measurement data. Note that losses of the LO balun were unimportant since on-chip LO signal regenerating buffers were used in the design. Balanced circuit specific issues were taken into account during measurement data extraction procedure [2]. At 2GHz effective LO frequency and 1.5V voltage supply the measured chip current con- sumption was 48mA. It decreased by a few miliampers at lower LO frequencies, apparently due to smaller power dissipation in the quadrature LO generation circuitry and LO buffers. 7.2.1 Basic IQ Downconverter Behavior Fig. 7.3 shows matching of the RF port measured from 1.5GHz to 2.5GHz with a vector network analyzer. The magnitude of the reflection coefficient is -10dB or less is the whole frequency range so RF input losses due to matching are not larger than 0.4dB. Measurements relating to gain, linearity and noise were carried out with the help of a spec- trum analyzer [3], [4], [5]. The effective LO frequency was fixed at 2GHz. Frequency response is plotted in Figure 7.4. Gain in the middle of the passband is 53.5dB. 3dB low corner frequency set by the DC offset compensation loop in the baseband filter is around 50kHz, while 3dB high corner frequency is about 1.5MHz. Chapter 7. Experimental Results 155 Ext Amp RFIC Clock signal power supply power supply generator Power Power Waverform Supply Supply Generator E3631A E3631A 33250A Oscilloscope Signal Generator Auxiliary RF signal LT262 SM300 generator DUT Spectrum Vector Signal Waverform Analyzer Generator Generator ESPI Signal Generator SMIQ 03B 33250A SMR 20 RF signal Envelope pattern LO signal generator generator generator Figure 7.1: Measurement site arrangement Figure 7.2: Measurement site Chapter 7. Experimental Results 156 (a) S11 (b) S11 magnitude Figure 7.3: Matching of the RF input port at 2GHz Frequency Response 60 50 40 30 Gain [dB] 20 10 0 4 5 6 7 10 10 10 10 Offset Frequency [Hz] Figure 7.4: Frequency response Chapter 7. Experimental Results 157 Desensitization 53 52.5 52 51.5 51 Small Signal Gain [dB] 50.5 50 −70 −60 −50 −40 −30 −20 −10 0 Differential Input Voltage [dBVrms] Figure 7.5: Desensitization measurement Fig. 7.5 shows small signal gain compression (desensitization) curve. An out-of-band blocker at 2.15GHz was fed to the mixer along with an in-band small signal at 2.0001GHz. By not- ing that large signal 1dB compression point corresponds to approximately 2dB of small signal gain reduction, 1dB compression point was estimated to be -9dBVrms, which in 50Ω system corresponds to +4dBm. Fig. 7.6 illustrates graphical calculation of IIP3 based on measurements of IMD3 using two- tone tests. The measured IIP3 value is -1dBVrms=+12dBm for out-of-band interferer tones at 2.075GHz and 2.1501GHz. Second-order intercept point was also measured using two-tone tests. Fig. 7.7 shows depen- dence of IIP2 on the frequency of RF interferer. During the measurements, a fixed tone spacing of 100kHz was used but the carrier frequency of the composite signal was swept from 1.5GHz to 2.5GHz. The plot reveals asymmetry in IIP2 for interferers applied below and above the LO frequency. This effect has been studied analytically in Chapter 4, where it was stated that it can be attributed to the high output conductance of the mixer switches combined with output stage capacitances. Fig. 7.8 shows levels of second-order and fourth-order intermodulation products vs. level of one tone of the two-tone input excitation. The IMD2 follows the 2dB/1dB slope for input signal levels up to 5dB below the mixer 1dB compression point. Moreover, it dominates the overall even-order distortion of the mixer even for input signal levels exceeding the 1dB compression point. The fact that the level of IMD2 distortion does not increase at a rate higher than 2dB/1dB at high input signal levels suggests that the IMD2 performance of this particular mixer is not limited by the switching stage mismatches but rather by self-mixing phenomenon. This is because in Chapter 4 it has been shown that slope of differential IMD2 line deviates from 2dB/1dB and depends on the level of the input signal but only if there are mismatches in the switching stage. Noise measurements were carried out on a spectrum analyzer using the direct√ method [6], [7]. The input-referred voltage√ noise density measured at 100kHz offset is 4.7nV/ Hz while at 1MHz offset it is 3.2nV/ Hz. The difference could be attributed to significant contribution of flicker noise coming from both the switching stage and current sources in the output stage of the mixers. Chapter 7. Experimental Results 158 IIP3 60 40 20 0 −20 −40 Differential Output Voltage [dBVrms] −60 −50 −40 −30 −20 −10 0 Differential Input Voltage [dBVrms] Figure 7.6: IIP3 measurement IIP2 vs. RF Frequency for LO=2GHz 80 75 70 65 IIP2 [dBm] 60 55 50 1.5 1.75 2 2.25 2.5 Frequency [GHz] Figure 7.7: IIP2 versus RF interferer frequency Chapter 7. Experimental Results 159 IMD2 and IMD4 @ High Input Levels −5 −10 −15 −20 −25 −30 IMD2 IMD2,IMD4 [dBm] −35 IMD4 −40 −45 −50 −20 −15 −10 −5 0 5 10 Input level [dBm] Figure 7.8: IMD2 and IMD4 at high input levels 7.2.2 IIP2 Tuning Fig. 7.9 shows measurement results of IIP2 tuning. The IIP2 improvement curves correspond to four different operating conditions. The reference plot was obtained at 1.5V, 2GHz effective LO and RF interferers at 2.15GHz spaced 100kHz apart. Second curve corresponds to interferers at 1.85GHz. The optimum tuning code was smaller, which could be predicted from Fig. 7.7, where it is shown that initial IIP2 for interferers at 1.85GHz is higher than for interferers at 2.15GHz. The two last IIP2 improvement curves correspond to 1GHz LO frequency and 1.4V voltage supply, respectively. Parameters referring to gain and linearity (in terms of IP3) were not affected by IP2 tuning, as can be seen in Fig. 7.10. However, the implemented IP2 tuning approach had a significant impact on demodulator’s noise performance. Fig. 7.11 shows noise degradation as a function of the IP2 tuner settings. The reported values of Vn,inDSB are spot noise values measured at 100kHz as well as at 1MHz. The larger degradation of noise performance is observed at smaller frequency offset, which indicates that the flicker noise contribution increases at higher tuning code values. Although not verified by simulations, it is likely that the IP2 tuner causes leakage of common mode low-frequency flicker noise to the differential output. Such common mode noise is generated by the input stage of the mixer as well as by the LO chain in the presence of finite output conductance of the input stage. Fig. 7.12 shows residual static DC offset as a function of the tuning code. Nominally, combined IP2-DC offset tuner should not degrade the static DC offset while increasing values of tuning codes. Apparently, biasing of the static DC offset tuner was not well matched to that of the mixer core so that even with a DC compensation loop in the baseband filter, a rather large DC offset exists at the output of the test chip for extreme tuning code values. Fig. 7.13 shows a plot of IIP2 versus frequency offset Δf between interferer tones before and after calibration, which has been performed at 100kHz. A degradation of IIP2 improvement is evident as the frequency offset increases. The observed effect can be attributed to a narrow common mode feedback loop bandwidth, leading to a phase shifted response of the current sources with respect to both common mode and differential mode excitation coming from the mixer core. As the differential response of the IP2 tuner becomes phase shifted compared with the differential distortion generated in the mixer core, perfect cancellation of these components is not possible. Hence, the IIP2 degrades for higher frequency offsets. Using a faster CMFB Chapter 7. Experimental Results 160 IIP2 vs. Tuning Code 90 Reference Plot 85 Different RF Frequency Different LO Frequency 80 Different VDD 75 70 65 IIP2 [dBm] 60 55 50 45 40 −150 −100 −50 0 50 100 150 Tuning Code Figure 7.9: IIP2 improvement curves for various operating conditions Gain and IIP3 vs. Tuning Code 55 50 45 Gain 40 IIP3 35 30 25 Gain [dB], IIP3 [dBm] 20 15 10 −150 −100 −50 0 50 100 150 Tuning Code Figure 7.10: Impact of IP2 tuner on mixer gain and IIP3 Chapter 7. Experimental Results 161 DSB Noise Voltage Density vs. Tuning Code 6 5.5 5 4.5 @ 100kHz offset @ 1MHz offset 4 DSB Noise Voltage [nV/sqrt(Hz)] 3.5 3 −150 −100 −50 0 50 100 150 Tuning Code Figure 7.11: Impact of IP2 tuner on mixer noise DC Offset vs. Tuning Code 30 20 10 0 −10 DC Offset [mV] −20 −30 −40 −150 −100 −50 0 50 100 150 Tuning Code Figure 7.12: Impact of IP2 tuner on output DC offset Chapter 7. Experimental Results 162 IIP2 vs. Offset Frequency 90 Before Calibration 80 After Calibration 70 60 IIP2 [dBm] 50 40 30 1 2 3 4 5 6 7 8 9 10 5 Frequency [Hz] x 10 Figure 7.13: IIP2 versus frequency offset between interferer tones (a) Before calibration (b) After calibration Figure 7.14: Distortion spectrum before and after off-line calibration loop (having wider bandwidth) could solve the problem. To achieve this, smaller PMOS current source transistors have to be used. However, this is in conflict with noise considerations, espe- cially because of flicker noise generated by the current sources. To break the trade-off, a mixer topology shown in Fig. 4.7 with an IP2 tuner merged with current sources in the input stage could be employed. 7.2.3 IIP2 Auto-calibration The IQ downconverter was tested in two auto-calibration modes: offline and online. Fig. 7.14 shows IMD2 tones before and after offline calibration carried out by supplying a strong continuous wave interferer at 2.15GHz, which was AM modulated on-chip. An improvement of 15dB is visible, rasing the IIP2 from 55dBm to 70dBm. Compared with results of manual calibration, improvement of the offline auto-calibration procedure is rather poor. It could be perhaps increased by using smaller LMS algorithm step sizes. Chapter 7. Experimental Results 163 (a) Before calibration (b) During calibration Figure 7.15: Signal constellation before and during online calibration Figure 7.16: Transient behavior of the adaptation algorithm In the online calibration mode, AM modulated out-of-band interferers were supplied to the input of the IQ downconverter, along with a weak in-band sine signal. Fig. 7.15 compares ’constellations’ of the downconverted sine signal before calibration and during online calibration. A square wave AM modulated interferer was used in this particular example. The square wave envelope distortion results in two distinct constellation origin offset states visible in Fig. 7.15a. After adaptation (i.e. in the steady state), the dynamic constellation offsets are greatly suppressed. The transient behavior of the distortion cancellation system is illustrated in Fig. 7.16. Since the algorithm step size was fixed in the hardware demonstrator, the only way to clearly visualize the distortion removal feature of the adaptive system was to use a signal with a frequency comparable with the time constant of the algorithm. In the experiment, a signal having 10kHz frequency was used. Baseband attenuation at 10kHz due to DC offset compensation loop was not yet problematic (see Fig. 7.4). The plots show that one of the quadrature branches of the downconverter generated more initial second-order distortion than another. Both plots demonstrate reduction of distortion in time, leaving the in-band signal intact. Chapter 7. Experimental Results 164 Figure 7.17: Undesired transients during adaptation Measurements revealed also some imperfections of the calibration system which have to be addressed in order to improve its performance. Fig. 7.17 shows undesired transients - responses of the baseband filter to the input step signals which occur whenever the IP2 tuner changes its settings. Such transients effectively increase the output noise floor of the downconverter, questioning the sensitivity improvement offered by the whole system. Step signals can be reduced by using layout techniques improving device matching applied to both IP2 and DC tuners (in the hardware demonstrator, both tuners are separated by several tens of microns and therefore do not match well). Additionally, adaptive adjustment of the reference current source of the DC tuner may improve performance but at the expense of increased complexity of the whole system. Alternatively, algorithm step size can be decreased in the steady state so that the transient responses are generated only sporadically. As a last resort, IP2 tuner settings may be updated when no desired signal is received but this method is suitable only for systems having non-continuous reception. References [1] “8 Hints for Making Better Measurements Using Analog RF Signal Generators,” Application Note AN 1306-1, Agilent Technologies. [2] “Multiport and Balanced Device Measurement: Concepts in Balanced Device Measure- ments,” Application Note AN 1373-2, Agilent Technologies. [3] “Spectrum Analysis Basics,” Application Note AN 150, Agilent Technologies. [4] “Optimizing RF and Microwave Spectrum Analyzer Dynamic Range,” Application Note AN 1315, Agilent Technologies. [5] “8 Hints for Making Better Spectrum Analyzer Measurements,” Application Note AN 1286- 1, Agilent Technologies. [6] “Fundamentals of RF and Microwave Noise Figure Measurements,” Application Note AN 57-1, Agilent Technologies. [7] “Measuring Noise Figure with a Spectrum Analyzer,” Application Note AN 1439, Agilent Technologies. 165 Chapter 8 Conclusions 8.1 Summary and Final Remarks In the dissertation, various aspects of second-order intermodulation distortion in wireless receivers were investigated. Firstly, the widespread existence of AM interference in wireless communication systems was pointed out. Secondly, the importance of second-order nonlinearities both in modern zero-IF receivers as well as in traditional heterodyne architectures was stressed. Next, a compact second-order distortion characterization approach suitable for predicting low- frequency interference in direct conversion receivers induced by arbitrarily AM modulated signals was proposed. Additionally, it has been shown that IP2 requirements in common cellular systems are tough, especially in transceivers with decreased RF selectivity. An in-depth study of second-order intermodulation distortion in RFIC downconversion mix- ers was carried out using both behavioral and circuit level modeling techniques. The research revealed new insights into second-order distortion generation mechanisms. A phenomenon asso- ciated with coupling of the LO signal to the RF port combined with third order nonlinearities of the mixer was characterized, showing that differential IMD2 distortion may exist at the mixer output even in the case of perfect device matching. Dependence of IMD2 on RF interferer fre- quency was analyzed analytically and sources of effective switching stage mismatch asymmetry in case of interferers below and above LO frequency were identified. The issues associated with output stage mismatches in current mode output mixers were also examined. In the second part of the dissertation, an overview of various second-order distortion cancel- lation methods was given. Insufficiency of layout and circuit techniques for IMD2 suppression was indicated. Advantages of IP2 calibration over compensation of distortion were emphasized. Two novel IP2 calibration circuits, suitable for low-voltage mixers, were designed. The experi- mentally verified functionality of the tuners validates the theoretical mixer mismatch analysis, which preceded the circuit design stage. Next, methods of automatic cancellation of second order distortion were reviewed. Advan- tages of utilizing adaptive signal processing techniques were shown. First, the ability to detect distortion hidden in noise allows to suppress second-order distortion well below the noise floor, which is required for fulfilling tough sensitivity requirements in many applications. Second, adaptive techniques enable performing cancellation of second-order distortion while receiving the desired signal. A concept of such background adaptive IP2 auto-calibration based on cor- relation of common mode and differential mode output signals of the mixer was presented. A corresponding hardware demonstrator has been designed, implemented and measured. The auto-calibration feature was successfully verified, indicating the feasibility of the digital adaptive IP2 calibration. Chapter 8. Conclusions 167 8.2 Recommendations for Future Work In the course of research, some interesting areas of possible future study have been identified. Although IMD2 generation mechanisms have been thoroughly investigated, the performed anal- ysis is by no means complete. Further research may include estimating the relative contribution of the low-noise amplifier odd order nonlinearities to the LO coupling-based IMD2 generation mechanisms, studying the impact of ground and power supply bounce on self-mixing as well as exploration of the impact of gate leakage current mismatches in ultra-deep submicron CMOS technologies on second order distortion. Additional studies of effective switching pair mismatch relation to RF interferer frequency, including methods of reducing such dependence, are also of interest in order to maintain immunity of wireless transceivers to multiple AM interferers widely spaced in the frequency domain. Further research opportunities exist also in the area of IMD2 cancellation methods. The adaptive IP2 auto-calibration system presented in this thesis can be improved in many ways. Enhancements can be introduced both in the analog and in the digital section. For example, baseband transient signals occurring during IP2 tuner updates should be better suppressed. The usefulness of an additional adaptive tuning loop which minimizes an appropriately defined cost function and adjusts the biasing current of the static DC offset tuner can be checked. In many practical applications, time allowed for calibration is limited. Therefore, a study of faster cali- bration algorithms should be carried out. Non-sign-only LMS algorithms need to be investigated in the first place. Such algorithms may also improve distortion detection capabilities, which is requisite for successful online IP2 calibration in applications requiring very high SNR values. The IMD2 dependence on offset between interferer tones, which has been analyzed in simu- lations and observed during measurements, needs to be addressed if the auto-calibration system is planned to be used in wideband receivers. One possible technique to be verified is adap- tive adjustment of output filter pole frequency by tuning output stage capacitances. Research work may include investigation of detection techniques of the mixer output filter pole frequency mismatch as well as design of pole frequency tuning circuits. Finally, the detection of common mode distortion used in the background calibration scheme proposed in this work opens up possibilities of simultaneous cancellation of cross-modulation distortion. Since the low-frequency common mode signal is dominated by a scaled version of the squared envelope of the RF input signal, it can be multiplied by the low-frequency differential output signal of the receiver, adaptively scaled to produce an estimate of cross-modulation distortion and subtracted from the output signal, improving the overall receiver sensitivity. Appendix A Miscellaneous Calculations A.1 Fourier series of some periodic functions Fourier series expansion of bipolar square wave Bipolar square wave sqw(t): ⎧ ⎪ T ⎨ −1, for − LO TLO TLO 2 0 2 −jkωLOt −jkωLOt −jkωLOt ck = fLO sqw(t)e dt = −fLO e dt + fLO e dt − TLO − TLO 2 2 0 TLO 0 2 1 −jkωLOt 1 −jkωLOt = fLO e −fLO e jkωLO − TLO jkωLO 2 0 f f f f = LO − LO ejkπ + − LO e−jkπ + LO ⎧jkωLO jkωLO ⎧ jkωLO jkωLO ⎨ 0, forkeven ⎨ 0, forkeven = 4f = 2 (A.3) ⎩ LO , for k odd ⎩ , for k odd jkωLO jkπ Closed form expression: ∞ + 2 sqw(t)= ej(2k+1)ωLOt (A.4) j(2k +1)π k=−∞ Appendix A. Miscellaneous Calculations 169 Fourier series expansion of unipolar pulse sequence Unipolar pulse sequence pulse(t): T 2, for −T TLO 4 TON −j2kωLOt −j2kωLOt ck =2fLO pulse(t)e dt =4fLO e dt TLO − −TON 4 TON − Voff − Voff 4fLO −j2kωLOt 1 jk A jk A = e = e LO − e LO j2kω jkπ LO −TON V V off − off Voff jk A jk A sin k 2 e LO − e LO 2 ALO = = (A.7) kπ 2j π k Closed form expression: +∞ sin k Voff 2 ALO pulse(t)= ej2kωLOt (A.8) π k k=−∞ Fourier series expansion of rectified sinusoid Rectified sinusoid rct sin(t): rct sin(t)= sin(ωLOt) (A.9) Fourier series: +∞ jkωLOt rct sin(t)= cke (A.10) k=−∞ where TLO 2 −jkωLOt ck = fLO rct sin(t)e dt − TLO 2 TLO 0 2 −jkωLOt −jkωLOt = fLO − sin(ωLOt) e dt + fLO sin(ωLOt) e dt (A.11) − TLO 2 0 Noting that: ejωLOt − e−jωLOt sin(ω t)= , (A.12) LO 2j ck can be written as: − 0 0 fLO j(1−k)ωLOt fLO j(k+1)ωLOt ck = e dt + e dt 2j − TLO 2j −TLO 2 2 TLO TLO f 2 f 2 + LO ej(1−k)ωLOtdt − LO ej(k+1)ωLOtdt (A.13) 2j 0 2j 0 Appendix A. Miscellaneous Calculations 170 For k = ±1, ck =0. For k = ±1, above integrals have the following values: 0 1 0 ej(1−k)ωLOtdt = ej(1−k)ωLOt T − LO j(1 − k)ωLO − TLO 2 ⎧ 2 ⎨ 1 1 0, for k odd = − e−j(1−k)π = 2 (A.14) j(1 − k)ωLO j(1 − k)ωLO ⎩ , for k even j(1 − k)ωLO 0 −1 0 ej(k+1)ωLOtdt = e−j(k+1)ωLOt −T LO j(k +1)ωLO − TLO 2 ⎧ 2 ⎨ −1 1 0, for k odd = + ej(k+1)π = −2 (A.15) j(k +1)ωLO j(k +1)ωLO ⎩ , forkeven j(k +1)ωLO T TLO LO 2 2 j(1−k)ωLOt 1 j(1−k)ωLOt e dt = − e 0 j(1 k)ωLO ⎧ 0 ⎨ 1 1 0, for k odd = ej(1−k)π − = −2 (A.16) j(1 − k)ωLO j(1 − k)ωLO ⎩ , forkeven j(1 − k)ωLO T TLO LO 2 − 2 j(k+1)ωLOt 1 −j(k+1)ωLOt e dt = e 0 j(k +1)ωLO ⎧ 0 ⎨ −1 1 0, for k odd = e−j(k+1)π + = 2 (A.17) j(k +1)ωLO j(k +1)ωLO ⎩ , for k even j(k +1)ωLO Finally: ⎧ ⎪ 0, for k odd ⎨⎪ −f 2 f −2 LO + LO ck = 2j j(1 − k)ωLO 2j j(k +1)ωLO ⎪ − ⎩⎪ fLO 2 − fLO 2 + − , forkeven ⎧ 2j j(1 k)ωLO 2j j(k +1)ωLO ⎨ 0, for k odd = ⎩ 1 1 1 1 1 − + + − + , forkeven ⎧ 2π 1 k 1+k 1 k 1+k ⎧ ⎨ 0, for k odd ⎨ 0, for k odd = 1 1 1 = 2 1 (A.18) ⎩ + , forkeven ⎩ , forkeven π 1 − k 1+k π 1 − k2 Closed form expression: ∞ 2 + ej2kωLOt rct sin(t)= (A.19) π 1 − 4k2 k=−∞ Appendix A. Miscellaneous Calculations 171 A.2 Some infinite sums ∞ + 1 = 0 (A.20) 1 − 4k2 k=−∞ Proof: ∞ ∞ ∞ + 1 + 0.5 0.5 + 0.5 0.5 = + =1+2 + 1 − 4k2 1 − 2k 1+2k 1 − 2k 1+2k k=−∞ k=−∞ k=1 ∞ + 1 1 1 1 1 1 1 =1+ + =1+ − 1+ − + − + ... =1− 1 = 0 (A.21) 2k +1 2k − 1 3 5 3 7 5 k=1 ∞ + 1 π2 = (A.22) (2k +1)2 4 k=−∞ Proof: Fourier series expansion of f(x)=|x| function on [−π, π]: +∞ jkx |x| = cke (A.23) k=−∞ where π 1 −jkx ck = |x|e dx (A.24) 2π −π For k =0,c0 = π/2. For k =0, c is calculated as k − 0 π 1 −jkx 1 −jkx ck = xe dx + xe dx (A.25) 2π −π 2π 0 −jkx −jkx −jkx −jkx −jkx xe e 1 −jkx e e xe dx = −jkx = −x + e dx = −x + (A.26) −e 2 1 jk jk jk jk k Thus −1 1 (−1)k (−1)k 1 (−1)k (−1)k 1 c = − − π + − π − k 2π k2 k2 jk 2π k2 jk k2 (−1)k 1 0, forkeven = − = −2 (A.27) πk2 πk2 , for k odd πk2 Closed form expression: ∞ π + −2 |x| = + ejkx (A.28) 2 π(2k +1)2 k=−∞ For x =0 ∞ ∞ π + −2 + 1 π2 + =0=⇒ = (A.29) 2 π(2k +1)2 (2k +1)2 4 k=−∞ k=−∞ Appendix A. Miscellaneous Calculations 172 A.3 Mixer core transfer functions Derivation of input stage transfer functions Below, effective first and second order transconductances of the single-balanced mixer input stage consisting of a transistor degenerated with an admittance Y (ω) are derived. vg and vs denote the gate and source voltages while gm and g2 are the intrinsic transconductances of the MOS transistor. H1(ω) - first order gate voltage to source voltage transfer function. Auxiliary calculations: gm(vg − vs)=vsY (ω) ⇐⇒ gmvg = vs gm + Y (ω) It follows that gm H1(ω)= (A.30) gm + Y (ω) H11(ω, ω) - second order gate voltage square to source voltage transfer function. Auxiliary calculations: − − 2 ◦ ⇐⇒ gm(v g vs)+g2 (vg vs) = vs Y (ω) ◦ − − 2 ⇒ vs gm + Y (ω) g2(vg vs) = gmvg = v g + Y (ω + ω ) s,(ω 1+ω2) m 1 2 j(ω1+ω2)t −g2 2 − 2H1(ω1) − 2H1(ω2)+2H1(ω1)H1(ω2) e =0 It follows that 2g2 1 − H1(ω1) − H1(ω2)+H1(ω1)H1(ω2) H11(ω1,ω2)= (A.31) gm + Y (ω1 + ω2) G1(ω) - first order transconductance gm G1(ω)=H1(ω)Y (ω)= (A.32) gm + Y (ω) G11(ω, ω) - second order transconductance G11 (ω1,ω2)=H11(ω1,ω2)Y (ω1 + ω2)= 2g2 1 − H1(ω1) − H1(ω2)+H1(ω1)H1(ω2) × Y (ω1 + ω2) (A.33) gm + Y (ω1 + ω2) Appendix A. Miscellaneous Calculations 173 Derivation of switching stage transfer functions Below, linear and nonlinear transfer functions used in the analysis of the mixer switching pair are derived. vg and vs denote the gate and source voltages while gm, g2 and g3 are the intrinsic transconductances of the switching transistor. Y (ω) is an admittance loading the common source node of the switching pair. H1(ω) - first order gate voltage to source voltage transfer function. Auxiliary calculations: gm(vg − vs)=vsY (ω)+iin and iin =0=⇒ gmvg = vs gm + Y (ω) It follows that gm H1(ω)= (A.34) gm + Y (ω) G1(ω) - first order input current to source voltage transfer function. Auxiliary calculations: gm(vg − vs)=vsY (ω)+iin and vg =0=⇒−iin = vs gm + Y (ω) It follows that 1 G1(ω)=− (A.35) gm + Y (ω) G11(ω, ω) - second order input current square to source voltage transfer function. Auxiliary calculations: − − 2 ◦ gm(vg vs)+g2(vg v s) = vs Y (ω)+iin,1 + iin,2 v =0=⇒ g v2 − v ◦ g + Y (ω) = i + i =⇒ g 2 s s m in,1 in,2 j(ω1+ω2)t − 2g2G1(ω1)G1(ω2)e vs,(ω1+ω2) gm + Y (ω1 + ω2) = 0 (A.36) It follows that G11(ω1,ω2)=−2g2G1(ω1)G1(ω2)G1(ω1 + ω2) (A.37) F11(ω, ω) - second order gate voltage and input current product to source voltage transfer function. Auxiliary calculations: − − 2 ◦ ⇐⇒ gm(v g vs)+g2 (vg vs) = vs Y (ω)+iin v ◦ g + Y (ω) − g (v − v )2 = g v − i =⇒ s m 2 g s m g in − j(ω1+ω2)t vs,(ω1+ω2) gm + Y (ω1 + ω2) + g2 2G1(ω2) 2H1(ω1)G1(ω2) e =0 (A.38) It follows that F11(ω1,ω2)=2g2 1 − H1(ω1) G1(ω2)G1(ω1 + ω2) (A.39) Appendix A. Miscellaneous Calculations 174 F111(ω, ω, ω) - third order gate voltage and input current square product to source voltage transfer function. Auxiliary calculations: − − 2 − 3 ◦ ⇐⇒ gm(v g vs)+g2 (vg vs) + g3(vg vs) = vs Y (ω)+iin,1 + iin,2 2 3 vs ◦ gm + Y (ω) − g2(vg − vs) − g3(vg − vs) = gmvg − iin,1 − iin,2 =⇒ − − vs,(ω1+ω2+ω3) gm + Y (ω1 + ω2 + ω3) g2 2G11(ω2,ω3)+2F11(ω1,ω2)G1(ω3) +2F11(ω1,ω3)G1(ω2)+2H1(ω1)G11(ω2,ω3) + g3 6G1(ω2)G1(ω3) j(ω1+ω2+ω3)t −6H1(ω1)G1(ω2)G1(ω3) e = 0 (A.40) It follows that F111(ω1,ω2,ω3)=− 2g2 G11(ω2,ω3) H1(ω1) − 1 + F11(ω1,ω2)G1(ω3)+F11(ω1,ω3)G1(ω2) +6g3G1(ω2)G1(ω3) 1 − H1(ω1) G1(ω1 + ω2 + ω3) (A.41) G111(ω, ω, ω) - third order input current cube to source voltage transfer function. Auxiliary calculations: − − 2 − 3 ◦ gm(vg vs)+g2(vg v s) + g3(vg vs) = vs Y (ω)+iin,1 + iin,2 + iin,3 ⇒ 2 − ◦ − 3 ⇒ vg =0= g2vs vs gm + Y (ω) g3vs = iin,1 + iin,2 + iin,3 = g2 2G1(ω1)G11(ω2,ω3)+2G1(ω2)G11(ω1,ω3)+2G1(ω3)G11(ω1,ω2) − j(ω1+ω2+ω3)t − 6g3G1(ω1)G1(ω2)G1(ω3) e vs,(ω1+ω2+ω3) gm + Y (ω1 + ω2 + ω3) =0 (A.42) It follows that G111(ω1,ω2,ω3)=− 2g2 G1(ω1)G11(ω2,ω3)+G1(ω2)G11(ω1,ω3)+G1(ω3)G11(ω1,ω2) − 6g3G1(ω1)G1(ω2)G1(ω3) G1(ω1 + ω2 + ω3) (A.43) Appendix B Mismatch Modeling In every integrated circuit process, two kinds of variations in physical quantities of fabricated devices have to be considered. Global variation accounts for the variation in the value of a device model parameter on wafer-to-wafer or batch-to-batch basis. Local variation, also called mismatch, reflects the variation in a model parameter with reference to a model parameter value of an adjacent device on the same chip. In this appendix, transistor mismatch modeling methodology for CMOS technologies is outlined. One of the first published works devoted to this topic is [1]. For the MOS transistor operating in the saturation region, whose drain current is given by β 2 I = V − V , (B.1) d 2 GS TH where β is the current factor (sometimes called the conductance constant) and VTH is the threshold voltage, the paper introduced an expression for the variance in the drain current: σ2 σ2 σ2 σ σ Id = β +4 VTH − 4r β VTH . (B.2) 2 2 − 2 − Id β (VGS VTH) β VGS VTH The parameter r is the correlation coefficient between the mismatches in the conductance con- stant and the threshold voltage (r =cov(β,VTH)/(σβσVTH )). Analyzing (B.2) it can be seen that the drain current mismatch depends on device operating point and that it can be estimated if standard deviations σβ and σVTH as well as the correlation coefficient r are known. Experimentally, standard deviations of β and VTH can be estimated from Δβi and ΔVTHi differences in the values of β and VTH extracted from measurements of the i-th matched pair of devices ⎧ ⎡ ( ) ⎤⎫ ⎨ 2 ⎬1/2 1 N 1 N σ = ⎣ ΔX2 − ΔX ⎦ , (B.3) ΔX ⎩N − 1 i N i ⎭ i=1 i=1 where N is the number of matched pairs measured on each wafer. N −1 term in the denominator of the first fraction in (B.3) is used so that the standard deviation estimator is unbiased. The second term in (B.3) is usually close to zero if the measured devices are laid out in such a way as to minimize systematic mismatch. Based on an estimated value of the standard deviation of the difference between matched pair parameter values ΔX, the standard deviation of the parameter X itself can be found from the following relationship √ σΔX = 2σX. (B.4) Appendix B. Mismatch Modeling 176 In [1], various factors causing drain current mismatch have been highlighted. Below, con- tributions of the threshold voltage and the current factor to the overall mismatch are briefly summarized. The threshold voltage of a transistor may be expressed as QB Qf qDI VTH = φMS +2φB + − + (B.5) Cox Cox Cox where φMS is the gate-semiconductor work function difference, φB is the Fermi potential in the bulk, QB is the depletion charge density, Qf is the fixed oxide charge density, DI is the threshold adjust implant dose whereas Cox is the gate oxide capacitance per unit area equal to eox/tox (tox denotes the oxide thickness). Variations in the values of VTH are a direct result of a random nature of various terms on the right hand-side of (B.5). An in-depth analysis carried out in [1] has shown that the variance of the threshold voltage may be written in a compact form as A2 σ2 = VTH (B.6) VTH WL where W and L denote nominal widths and lengths of the MOS transistor while AVTH is the matching coefficient. It has been shown that its value is inversely proportional to Cox and thus directly proportional to the gate oxide thickness tox. The non-uniform distribution of the dopant atoms in the bulk was identified to be the major contributor to the threshold voltage mismatch, an issue which has been thoroughly investigated in [2], which provides a theoretical characterization of fluctuations in dopant atom density. From the circuit design perspective, an important note to make is that the standard deviation of the threshold voltage mismatch is inversely proportional to the square root of the channel area. Thus, mismatch can be decreased by using large gate area transistors. However, this usually means increased power consumption at a given speed, because larger capacitances have to be charged. The current factor β is given by μC W β = ox (B.7) L where μ is the channel mobility. Since the factors on the right-hand side of (B.7) are all independent, the following expression holds: σ2 2 2 2 2 β σL σW σμ σCox 2 = 2 + 2 + 2 + 2 (B.8) β L W μ Cox where σL denotes the standard deviation of the transistor gate length, σW - the standard devi- ation of the transistor gate width, σμ - the standard deviation of the channel mobility and σCox the standard deviation of Cox. 2 2 2 2 Since both σμ/μ and σCox /Cox were reported to be inversely proportional to the gate area [1], equation (B.8) can be rewritten as: σ2 σ2 σ2 A2 + A2 β = L + W + μ Cox (B.9) β2 L2 W 2 WL where Aμ and ACox are process-related constants. As in the case of threshold voltage mismatch, it can be seen that variations in the current factor can be decreased by increasing the transistor gate width and length. Although both β and VTH depend on the gate oxide capacitance per unit area Cox, the dependence between mismatches in β and VTH was found experimentally to be small. Hence, Appendix B. Mismatch Modeling 177 the correlation coefficient r can be assumed to be nearly equal to zero and the expression for the variance in the drain current can be simplified to σ2 σ2 σ2 Id = β +4 VTH (B.10) 2 2 − 2 Id β (VGS VTH) From the above equation it can be concluded that the relative contribution of the β mismatches increases as the overdrive voltage (VGS − VTH) increases. The analysis performed so far assumed that VGS voltage is equal for transistors, whose relative drain current mismatch is characterized. From the circuit design viewpoint, such as- sumption holds among others for current mirrors. In some circuit applications, however, it may be necessary to consider gate-source voltage variations caused by β and VTH variations. For a given transistor pair, the relative differential drain current can be written as ΔId 2 Δβ = ΔVGS − ΔVTH + (B.11) Id VGS − VTH β The constraint in some circuits, including switching differential pairs used in mixers, is ΔId =0. Assuming no current factor mismatches, the resulting gate-source voltage mismatch must equal the threshold voltage mismatch: ΔId =0&Δβ =0=⇒ ΔVGS =ΔVTH (B.12) Considering no threshold voltage mismatches (ΔVTH = 0), the resulting VGS mismatch is given by 2 Δβ VGS − VTH Δβ Id Δβ ΔVGS = − =⇒ ΔVGS = − = − (B.13) VGS − VTH β 2 β gm β where gm = β(VGS − VTH) is the transconductance of the reference MOS transistor. Unlike in case of the threshold voltage mismatch, the gate-source voltage mismatch resulting from the current factor variations depends on the operating (in other words biasing) conditions of the analyzed transistors. In this dissertation, mismatches in switching differential pairs were studied thoroughly. A mismatched switching pair model used in Chapter 4 comprised two ideally matched devices and one DC offset voltage source attached to one of the transistors. The offset voltage Voff can be associated with the gate-source voltage mismatch ΔVGS. The standard deviation of the offset voltage is therefore given by 2 2 2 Id σβ σVoff = σVTH + (B.14) gm β Matching properties of MOS transistors were studied further in many other papers. In [3], another source of mismatch associated with the variation of the substrate factor was introduced. Additionally, the effects of device spacing on parameter variation were investigated. The pro- posed improved MOS transistor parameter variance model, called the Pelgrom model, contained a term accounting for long-distance variations. For a device parameter P , which depends only on one dimension, its variance is given by: A2 σ2 = P + S2 D2 (B.15) P K P In the above equation, AP is the size proportionality constant for the parameter P , K denotes the device size, while SP relates the variance to the distance D between two devices for which the parameter P is evaluated. Appendix B. Mismatch Modeling 178 Leff Weff Figure B.1: Gate width and length variations In case of two-dimensional device parameters, the following expression for the parameter variance can be written: A2 σ2 = P + S2 D2 (B.16) P WL P Here, AP is the area proportionality constant while W and L are width and length of the device, respectively. Notice that in both cases long-distance parameter variation is independent of device dimensions. Examples of parameters with one dimensional dependence are gate width W and length L of the MOS transistor. The variance of each of these parameters can be assumed to be inversely proportional to the other parameter value, i.e. σ2(L) ∝ 1/W and σ2(W ) ∝ 1/L. Physically, gate dimension variations result from photoresist/polysilicon/metal edge roughness, as shown in Fig. B.1. Such variations decrease as the device size increases since the parameters average over a greater distance. Parameters depending on two dimensions are for instance channel dopant concentration, charge carrier mobility, gate oxide thickness and sheet resistance. Since the threshold voltage VTH depends on channel dopant concentration, it is a parameter possessing area dependency, as already noticed in [1]. By including the dependence on distance D, its variance can be written as: A2 σ2 = VTH + S2 D2 (B.17) VTH WL VTH Since the current factor β depends on both one-dimension-dependent physical parameters and area-dependent physical parameters, its overall spatial dependency is more complex than VTH spatial dependency. By taking into account gate width and length variance spatial relations, equation (B.8) can be rewritten as: σ2 A2 A2 A2 + A2 β = L + W + μ Cox + S2D2 (B.18) β2 WL2 W 2L WL β where AL, AW, Aμ, ACox and Sβ are process-related constants. The Pelgrom model includes the impact of long-distance variations as an additional term in the variance (or equivalently standard deviation) of a given device model parameter. In other Appendix B. Mismatch Modeling 179 M1 M2 M1 M2 M1 M2 M1 (a) Interdigitation pattern (b) Cross-coupling pattern Figure B.2: Layout patterns reducing long-distance process variations words, long-distance mismatch is treated as an additional fully stochastic process, although such class of mismatch contains in fact a deterministic component, originating for example from non-uniform thermal distribution during a fabrication process or lens abberation during a photolithographic process. A justification of treating it as a random effect only was that the original placement of dies on a wafer is unknown after packaging [3]. However, if location of dies is known - for example in case of on-wafer measurements - then the Pelgrom’s model doesn’t express the long-distance variation precisely. In [4], an attempt has been made to model long- distance parameter variations, also referred to as systematic variability. The presented empirical model characterizes systematic parameter variability with the following equation P (r)=Ar2 + Br cos α + C (B.19) where r denotes the distance from the center of a wafer whereas parameters A, B, C and α characterize the systematic variation of a single wafer. The inter-wafer variation can be modelled with the statistics of the parameters A, B, C and α, the last one being a uniformly distributed random number from 0 to 2π. The existence and nature of long-distance variations justifies the usage of various layout matching improvement methods. The basic layout technique is to increase the size of devices. However, as their dimensions become larger, long-distance variations start to play an important role. In order to decrease such spacing-related process variations, devices forming nominally matched pairs are broken up into smaller units connected in parallel and placed among the pieces belonging to the other device of the pair. Two most widely used layout patterns are the interdigitation pattern and the cross-coupled pattern, explained graphically in Fig. B.2. Interdigitation allows to reduce process variations along one dimension only. If size of devices forming the pair is too large for the interdigitated pattern to be implemented for a given floor- plan, then the cross-coupled pattern allows to save area while reducing process gradients along two dimensions. The disadvantage is a more complicated routing and corresponding larger parasitics. Although the analysis presented so far reveals the primary causes of device mismatch, the resultant equations describing parameter variances are not directly applicable for circuit simu- lations. In [5], statistical modeling of device mismatch including long-distance variations and at the same time suitable for circuit simulation has been proposed. By using advanced statisti- cal methods including σ-space analysis and principal component analysis, transformations from sets of independent unit normal random variables to device model parameter sets have been de- rived. The transformations preserve the inherent correlations between model parameters while accounting for the dependence of parameter variance on device separation distance and device area. Appendix B. Mismatch Modeling 180 In [6], a common approach to MOSFET drain current mismatch modeling, based on VTH and β variations, has been questioned. The need for modeling based on physical process parameters has been stressed and a mismatch model based on the propagation of variance relationships between physical process parameters and electrical parameters has been presented. Nevertheless, traditional modeling approach is still popular since the mismatch modeling based on physical process parameters is not easily implementable into circuit simulators. As the technologies scale down, complex transistor models are introduced to describe various second-order and short/narrow channel effects. These models can be used for accurate mismatch modeling. For example, papers [7] and [8] present mismatch modeling in submicron MOSFETs based on sophisticated BSIM3 drain-current transistor models. The introduced relationship between the variance of the drain current mismatch and variances of ΔVTH and Δβ is σ2 C2 ΔId β 2 2 2 = 2 σΔβ + CVTHσΔVTH +2CβCVTHγσΔβσΔVTH (B.20) Id β where Cβ and CVTH are derived from the BSIM model and include various second-order effects, while γ denotes the correlation coefficient between Δβ and ΔVTH. The disadvantage of such modeling approach is that complex drain-current models contain many parameters, which makes the mismatch analysis complex as well. In [9], it has been shown that the simple drain-current model can still be used in deep-submicron technologies to describe mismatch satisfactorily. Ultra-deep-submicron CMOS technologies disqualify some of the relationships presented above. For example, the threshold voltage matching coefficient AVTH no longer scales down proportionally with the gate oxide thickness tox but saturates due to the increased variance of tox itself (and thus Cox). For the same reason, correlation between mismatches in β and VTH may no longer be assumed negligible. Additionally, ultra-deep-submicron CMOS technologies introduce a new physical transistor mismatch source, namely gate-leakage current mismatch [10]. Since gate leakage is caused by quantum-mechanical tunneling and depends on the oxide layer thickness and the field strength, it also exhibits spread. Interestingly, gate-leakage mismatch has a different area dependency than conventional mismatch sources [10]. Assuming no correlation between conventional mismatch and gate current mismatch and neglecting mismatch in the current factor β of transistors, which is allowed for practical values of VGS − VTH, the relative drain current variance was found to be σ2 2 2 2 Id √ ς √ξL 2 = + (B.21) Id WL WL where ς refers to conventional mismatch and ξ is related to gate current mismatch. Eqn. (B.21) shows that the classical way to decrease mismatch by spending more area may not work, if the transistor length increases, as is the case with linear scaling of W and L. The reason is that the conventional mismatch contribution always decreases but at the same time the gate- mismatch increases. Thus, there exists a maximum usable transistor area in deep-submicron technologies and the attainable matching is limited. To achieve better performance, active mismatch cancellation techniques are required. References [1] K. R. Lakshmikumar, R. A. Hadaway, and M. A. Copeland, “Characterization and Modeling of Mismatch in MOS Transistors for Precision Analog Design,” IEEE Journal of Solid-State Circuits, vol. 21, pp. 1057–1066, December 1986. [2] P. A. Stolk, F. P. Widdershoven, and D. B. M. Klaassen, “Modeling Statistical Dopant Fluc- tuations in MOS Transistors,” IEEE Transactions on Electron Devices, vol. 45, pp. 1960– 1971, September 1998. [3]M.J.M.Pelgrom,A.C.J.Duinmaijer,andA.P.G.Welbers,“MatchingPropertiesof MOS Transistors,” IEEE Journal of Solid-State Circuits, vol. 24, pp. 1433–1440, October 1989. [4] K. Okada and H. Onodera, “Statistical Modeling of Device Characteristics with Systematic Variability,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E84-A, pp. 529–536, February 2001. [5] C. Michael and M. Ismail, “Statistical Modeling of Device Mismatch for Analog MOS Integrated Circuits,” IEEE Journal of Solid-State Circuits, vol. 27, pp. 154–166, February 1992. [6] P. G. Drennan and C. C. McAndrew, “Understanding MOSFET Mismatch for Analog Design,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 450–456, March 2003. [7] Q. Zhang, J. J. Liou, J. McMacken, J. Thomson, and P. Layman, “Modeling of Mismatch Effect in Submicron MOSFETs Based on BSIM3 Model and Parametric Tests,” IEEE Electron Device Letters, vol. 22, pp. 133–135, March 2001. [8] Q. Zhang, J. J. Liou, J. McMacken, J. Thomson, and P. Layman, “SPICE Modeling and Quick Estimation of MOSFET Mismatch Based on BSIM3 Model and Parametric Tests,” IEEE Journal of Solid-State Circuits, vol. 36, pp. 1592–1595, October 2001. [9] J. A. Croon, M. Rosmeulen, S. Decoutere, W. Sansen, and H. E. Maes, “An Easy-to-Use Mismatch Model for the CMOS Transistor,” IEEE Journal of Solid-State Circuits, vol. 37, pp. 1056–1064, August 2002. [10] A.-J. Annema, B. Nauta, R. v. Langevelde, and H. Tuinhout, “Analog Circuits in Ultra- Deep-Submicron CMOS,” IEEE Journal of Solid-State Circuits, vol. 40, pp. 132–143, Jan- uary 2005. 181 Appendix C RFIC Simulation Circuit simulation is very important part of IC design. Simulators allow to evaluate circuits before they are fabricated, reducing development costs and time. The optimization of circuit performance before production is mandatory, because the possibilities to make changes once the IC is built are limited. Modern circuit simulators use a so-called nodal analysis. Based on the netlist, which pro- vides information about circuit connections and model parameters, a set of ordinary differential equations describing the circuit is constructed: dq v(t) i v(t) + + u(t)=0 and v(0) = v (C.1) dt 0 where v(t) is the vector of node voltages, u(t) is the vector of currents entering the nodes from current sources, q v(t) is the vector of charges on capacitors, i v(t) is the vector of currents entering each node from conductors, while v0 is the vector containing initial condition of the circuit. The set of equations (C.1) represents statements of Kirchhoff’s current law for each node. Using initial conditions and stimulus signals, these equations are solved for the response of the circuit. Traditional circuit simulators support DC analysis, which calculates circuit response to con- stant stimuli; AC analysis, which evaluates a frequency response of the circuit linearized about its DC operating point; and transient analysis, which calculates circuit response to arbitrary sig- nals in the time-domain. In case of radio-frequency integrated circuit simulation, the application of these simulation techniques is often inefficient and sometimes even insufficient [1]. The AC analysis is useful for computing the characteristics of circuits that are expected to respond in a nearly linear fashion to an input signal. However, it cannot capture nonlinear distortion and fre- quency translation effects. The transient simulation can be used in conjunction with the Fourier transform for linearity tests. However, as the simulator computes the solutions for a sequence of time points, the simulation time might be prohibitively long, especially in case of closely spaced high frequency signals, which require using small-time steps and simultaneously performing the analysis for a long time. Furthermore, in many RF circuits long time-constants are problem- atic, because the calculated solutions have to reach a steady-state before the spectrum can be computed. For the above reasons, special-purpose simulation techniques have been developed that ad- dress the needs of RF designers [1], [2]. Below, a brief overview of these methods is given, emphasizing their application domains as well as pointing out their limitations. Appendix C. RFIC Simulation 183 RF Analyses Harmonic Balance Harmonic balance (HB) method is a frequency-domain technique for periodic and quasi-periodic steady-state analysis of nonlinear circuits. It is used to analyze RF problems that are most naturally handled in the frequency domain, like computation of distortion components and transfer characteristics of amplifiers, mixers and oscillators. In the HB analysis, voltage, current and charge signals are represented with a generalized truncated Fourier series ⎡ ⎤ K1 K2 Kn ⎣ ··· j2π(k1f1+k2f2+...+knfn)t⎦ x(t)= e Xk1,k2,...,kn e (C.2) k1=1 k2=1 kn=1 where n is the number of fundamental frequencies fi, while Ki is the number of harmonics of each fundamental frequency. With the Fourier coefficients Xk1,k2,...,kn , the nodal equations are formulated in the fre- quency domain, transforming the system of time-domain nonlinear differential equations into a system of nonlinear algebraic equations. The currents flowing from nodes into linear elements are calculated using straightforward frequency-domain linear analysis. Nonlinear components are evaluated in the time domain by transforming relevant node voltage spectra into the time domain using the generalized inverse Fourier transform, calculating the corresponding charges and currents and converting them back into the frequency domain using the generalized Fourier transform. The system of nonlinear algebraic equations is solved using the iterative Newton’s method, defined by the following equation: V(k+1) = V(k) − J−1 V(k) f V(k) (C.3) where V is the vector containing Fourier coefficients of node voltages, f is the vector of nodal expressions and J[V is the Jacobian of the vector f at V. The Jacobian represents the linearized circuit and is defined as d J (V)= f (V) (C.4) dV As k increases, V(k) asymptotically approaches the solution V∗, for which f (V∗)=0. As can be seen from (C.3), the Newton’s method requires computation of the inverse matrix of the Jacobian. For small circuits, direct matrix factoring methods such as Gaussian elimination allow to solve the inverse matrix problem efficiently. For large circuits and circuits excited with a large number of tones, Krylov subspace iterative methods can be applied to accelerate the computation of the inverse matrix. Since the Krylov method does not require explicit storage of the Jacobian matrix, it offers substantial memory usage savings for large circuit problems. In order to apply the harmonic balance method to autonomous circuits like oscillators, it is necessary to add the oscillation frequency to the list of unknowns and a further equation that constrains the phase of the computed solution. The primary advantage of the HB method over transient analysis is that it provides directly a steady state solution. The complexity and cost of the solution does not increase just because there is a low frequency tone (corresponding to a long period) coexisting with high frequency tones (requiring small time steps). An additional benefit is that frequency-dependent distributed elements are handled without difficulty. The limitation of the HB method is that the excitation signals must be quasi-periodic, i.e. they must be representable as a sum of relatively few discrete tones. Appendix C. RFIC Simulation 184 large signal small signal stimulus and response stimulus and response Nonlinear System Figure C.1: Linear time-varying analysis: Input and output sidebands Shooting Method A shooting method is an iterative procedure based on a standard transient analysis. It assumes that the circuit is driven with a nonconstant T-periodic stimulus. The method finds the T-periodic steady-state solution that satisfies the constraint v(T ) − v(0) = 0. (C.5) Since (C.5) is a nonlinear algebraic problem, it can be solved using the Newton’s method. For that purpose, it is necessary to compute the response of the circuit over one period T as well as the sensitivity of the final state v(T ) with respect to changes in the initial state v(0). The sensitivity is used to determine corrections to the initial state which have to be applied in order to reduce the difference between the initial and final state. Similarly to the harmonic balance method, simulation of autonomous circuits using the shooting method requires the variable T to be treated as an additional unknown that is included in the optimization routine. The main advantage of the shooting method over the harmonic balance technique is its capability of finding solutions even for extremely complex circuits. The main drawback is that the frequencies of the excitation signals (and consequently frequencies of all signals is the circuit) have to be commensurate, i.e. exactly divisible by a single common frequency. However, this limitation can be overcome by using extensions to the basic method, known as quasi-periodic shooting methods [1]. Linear Time-Varying Analyses Linear time-varying analyses are extensions of the tradi- tional small-signal AC analysis to the case in which the circuit is linearized about a periodically or quasi-periodically varying operating point. Computation of such time-varying operating point can be performed by applying large-signal excitation and computing the steady-state response using either HB or the shooting-method. Then, the small-signal excitation is applied to the linearized time-varying circuit and the response in a form of sidebands around all large-signal tones is obtained, as shown in Fig. C.1. Note that the DC tone is treated as a special case of large-signal excitation. For the presented method to be reliable, two assumptions should hold. First, the small- signal excitation should not perturb the time-varying operating point of the circuit. Second, the transfer function from the small-signal excitation to every node in the circuit should be linear. Appendix C. RFIC Simulation 185 frequency t0 t1 t2 t3 t4 t5 time Figure C.2: Envelope analysis simulation flow The linear time-varying analyses provide significant advantages over obtaining the same information from equivalent large-signal analyses. They allow fast computation of transfer functions, taking frequency conversion effects into account. Furthermore, they are capable of performing cyclostationary noise analysis, which is an extremely important feature in RF design. Transient Envelope Analysis Transient-envelope analysis is used to simulate systems ex- cited with signals whose modulation is other than a simple sinusoid or a combination of sinusoids. The analysis is carried out by performing a series of linked large-signal pseudoperiodic analyses, which are (quasi-)periodic analyses modified to account for variations in the envelope over each period of the carrier as a result of modulation. The most widely used transient-envelope method is the Fourier envelope method, in which the Fourier coefficients in (C.2) are assumed to be slowly varying transient waveforms Xk1,k2,...,kn (t), as shown in Fig. C.2. The Fourier envelope algorithm is derived from the harmonic balance simulation engine. The most important modification is the change of the vector of nodal ex- pressions f(V) by taking into account time-varying nature of charge signals’ Fourier coefficients [1]: dQ V(t) f V(t),t = + ΩQ V(t) + I V(t) + U(t) (C.6) dt where Ω is a diagonal matrix with j2πfk on the k-th diagonal and fk is a frequency corresponding to the Fourier coefficient Vk. Discretization methods such as trapezoidal rule or backward difference formulas replace dQ/dt with a finite difference approximation and the resulting system of nonlinear algebraic equations is solved with Newton’s method. The procedure relies on the envelope being essentially constant over the period of the carrier. The transient-envelope simulation can be very efficient in comparison with general-purpose transient analysis if the envelope changes slowly relative to the period of the carrier. This is because the time required for the analysis is roughly equal the time for a single (quasi-)periodic analysis multiplied by the number of time points needed to represent the envelope. Apart from efficient prediction of the circuit response to arbitrarily modulated signals, the transient-envelope analysis is useful in predicting the long-term transient behavior of certain RF circuits. Examples include analyzing turn-on behavior of oscillators, thermal transients in power amplifiers, capturing lock behavior of phase locked loops or analyzing the stability of AGC circuits. Appendix C. RFIC Simulation 186 Simulation Accuracy and Convergence Issues A major issue in any circuit simulation is the ability of a simulator to accurately predict circuit behavior by calculating branch currents and node voltages within certain tolerances. In most circuit simulators, there are basically three parameters that determine simulation accuracy: • the absolute current tolerance (IABSTOL) • the absolute node voltage tolerance (VABSTOL) • the relative tolerance parameter (RELTOL) A default value of the IABSTOL parameter is usually 1pA. This means that when a simulated circuit gets within 1pA of its actual value, the simulator assumes that the current has converged and moves onto the next simulation step (time step in transient analysis or next sweep parameter in swept simulations). In case of the VABSTOL parameter, its default value is usually 1μV. Likewise the absolute current tolerance, the simulator assumes that convergence has been achieved as soon as simulated circuit node voltages differ less than 1μV between consecutive algorithm iterations. RELTOL is the most important parameter for RFIC simulation as it is used to adjust accuracy when simulating large and small electrical values in the same circuit. Typical examples include prediction of blocking behavior (i.e. dependence of small-signal gain on large-signal blocker level) and characterization of intermodulation distortion caused by strong interferers. A default value of RELTOL is usually 0.001. It means that if - for example - the actual node voltage value is 1V, the RELTOL parameter would signify an end to the simulation step when the node voltage was within 1mV of 1V. The default VABSTOL parameter value signifies an end when the node voltage is within 1μV of 1V. Since the simulator chooses the larger tolerance of the two, the RELTOL parameter determines convergence in this particular example. The same convergence rules hold for branch currents. Some circuit simulators allow to set relative tolerances separately for branch currents and node voltages. The required values of the above tolerance parameters depend on a given simulation task. For large-signal waveforms, the absolute accuracy requirements are weaker than for simulation of small-signal waveforms. In case of simulating large signal waveforms present together with small-signal waveforms, the default relative tolerance parameter value should be replaced with a smaller one in order to obtain reliable simulation results. For example, the RELTOL value in the order of 10−6 is necessary for accurate predictions of differential second-order intermodulation distortion in balanced active RFIC downconversion mixers. Tight tolerance requirements together with sophisticated high-frequency models of electrical components may cause simulation algorithms to have difficulty with convergence. Certain circuit simulators offer various convergence aids like: • State-files with initial guesses of circuit node voltages • Initial transient simulations eliminating circuit start-up behavior • Addition of very large resistances (∼1TΩ) to every node of the analyzed circuit • Addition of very small capacitances (∼1aF) to every node of the analyzed circuit Increasing values of tolerance parameters also assists with convergence problems and helps speed up the simulation but at the price of reduced accuracy. This trade-off must be always kept in mind when running circuit simulations. Loosening the tolerance requirements should only be done as a last resort, if other convergence aids fail, and only if the resulting accuracy remains within acceptable limits for a given simulation problem. References [1] K. S. Kundert, “Introduction to RF Simulation and Its Application,” IEEEJournalofSolid- State Circuits, vol. 34, pp. 1298–1319, September 1999. [2] K. Mayaram, D. C. Lee, S. Moinian, D. A. Rich, and J. Roychowdhury, “Computer-Aided Circuit Analysis Tools for RFIC Simulation: Algorithms, Features, and Limitations,” IEEE Transactions on Circuits and Systems II, vol. 47, pp. 274–286, April 2000. 187 Inhaltsverzeichnis 1 Einleitung 1 1.1Motivation...... 1 1.2 Forschungsbeitr¨age...... 2 1.3 Aufbau der Arbeit ...... 3 2 Grundlagen der drahtlosen Kommunikation 4 2.1 Allgemeine Betrachtungen ...... 4 2.2Funkkanal...... 4 2.3Modulations-undMultiplexverfahren...... 5 2.4 Quellen der zeitver¨anderlichen Einh¨ullenden...... 8 3 Funktransceiver 11 3.1 Allgemeine Betrachtungen ...... 11 3.2Transceiverarchitekturen...... 11 3.2.1 Senderarchitekturen...... 11 3.2.2 Empf¨angerarchitekturen...... 13 3.3CharakterisierungderTransceiver...... 16 3.3.1 Rauschen...... 17 3.3.2 Nichtlinearit¨at...... 22 3.4 Verzerrungen gerader Ordnung in Funkempf¨angern...... 29 3.4.1 Zwei-Ton-Charakterisierung...... 30 3.4.2 CharakterisierungmittelskontinuierlicherSpektra...... 30 3.4.3 AnforderungenanIP2inzellularenSystemen...... 34 4Abw¨artsmischer 42 4.1 Allgemeine Betrachtungen ...... 42 4.2Mischerarchitekturen...... 43 4.2.1 Eintakt-undGegentaktmischer...... 44 4.2.2 PassiveundaktiveMischer...... 45 4.3CharakterisierungderMischer...... 49 4.3.1 Mischverst¨arkung...... 50 4.3.2 Rauschen...... 51 4.3.3 Intermodulation...... 57 4.3.4 Fehlerquellen ...... 58 4.4 Ausf¨uhrliche Analyse von St¨orungenzweiterOrdnunginRFICMischer..... 60 4.4.1 Verhaltensmodellierung...... 60 4.4.2 Schaltungsmodellierung ...... 66 4.4.3 Abh¨angigkeitdesIMD2vonBetriebsbedingungen...... 96 4.4.4 StatistischeAnalyse...... 101 5 Methoden zur Unterdr¨uckung von St¨orungen zweiter Ordnung 107 5.1 Allgemeine Betrachtungen ...... 107 5.2 Uberblick¨ uberMethodenzurIMD2-Verminderung...... ¨ 108 5.2.1 Layout...... 108 5.2.2 Schaltungstechnik ...... 109 5.2.4 DynamischeAnpassung...... 114 5.2.4 IMD2-Kompensation...... 116 5.2.5 IP2-Kalibrierung...... 117 5.3 Ausf¨uhrlicheAnalysederIP2-Kalibrierung...... 118 5.3.1 Grundlagen ...... 118 5.3.2 Schaltungen zur Feineinstellung ...... 119 5.4 Automatische Unterdr¨uckung von IMD2-St¨orungen...... 124 5.4.1 Motivation...... 124 5.4.2 Testsignal-basierte Methoden zur IMD2-Unterdr¨uckung...... 125 5.4.3 Adaptive Methoden zur IMD2-Unterdr¨uckung...... 127 6 Hardware-Demonstrator 142 6.1Systemarchitektur...... 142 6.2 Schaltungsentwurf ...... 142 6.2.1 Mischerdesign...... 142 6.2.2 Schaltungen zur Feineinstellung ...... 144 6.2.3 Zus¨atzliche Schaltungen ...... 145 6.2.4 Der digitale Entzerrer ...... 147 6.3LayoutundHerstellung...... 148 6.4Testplatine...... 149 7 Experimentelle Ergebnisse 154 7.1Messplatz...... 154 7.2Meßergebnisse...... 154 7.2.1 Standard-Messungen...... 154 7.2.2 IIP2-Tuning...... 158 7.2.3 IIP2-Selbstkalibrierung...... 160 8 Zusammenfassung 166 8.1ZusammenfassungundSchlußbemerkungen...... 166 8.2 Empfehlungen f¨ur zukunftigte Arbeiten ...... 167 A Verschiedene Berechnungen 168 B Modellierung der Fehlanpassungen 175 C RFIC-Simulation 182 Einleitung Motivation Drahtlose Kommunikation spielt eine immer bedeutendere Rolle im t¨aglichen Leben. Orts- gebundene und mobile drahtlose Systeme erm¨oglichen Menschen und Ger¨aten den kabellosen Informationsaustausch. Das verringert die Infrastrukturkosten f¨ur Kommunikationsnetze und macht die Nutzung von Kommunikationsdiensten bequemer. In gleichem Maße wie drahtlose Kommunikationssysteme popul¨arer werden steigt die Nach- frage nach h¨oheren Datenraten, neuen Dienstleistungen und verbesserter Funktionalit¨at der drahtlosen Ger¨ate. Zus¨atzlich zu elementaren Kommunikationf¨ahigkeiten beinhalten moderne drahtlose Ger¨ate zus¨atzliche Funktionen wie digitale Fotografie, Audio- und Videofunktionen, Radio- und Fernsehempfang sowie verschiedene Software-Anwendungen wie Uhr, Rechner und Organizer. Um aus diesen Technologien erfolgreiche Produkte zu generieren, m¨ussen kritischen Faktoren wie niedrige Kosten, geringer Leistungsverbrauch und kleine Abmessungen der Bl¨ocke, die f¨ur Kommunikationsaufgaben verantwortlich sind, besondere Aufmerksamkeit geschenkt wer- den. Dies gilt im Besonderen f¨ur mobile Ger¨ate. Eine Reaktion auf die Marktentwicklungen ist die wachsende Tendenz, die Zahl der Bauteile eines Transceivers f¨ur drahtlose Ger¨ate immer weiter zu reduzieren. Insbesondere Homodyn- architekturen gewinnen wegen ihren Potenzials f¨ur hohe Integration und einen niedrigen Lei- stungsverbrauch zunehmend an Aufmerksamkeit. Uberdies¨ erm¨oglichen Fortschritte bei den Halbleitertechnologien, vor allem bei den CMOS-Technologien, die Realisierung von System on Chip-Architekturen, die die Kombination von HF-Frontend, Basisband-Signalverarbeitung und Software in einem Chip versprechen. Die wachsende Zahl der drahtlosen Standards erh¨oht zudem das Interesse an Multi-Standard, Multi-Band-Transceivern. Um viele Systeme bedienen zu k¨onnen, m¨ussen moderne funkbasierte Ger¨ate rekonfigurierbar sein. Da die erforderliche Flexibilit¨at im digitalen Teil einfach zu reali- sieren ist, haben sich die Forschungsbem¨uhungen in letzter Zeit darauf konzentriert, die Analog- Digital-Umsetzung weiter in Richtung Antenne zu verschieben und somit mehr Signalverar- beitungsschritte mit digitalen Techniken zu l¨osen. Gleichzeitig erfordert der Multi-Band-Betrieb den Abbau von so vielen HF-Filterstufen wie m¨oglich. Diese Tendenz wird durch den Druck verst¨arkt, die Anzahl der Komponenten und die Gr¨oße der Platine zu reduzieren. Obgleich bedeutende Fortschritte gemacht wurden, bleibt der Analogteil der Flaschenhals des gesamten Transceivers, besonders auf der Empfangenseite. Als Folge der verringerten HF- Selektivit¨at k¨onnen starke Interferenzsignale am Empf¨anger auftreten und den Empfang des gew¨unschten Signals verhindern. Außerdem treten trotz deutlich verringerter analoger Sig- nalverarbeitung immer noch analoge Fehler auf, wie Ungenauigkeit in den Verst¨arkerschritten, Cross-Talk, Nichtlinearit¨aten, die Intermodulations- und Kreuzmodulationsverzerrung erzeugen, DC-Offset und Verst¨arkungs-/Phasen-Quadraturimbalancen, die die Qualit¨at des gew¨unschten Signals verschlechtern. St¨orungen durch Intermodulation zweiter Ordnung (IMD2) spielen in Homodynempf¨angern eine entscheidende Rolle, weil sie in das Basisband des gew¨unschtes Signals fallen, unabh¨angig davon, bei welcher Frequenz der amplitudenmodulierte St¨orer arbeitet. IMD2 ergeben sich aus Schaltungs-Nichtlinearit¨aten in Kombination mit Asymmetrien und den unvermeidbaren Pa- rameterfehlanpassungen durch Schwankungen im Fabrikationsprozess. Aufgrund der zuf¨alligen Natur der Fehlanpassungen, sind auch die St¨orungen zweiter Ordnung zuf¨allig. Deshalb kann eine ausreichende IMD2-Unterdr¨uckung w¨ahrend des Entwurfstadiums nicht garantiert werden. Dennoch darf der Dynamikbereich des Empf¨angers durch St¨orungen zweiter Ordnung nicht vermindert werden, weshalb entsprechend viele Vorschl¨age zur Vermeidung dieses Problems gemacht wurden. Da der Abw¨artsmischer der Hauptverursacher der IMD2 ist, konzentrieren sich die meisten Techniken auf eine Optimierung seines Verhaltens durch bestimmte Korrekturen nach der Fertigung. Allerdings besteht das Problem der Abh¨angigkeit dieser Korrekturen von den Betriebsbedingungen. Die Nutzung von digitaler Signalverarbeitung in den modernen integrierten Empf¨angern erschließt neue M¨oglichkeiten. Der vielversprechenste Ansatz ist die Nutzung der Robustheit von Digitalschaltungen gegen Fehlanpassung, um Imbalanzen im Analogteil zu vermindern und die IMD2-Unterdr¨uckung zu verbessern. Da diese Unterdr¨uckung von St¨orungen automatisch durchgef¨uhrt werden kann, wird die Testzeit in der Produktion reduziert. Die verbesserte Per- formance kann zudemuber ¨ l¨angere Zeitr¨aume erhalten werden. Folglich ist die Erforschung leistungsf¨ahiger Methoden zur Unterdr¨uckung von IMD2-St¨or- ungen mittels analoger Hardware, unterst¨utzt durch die digitale Signalverarbeitung, hochinte- ressant. Themen wie Detektion von St¨orungen und Interaktionen zwischen den Analog- und Digitalteilen des Unterdr¨uckungssystems, sollte Aufmerksamkeit geschenkt werden. Um eine zuverl¨assige Unterdr¨uckungsmethode zu entwickeln, m¨ussen die Mechanismen der Entstehung von IMD2-St¨orungen vollst¨andig verstanden werden. Obgleich in den letzten Jahren enorme Forschungsbem¨uhungen zum Thema IMD2-Analysen angestellt wurden, gibt es noch einige Ph¨anomene, die sich wissenschaftlichen Erkl¨arungen entziehen. Forschungsbeitr¨age Die Forschungsbeitr¨age k¨onnen in 3 Gruppen unterteilt werden: 1) Techniken zur Charak- terisierung von St¨orungen zweiter Ordnung; 2) die Analyse der Mechanismen der Entstehung vonIMD2inAbw¨artsmischern; 3) Methoden zur IMD2-Unterdr¨uckung. Es wird eine Methode zur Charakterisierung von Verzerrungen zweiter Ordnung eingef¨uhrt, die auf dem Quadrat der Einh¨ullenden des Empfangssignals basiert. Die konventionelle Be- schreibung des Intercept-Punkts zweiter Ordnung (IP2), die auf einem Zweiton-Test basiert, wird als Spezialfall der vorgeschlagenen Methode behandelt. Die Unterschiede zwischen St¨orungen, die durch verschiedene digital modulierte Interferenzsignale erzeugt werden, werden mittels kom- plement¨arer kumulativer Verteilungsfunktionen und spektraler Eigenschaften der Einh¨ullenden des Interferenzsignals charakterisiert. Es werden die Erweiterungen in der theoretischen Analyse von Verzerrungen zweiter Ordnung in den Mischern beschrieben. Die verbesserte Modellierung von Fehlanpassungen der Gilbert- Zelle wird dadurch erreicht, indem man ungleiche Fehlanpassungen innerhalb der Differenz- verst¨arker in dem Umschaltblock in Betracht zieht. Außerdem wird der Einfluss von Fehlanpass- ungen der Ausgangsstromquellen der Gleichtaktr¨uckkopplung des Mischers auf differentielle Aus- gangsst¨orungen berechnet. Des Weiteren wird ein zus¨atzlicher neuer Mechanismus zur Erzeug- ung von St¨orungen zweiter Ordnung beschrieben, der durch die Verkopplung der Mischer- eing¨ange - kombiniert mit Nichtlinearit¨aten dritter Ordnung - verursacht wird. Als n¨achstes wird ein indirekter IMD2-Mechanismus beschrieben, der auf der Interaktion des Umschalt- blocks mit den Ausgangsimpedanzen der Transistoren der Eingangsstufe beruht. Ferner werden Erzeugungsmechanismen von IMD2-Verzerrungen durch HF-Interferenzen im Umschaltsblock in Abh¨angigkeit von der Frequenz eingehend untersucht. Es wird der Effekt der Fehlanpassungen in der Ausgangsstufe in den Mischern mit Stromausg¨angen auf die differentiellen Verzerrungen zweiter Ordnung dargestellt. Schliesslich wird die Empfindlichkeit des Intercept-Punktes zweiter Ordnung (IP2) bei verschiedenen Betriebsbedingungen des Sendeempf¨angersuberpr¨ ¨ uft. Im Bereich der Methoden zur Unterdr¨uckung von IMD2-St¨orungen, wurden zwei neuartige Schaltungen zur IP2-Kalibrierung in 0.13μm CMOS-Technologie entworfen, die besonders f¨ur Mischer mit Stromausg¨angen und kleinen Versorgungsspannungen anwendbar sind. Ein bedeu- tender Fortschritt ist auf dem Gebiet der automatischen IMD2-Unterdr¨uckung erzielt worden. Ein neuartiges Konzept zur IP2-Selbstkalibrierung, das auf der adaptiven Signalverarbeitung basiert, wurde eingef¨uhrt. Dieses wird als der wichtigste Beitrag dieser wissenschaftlichen Arbeit betrachtet. Die vorgeschlagene Methode wurde mit modernen Simulationstechnikenuberpr¨ ¨ uft und hardwarem¨aßig in 0.13μm HF CMOS-Technologie entworfen und gefertigt. Aufbau der Arbeit Der Aufbau dieser Dissertation ist wie folgt organisiert. Kapitel 2 stellt ausgew¨ahlte Aspekte der drahtlosen Kommunikation vor. Grundlegende Themen wie die Definition des Funkkanals sowie Zugriffsmethoden und Modulationsverfahren werden besprochen. Besonderer Augenmerk wird auf die Gr¨unde f¨ur die Erzeugung von Signalen mit zeitver¨anderlichen Einh¨ullenden gelegt, da diese Signale die Ursachen der IMD2-Verzerrungen sind. Kapitel 3 beschreibt die Architekturen von drahtlosen Sendeempf¨angern. Es wird ein Uber-¨ blick gegebenuber ¨ die Kenngr¨oßen, die verwendet werden, um Rauschen und Nichtlinearit¨aten des Sendeempf¨angers quantitativ zu bestimmen. Das Kapitel endet mit der Beschreibung von Methoden zur Charakterisierung von St¨orungen gerader Ordnung in drahtlosen Empf¨angern und der Berechnung der Anforderungen an den IP2 f¨ur einige zellulare Kommunikationssysteme. In Kapitel 4 wird die Aufmerksamkeit auf den Abw¨artsmischer gerichtet, der der zentrale Block des drahtlosen Empf¨angers ist. Nach der Erkl¨arung von verschiedenen Mischerarchitek- turen und ihrer Eigenschaften, werden die grundlegenden Mischerkenngr¨oßen definiert, die die Frequenzumsetzung beschreiben. Dann wird eine ausf¨uhrliche analytische Beschreibung von St¨orungen durch Intermodulation zweiter Ordnung in RFIC-Abw¨artsmischern dargestellt. Die Analyse wird durch Vergleiche mit Computersimulationen gest¨utzt. Kapitel 5 gibt einen Uberblick¨ uber ¨ Methoden zur IMD2-Unterdr¨uckung einschließlich von Techniken zum Layout und zum Design der Schaltungen sowieuber ¨ Kompensation und Kali- briermethoden. Dem folgt eine Untersuchung verschiedener IP2-Kalibrierschaltungen. Zuletzt werden automatische Methoden zur IMD2-Unterdr¨uckung einschließlich adaptiver Techniken entwickelt. In Kapitel 6 wird ein Demonstrator beschrieben, der entworfen wurde, um die vorgeschlagene digitale IP2-Kalibriermethode auszuwerten. Die Messergebnisse des Demonstrators werden in Kapitel 7 dokumentiert. Die Arbeit wird in Kapitel 8 zusammengefasst, wo auch Empfehlungen f¨ur zuk¨unftige Arbeiten im Bereich der Entzerrung von St¨orungen gerader Ordnung gegeben werden. Zusammenfassung Zusammenfassung und Schlußbemerkungen In der vorliegenden Dissertation wurden verschiedene Aspekte der Intermodulationsst¨or- ungen zweiter Ordnung in drahtlosen Empf¨angern untersucht. Zuerst wurde hierzu die allge- genw¨artige Existenz von AM-Interferenzen in drahtlosen Kommunikationssystemen dargestellt. Zudem wurde die Bedeutung von Nichtlinearit¨aten zweiter Ordnung in modernen Homodyn- empf¨angern sowie in traditionellen Heterodynarchitekturen betont. Dann wurde eine kom- pakte Charakterisierungsmethode von St¨orungen zweiter Ordnung vorgeschlagen, die f¨ur die Berechnung von Niederfrequenzst¨orungen in Homodynempf¨angern relevant ist. Zus¨atzlich wurde gezeigt, dass die Anforderungen bez¨uglich der IP2-Eigenschaften besonders in Transceivern mit verringerter HF-Selektivit¨at sehr hoch sind. Es wurde eine ausf¨uhrliche Untersuchung von Intermodulationsst¨orungen zweiter Ordnung in Abw¨artsmischern mittels Verhaltens- und Schaltungsmodellierungsmethoden durchgef¨uhrt. Im Rahmen dieser Arbeit konnten neue Einblicke in die Ursachen von St¨orungen zweiter Ordnung gegeben werden. So konnte beispielsweise das Ubersprechen¨ des LO-Signals auf den HF-Eingang in Kombination mit Nichtlinearit¨aten dritter Ordnung des Mischers herausgestellt werden. Es wurde gezeigt, dass differentielle Verzerrungen am Mischerausgang sogar im Falle von perfekten Bauteilanpassungen existieren k¨onnen. Die Abh¨angigkeit der IMD2 von der Frequenz des HF- Interferenzsignals wurde analytisch hergeleitet. Ursachen von Asymmetrien der Fehlanpass- ungen bei St¨orsignalen ober- und unterhalb der LO-Frequenz wurden besprochen. Der Effekt von asymmetrischen Ausgangsstufen in Mischern mit Stromausg¨angen auf differentielle Verzerrungen zweiter Ordnung wurde ebenfalls erl¨autert. Im zweiten Teil der Dissertation wurde ein Uberblick¨ uber ¨ verschiedene Methoden zur IMD2- Unterdr¨uckung gegeben. Unzul¨anglichkeiten in der Layouterstellung und im Schaltungsentwurf f¨ur die IMD2-Unterdr¨uckung wurden gezeigt. Der Vorteil der IP2-Kalibrierung im Vergleich zu anderen Methoden wurde erl¨autert. Es wurden zwei IP2-Kalibrierungsschaltungen f¨ur Mischer mit kleinen Versorgungsspannungen entworfen. Die experimentelluberpr¨ ¨ ufte Funktionalit¨at der Schaltungen best¨atigt die theoretischen Herleitungen. Ferner wurden Methoden zur automatischen IMD2-Unterdr¨uckung diskutiert und die Vorteile der adaptiven Signalverarbeitung aufgezeigt. Die F¨ahigkeit der Detektion von Verzerrungen un- terhalb der Rauschgrenze erm¨oglicht eine deutlich bessere Unterdr¨uckung der IMD2-St¨orungen. Dies ist in vielen Anwendungen f¨ur die Erf¨ullung von Empfindlichkeitsspezifikationen von Bedeut- ung. Adaptive Techniken erm¨oglichen es zudem, eine IP2-Autokalibrierung w¨ahrend des Emp- fangs durchzuf¨uhren. Ein Konzept basierend auf der Korrelation des Gleichtaktsignals und des Differentialausgangssignals des Mischers wurde vorgestellt und mit einem Hardware-Prototyp verifiziert. Die messtechnische Verifikation best¨atigt die vorgeschlagene IP2-Autokalibrierme- thode als M¨oglichkeit zur digitalen adaptiven IP2-Kalibrierung. Empfehlungen f¨ur zuk¨unftige Arbeiten Im Verlauf der Untersuchungen wurden interessante Themenbereiche f¨ur zuk¨unftige Ar- beiten identifiziert. Obgleich die IMD2-Erzeugungsmechanismen ausf¨uhrlich untersucht wur- den, ist die durchgef¨uhrte Analyse auf keinen Fall komplett. So w¨aren weiterf¨uhrende Arbeiten in Bezug auf die Sch¨atzung des relativen Beitrags der Nichtlinearit¨aten dritter Ordnung des LNA und den entsprechenden verkopplungsbasierten Mechanismen zur IMD2-Erzeugung inter- essant. Der Einfluss von Schwankungen der Versorgungsspannung auf Selbstmischung und die Auswirkungen der Gate-Leckstrom-Fehlanpassungen in Deep Submicron-CMOS-Technologien auf St¨orungen zweiter Ordnung sind ebenfalls von Bedeutung. Zus¨atzliche Untersuchungen der effektiven Asymmetrie der Schaltstufen und der Abh¨angigkeit von der Frequenz des HF- Interferenzsignals sind notwendig. Des Weiteren m¨ussen Methoden zur Verringung dieser Effekte entwickelt werden, um die Resistenz der Empf¨anger gegen¨uber mehreren AM-Interferenzsignalen sicherzustellen. Auch im Bereich der IMD2-Unterdr¨uckung besteht weiterer Forschungsbedarf. Die im Rah- men dieser Arbeit vorgeschlagene IP2-Autokalibrierung kann ebenfalls in vielerlei Hinsicht ver- bessert werden. Verbesserungen k¨onnen sowohl im Analogteil als auch im Digitalteil vorgenomm- en werden. So sollten transiente St¨orungen auf der Basisbandseite w¨ahrend der Rekalibierung der IP2-Tuner besser unterdr¨uckt werden. Die Verwendungsf¨ahigkeit eines zus¨atzlichen adaptiven Regelkreises, der eine passend definierte Kostenfunktion minimiert und den Strom der statischen DC-Offset-Tuner abstimmt, sollteuberpr¨ ¨ uft werden. Da in vielen praktischen Anwendungen die f¨ur die Kalibrierung zur Verf¨ugung stehende Zeit begrenzt ist, sollte eine Untersuchung f¨ur schnellere Kalibrieralgorithmen durchgef¨uhrt werden. LMS-Algorithmen, die sich nicht nur auf die Signalpolarit¨at verlassen, sollten ebenfalls entwickelt werden. Dies ist f¨ur Anwendungen mit sehr hohen Anforderungen an das Signal-Rausch-Verh¨altnis erforderlich. Wenn ein System zur Autokalibrierung f¨ur Breitbandempf¨anger eingesetzt werden soll, ist die Abh¨angigkeit der IMD2 vom Frequenzabstand zwischen den Interferenzsignalen zu ber¨uck- sichtigen. Eine m¨ogliche L¨osung basierend auf der adaptiven Abstimmbarkeit der Grenzfrequenz des Ausgangfilters mittels variabler Kapazit¨aten sollteuberpr¨ ¨ uft werden. In die Untersuchungen sollten Methoden zur Detektion von unsymmetrischen Grenzfrequenzen der Ausgangsfilter und den entsprechenden abstimmbaren Filtern miteinbezogen werden. Schließlich wird durch die Detektion von Gleichtaktst¨orungen mit der hier vorgeschlagenen Kalibriersmethode die M¨oglichkeit er¨offnet, gleichzeitig die Unterdr¨uckung von Verzerrungen durch Kreuzmodulation zu erreichen. Da das allgemeine Gleichtaktsignal von der skalierten quadrierten HF-Eingangssignal-Einh¨ullendenuberragt ¨ wird, kann es mit dem differentiellen Ausgangssignal des Empf¨angers multipliziert und skaliert werden. Mit der Sch¨atzung der Kreuz- modulationsverzerrungen und ihrer Subtraktion vom Ausgangssignal kann die gesamte Empfind- lichkeit des Empf¨angers erheblich verbessert werden. Publications Publications in Scientific Journals [J1] K.Dufrene, R.Weigel, ”Highly linear low-voltage IQ downconverter for reconfigurable wire- less receivers,” Proceedings of the European Microwave Association, vol. 2, pp. 147-153, June 2006. Publications in Conference Proceedings [C1] K.Dufrene, R.Weigel, ”Highly linear IQ downconverter for reconfigurable wireless receivers,” Proc. 2005 European Conference on Wireless Technology, Paris, France [C2] K.Dufrene, R.Weigel, ”Adaptive IP2 calibration scheme for direct conversion receivers,” Proc. 2006 Radio and Wireless Symposium, San Diego, USA [C3] K.Dufrene, R.Weigel, ”IP2 and DC offset tuning in current mode output downconversion mixers,” Proc. 2006 International Conference on Microwaves, Radar and Wireless Communi- cations, Cracow, Poland [C4] K.Dufrene, R.Weigel, ”Novel IP2 calibration method for low voltage downconversion mix- ers,” Proc. 2006 Radio Frequency Integrated Circuits Symposium, San Francisco, USA [C5] A. Kruth, M. Simon, K. Dufrene, R. Weigel, Z. Boos, S. Heinen, ”A multimode receiver front-end for software defined radio,” Proc. 2006 European Conference on Wireless Technology, Manchester, UK [C6] K. Dufrene, Z. Boos, R. Weigel, ”A 0.13μm 1.5V CMOS IQ downconverter with digi- tal adaptive IIP2 calibration,” Proc. 2007 International Solid-State Circuits Conference,San Francisco, USA Workshops [W1] K. Dufrene, ”Second order intermodulation in direct conversion receivers - problems and solutions,” EEEfCOM Workshop, Ulm, Germany, June 2005. [W2] K. Dufrene, ”Cancellation of even-order intermodulation distortion in communication RFICs,” GMM Workshop ’Mikroelektronik Anwendungen’, Duisburg, Germany, January 2006.