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Signal Processing with High Complexity: Prototyping and Industrial Design EURASIP Journal on Embedded Systems Signal Processing with High Complexity: Prototyping and Industrial Design Guest Editors: Markus Rupp, Thomas Kaiser, Jean-Francois Nezan, and Gerhard Schmidt EURASIP Journal on Embedded Systems Signal Processing with High Complexity: Prototyping and Industrial Design EURASIP Journal on Embedded Systems Signal Processing with High Complexity: Prototyping and Industrial Design Guest Editors: Markus Rupp, Thomas Kaiser, Jean-Francois Nezan, and Gerhard Schmidt Copyright © 2006 Hindawi Publishing Corporation. All rights reserved. This is a special issue published in volume 2006 of “EURASIP Journal on Embedded Systems.” All articles are open access articles distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Editor-in-Chief Zoran Salcic, University of Auckland, New Zealand Associate Editors Sandro Bartolini, Italy Thomas Kaiser, Germany S. Ramesh, India Neil Bergmann, Australia Bart Kienhuis, The Netherlands Partha Roop, New Zealand Shuvra Bhattacharyya, USA Chong-Min Kyung, Korea Markus Rupp, Austria Ed Brinksma, The Netherlands Miriam Leeser, USA Asim Smailagic, USA Paul Caspi, France John McAllister, UK Leonel Sousa, Portugal Liang-Gee Chen, Taiwan Koji Nakano, Japan Jarmo Henrik Takala, Finland Dietmar Dietrich, Austria Antonio Nunez, Spain Jean-Pierre Talpin, France Stephen A. Edwards, USA Sri Parameswaran, Australia Juergen Teich, Germany Alain Girault, France Zebo Peng, Sweden Dongsheng Wang, China Rajesh K Gupta, USA Marco Platzner, Germany Susumu Horiguchi, Japan Marc Pouzet, France Contents Signal Processing with High Complexity: Prototyping and Industrial Design, Markus Rupp, Thomas Kaiser, Jean-Francois Nezan, and Gerhard Schmidt Volume 2006 (2006), Article ID 90363, 2 pages Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology, Yuanbin Guo, Dennis McCain, Joseph R. Cavallaro, and Andres Takach Volume 2006 (2006), Article ID 14952, 25 pages Generation of Embedded Hardware/Software from SystemC, Salim Ouadjaout and Dominique Houzet Volume 2006 (2006), Article ID 18526, 11 pages Efficient Design Methods for Embedded Communication Systems, M. Holzer, B. Knerr, P. Belanović, and M. Rupp Volume 2006 (2006), Article ID 64913, 18 pages Fixed-Point Configurable Hardware Components, Romuald Rocher, Daniel Menard, Nicolas Herve, and Olivier Sentieys Volume 2006 (2006), Article ID 23197, 13 pages Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2006, Article ID 90363, Pages 1–2 DOI 10.1155/ES/2006/90363 Editorial Signal Processing with High Complexity: Prototyping and Industrial Design Markus Rupp,1 Thomas Kaiser,2 Jean-Francois Nezan,3 and Gerhard Schmidt4 1 Institute for Communication and RF Engineering, Vienna University of Technology, Gusshausstrasse 25/389, 1040 Vienna, Austria 2 Institut fur¨ Kommunikationstechnik, Leibniz Universitat¨ Hannover, Appelstrasse 9a, 30167 Hannover, Germany 3 IETR/Image Group Lab, France 4 Harman/Becker Automotive Systems, 89077 Ulm, Germany Received 10 July 2006; Accepted 11 July 2006 Copyright © 2006 Markus Rupp et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Some modern applications require an extraordinary large This special issue focuses on new development meth- amount of complexity in signal processing algorithms. For ods for applications with high complexity in signal process- example, the 3rd generation of wireless cellular systems is ex- ing and on showing the improved design obtained by such pected to require 1000 times more complexity when com- methods. Examples of such methods are virtual prototyp- paredtoits2ndgenerationpredecessors,andfuture3GPP ing, HW/SW partitioning, automatic design flows, float to standards will aim for even more number-crunching ap- fix conversions, and automatic testing and verification. plications. Video and multimedia applications do not only We received seven submissions of which only four were drive the complexity to new peaks in wired and wireless accepted. systems but also in personal and home devices. Also in In Rapid industrial prototyping and SoC design of 3G/4G acoustics, modern hearing aids, or algorithms for derever- wireless systems using an HLS methodology the authors Yuan- beration of rooms, blind source separation and multichan- bin Guo et al. present their industrial rapid prototyping ex- nel echo cancellation are complexity hungry. At the same periences on 3G/4G wireless systems using advanced signal time the anticipated products also put on additional con- processing algorithms in MIMO-CDMA and MIMO-OFDM straints like size and power consumption when mobile and systems. Advanced receiver algorithms suitable for imple- thus battery powered. Furthermore, due to new develop- mentation are proposed for synchronization, MIMO equal- ments in electro-acoustic transducer design, it is possible ization, and detection, VLSI-oriented complexity reduction to design very small and effective loudspeakers. Unfortu- is presented. This design experience demonstrates that it is nately, the linearity assumption does not hold any more possible to enable an extensive architectural analysis in a for this kind of loudspeakers, leading to computationally short time frame using HLS methodology by abstracting the demanding nonlinear cancellation and equalization algo- hardware design iterations to an algorithmic C/C++ fixed- rithms. point design, which in turn significantly shortens the time to Since standard design techniques would either consume market for wireless systems. too much time or not result in solutions satisfying all con- In Generation of embedded hardware/software from sys- straints, more efficient development techniques are required temC the authors Salim Ouadjaout and Dominique Houzet to speed up this crucial phase. In general such developments present a design flow to reduce the SoC design cost. This are rather expensive due to the required extraordinary high design flow unifies hardware and software using a single complexity. Thus, de-risking of a future product based on high level language and thus decreases the manual errors rapid prototyping is often an alternative approach. How- by rewriting design code. It integrates hardware/software ever, since prototyping would delay the development, it often (HW/SW) generation tools and an automatic interface syn- makes only sense when it is well embedded in the product de- thesis through a custom library of adapters. The approach is sign process. Rapid prototyping has thus evolved by applying validated on a hardware producer/consumer case study and new design techniques more suitable to support a quick time on the design of a given software-radio communication ap- to market requirement. plication. 2 EURASIP Journal on Embedded Systems In Efficient design methods for embedded communication antenna systems. He is the founding Editor-in-Chief of the IEEE systems the authors Martin Holzer et al. analyze a complete Signal Processing Society e-letter. His research interest focuses on applied signal processing with emphasis on multi-antenna systems, design process to exhibit inefficiencies. The lack of an inte- especially its applicability to ultra-wideband systems. grated design methodology is argued. High level character- isation, virtual prototyping, automated hardware/software Jean-Francois Nezan is an Assistant Pro- partitioning, and floating-point to fixed-point data conver- fessor at National Institute of Applied Sci- sion are bottlenecks to solve in such a methodology. For each ences of Rennes (INSA) and a member point, authors present and compare several tools and algo- of the IETR laboratory in Rennes. He re- rithms leading to an efficient fast prototyping framework. ceived his postgraduate certificate in sig- Examples are given in the field of high-complexity commu- nal, telecommunications, images, and radar nication systems but can be extended to other complex ap- sciences from Rennes University in 1999, and his engineering degree in electronic and plication fields. computer engineering from INSA-Rennes In Fixed-point configurable hardware components the au- Scientific and Technical University in 1999. thors Romuald Rocher et al. propose a flexible scheme for He received his Ph.D. degree in electronics in 2002 from the INSA. fixed-point optimization in order to better exploit advances His main research interests include image compression algorithms in VLSI technology. After determining the dynamic range and multi-DSP rapid prototyping. and the binary point, a data word-length optimization fol- lows by introducing a suitable user-defined cost function. Gerhard Schmidt received his Dipl.-Ing. This central cost function, which, for example, depends on degree in 1996 and his Dr.-Ing. degree in chip area and/or energy consumption, is to be minimized 2001, both at Darmstadt University of Tech- nology, Germany. Presently, he is work- under the constraint of a pre-defined thresholded signal-to- ing as a senior research engineer in the quantization noise ratio (SQNR). Through use of analytical acoustic signal processing group at Har- models the design time can be significantly reduced. A 128- man/Becker Automotive Systems in Ulm, tap LMS filter design exemplarily explores the fixed-point Germany. His main research interests in- search
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