Hypertransport System Architecture / Mindshare, Inc., Jay Trodden & Don Anderson

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Hypertransport System Architecture / Mindshare, Inc., Jay Trodden & Don Anderson world-class technical training Are your company’s technical training needs being addressed in the most effective manner? MindShare has over 25 years experience in conducting technical training on cutting-edge technologies. We understand the challenges companies have when searching for quality, effective training which reduces the students’ time away from work and provides cost-effective alternatives. MindShare offers many fl exible solutions to meet those needs. Our courses are taught by highly-skilled, enthusiastic, knowledgeable and experienced instructors. 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We are proud to be the preferred training provider at an extensive list of clients that include: ADAPTEC • AMD • AGILENT TECHNOLOGIES • APPLE • BROADCOM • CADENCE • CRAY • CISCO • DELL • FREESCALE GENERAL DYNAMICS • HP • IBM • KODAK • LSI LOGIC • MOTOROLA • MICROSOFT • NASA • NATIONAL SEMICONDUCTOR NETAPP • NOKIA • NVIDIA • PLX TECHNOLOGY • QLOGIC • SIEMENS • SUN MICROSYSTEMS SYNOPSYS • TI • UNISYS 4285 SLASH PINE DRIVE COLORADO SPRINGS, CO 80908 USA M 1.602.617.1123 O 1.800.633.1440 [email protected] www.mindshare.com HyperTransport™ System Architecture MINDSHARE, INC. Don Anderson Jay Trodden Boston • San Francisco • New York • Toronto • Montreal London • Munich • Paris • Madrid Capetown • Sydney • Tokyo • Singapore • Mexico City Many of the designations used by manufacturers and sellers to distinguish their products are claimed as trademarks. Where those designators appear in this book, and Addison-Wesley was aware of the trademark claim, the designa- tions have been printed in initial capital letters or all capital letters. The authors and publisher have taken care in preparation of this book, but make no expressed or implied warranty of any kind and assume no responsibility for errors or omissions. No liability is assumed for incidental or consequential damages in connection with or arising out of the use of the information or programs contained herein. The publisher offers discounts on this book when ordered in quantity for bulk purchases and special sales. For more information, please contact: U.S. Corporate and Government Sales (800) 382-3419 [email protected] For sales outside of the U.S., please contact: International Sales (317) 581-3793 [email protected] Visit Addison-Wesley on the Web: www.awprofessional.com Library of Congress Cataloging-in-Publication Data Trodden, Jay. HyperTransport system architecture / Mindshare, Inc., Jay Trodden & Don Anderson. p. cm. Includes index. ISBN 0-321-16845-3 (alk. paper) 1. Data transmission systems. 2. Integrated circuits. 3. Computer architecture. I. Anderson, Don, 1953– II. Mindshare, Inc. III. Title. TK5105.T745 A53 2003 004.6—dc21 2002043927 Copyright © 2003 by MindShare, Inc. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form, or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior consent of the publisher. Printed in the United States of America. Published simultaneously in Canada. For information on obtaining permission for use of material from this work, please submit a written request to: Pearson Education, Inc. Rights and Contracts Department 75 Arlington Street, Suite 300 Boston, MA 02116 Fax: (617) 848-7047 Set in 10 point Palatino by MindShare, Inc. ISBN: 0-321-16845-3 1 2 3 4 5 6 7 8 9 10—MA—0706050403 First printing, February 2003 Contents The MindShare Architecture Series ....................................................................................... 1 Cautionary Note ......................................................................................................................... 2 Intended Audience .................................................................................................................... 2 Prerequisite Knowledge ........................................................................................................... 3 Topics and Organization .......................................................................................................... 3 Documentation Conventions................................................................................................... 4 HyperTransport™................................................................................................................ 4 Hexadecimal Notation ........................................................................................................ 4 Binary Notation.................................................................................................................... 4 Decimal Notation ................................................................................................................. 4 Byte Terminology and Notation ........................................................................................ 5 Bits Versus Bytes Notation ................................................................................................. 5 Bit Fields and Groups of Signals........................................................................................ 5 Active Signal States.............................................................................................................. 5 Visit Our Web Site..................................................................................................................... 6 We Want Your Feedback...........................................................................................................6 Part One: Overview of HyperTransport Chapter 1: Introduction to HyperTransport Background: I/O Subsystem Bottlenecks .............................................................................. 9 Server Or Desktop Computer: Three Subsystems ........................................................ 10 CPU Speed Makes Other Subsystems Appear Slow .................................................... 10 Multiple CPUs Aggravate The Problem.................................................................. 10 DRAM Memory Keeps Up Fairly Well........................................................................... 10 I/O Bandwidth Has Not Kept Pace ................................................................................ 11 This Slows Down The Processor .............................................................................. 11 It Also Hurts Fast Peripherals................................................................................... 11 Reducing I/O Bottlenecks ................................................................................................ 11 The Shared Bus Approach........................................................................................
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