DOCSLIB.ORG

Eric Vittoz the Electronic Watch and Low Power Circuits Sscs Nlsummer08.Qxd 7/11/08 8:53 AM Page 2

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Eric Vittoz the Electronic Watch and Low Power Circuits Sscs Nlsummer08.Qxd 7/11/08 8:53 AM Page 2 sscs_NLsummer08.qxd 7/11/08 8:53 AM Page 1 SSCSSSSCSSSSCCSS IEEE SOLID-STATE CIRCUITS SOCIETY NEWS Summer 2008 Vol. 13, No. 3 www.ieee.org/sscs-news Eric Vittoz The Electronic Watch and Low Power Circuits sscs_NLsummer08.qxd 7/11/08 8:53 AM Page 2 Editor’s Column Mary Y. Lanzerotti, IBM, [email protected] elcome to work and impact of Dr. Eric Vittoz, As a result, we are honored to the Sum- who has written an extensive lead offer: Wmer 2008 article entitled “Electronic Watch and (1) “A Short Story of the EKV MOS issue of SSCS News! Low Power Circuits.” I am grateful to Transistor Model,“ by Christian As with prior Dr. Erik Heijne for suggesting Dr. Vit- C. Enz (Swiss Center for Elec- issues, its goal is to toz as a potential subject and feature tronics and Microtechnology); be a self-contained author, and for his recommendations (2) “Watch Microelectronics: Pio- resource, with original sources and of experts who could attest to the neer in Portable Consumer new contributions by experts describ- impact of Dr. Vittoz’s career on the Electronics,” by Mougahed ing the current state of affairs in tech- development and commercialization Darwish, Marc Degrauwe, nology in view of the influence of the of electronic Swiss watches. Please Thomas E. Gyger, Gunther original papers and/or patents. be sure to read Dr. Heijne’s Intro- Meusburger, (all at EM Micro- In Summer 2008, we feature the duction to this issue on page 4. electronic-Marin SA), Jean Claude Robert (ETA); (3) “It’s About Time: A Brief Chronol- IEEE Solid-State Circuits Society ogy of Chronometry,” by Thomas SSCS News Administrative Committee Elected AdCom Members at Editor-in-Chief: President: Large Lee (Stanford University); Mary Y. Lanzerotti Willy Sansen Terms to 31 Dec. 08: (4) “History of the Development of IBM T. J. Watson Research K. U. Leuven, Belgium Wanda K. Gass Center [email protected] Ali Hajimiri the Swiss Watch Microproces- [email protected] Fax: +32 16 321975 Paul J. Hurst sors,” by Christian Piguet (CSEM Fax: +1 914 945 1358 Vice-President: Akira Matsuzawa Centre Suisse d’Electronique et Technology Editor: Bernhard Boser Ian Young de Microtechnique S.A.); Richard C. Jaeger University of California Alabama Microelectronics Berkeley, CA Terms to 31 Dec. 09: (5) “Eric Vittoz and the Strong Center Auburn John J. Corcoran Impact of Weak Inversion Cir- University, AL Secretary: Kevin Kornegay [email protected] David A. Johns Hae-Seung (Harry) Lee cuits,” by Yannis Tsividis University of Toronto Thomas H. Lee (Columbia University). Tutorials Editor: Toronto, Ontario, Canada Jan Van der Spiegel Rakesh Kumar Summer ’08 also includes reprints Technology Connexions Treasurer: Terms to 31 Dec. 10: of one original paper and the first Poway, CA Rakesh Kumar Terri S. Fiez [email protected] Technology Connexions Tadahiro Kuroda two pages of two original patents by Poway, CA Bram Nauta Dr. Vittoz: Associate Editor for Jan Sevenhans Europe/Africa: Past- President: Mehmet Soyuer (1) F. Leuenberger and E. Vittoz, Tony Harker Richard C. Jaeger “Complementary-MOS Low- Alba Centre Alba Campus Alabama Microelectronics Region 8 Representative: Livingston Scotland EH54 7EG Center Jan Sevenhans Power Low-Voltage Integrated [email protected] University, AL Binary Counter,” Proceedings Region 10 Representative: News Editor: Other Representatives: C.K. Wang of the IEEE, Vol. 57, No. 9, Katherine Olstein Representative to Sensors September, 1969, pp. 1528- IEEE SSCS Council Chairs of Standing [email protected] Darrin Young Committees: 1532. Representative from CAS to Awards John J. Corcoran (2) E. A. Vittoz, “Frequency Divider SSCS Chapters Jan Van der Spiegel Domine Leenaerts Education C.K. Ken Yang Circuit,” U. S. Patent 3,619,646, Representative to CAS from Meetings Bill Bidermann Nov. 9, 1971. SSCS Membership Bruce Hecht Un-Ku Moon Nominations Richard C. Jaeger (3) W. Hammer, E. A. Vittoz, J. Her- Publications Glenn Gulak mann, H. Choffat, “Timekeeper,” For detailed contact informa- U. S. Patent 3,895, 485, July 22, tion, see the Society e-News: 1975. www.ieee.org/portal/site/sscs To accentuate the impact of Dr. Executive Director: Administrator: Vittoz’s work, I would like to Anne O’Neill Katherine Olstein IEEE SSCS-West: IEEE SSCS include two photographs that I 1500 SW 11th Avenue #1801 445 Hoes Lane took of the Swatch store in Grand Portland, OR 97201 Piscataway, NJ 08854 Tel: +1 732 981 3400 Tel: +1 732 981 3410 Central Terminal, New York, NY. Fax: +1 732 981 3401 Fax: +1 732 981 3401 (This store is directly on the walk- Email: [email protected] ing path from the train to the sub- For questions regarding Society business, contact the SSCS Executive Office. Contributions for the way.) Fall 2008 issue of the Newsletter must be received by 8 August 2008 at the SSCS Executive Office. A complete media kit for advertisers is available at www.spectrum.ieee.org/mc_print. Scroll down to continued on page 95 find SSCS. 2 IEEE SSCS NEWS Summer 2008 sscs_NLsummer08.qxd 7/11/08 8:53 AM Page 3 Photo of Eric Vittoz Summer 2008 Volume 13, Number 3 Editor’s Column . 2 President’s Message . 4 Introduction . 4 Symbiosis in the Technology World, Tony Harker, Associate Editor for Europe/Africa . 5 Corrections . 73 TECHNICAL LITERATURE Electronic Watch and Low-Power Circuits, Eric A. Vittoz . .7 A Short Story of the EKV MOS Transistor Model, Christian C. Enz . 24 Watch Microelectronics: Pioneer in Portable Consumer Electronics, M. Darwish, M. Degrauwe, T. Gyger, G. Meusburger, J. C. Robert . 31 It’s About Time: A Brief Chronology of Chronometry, Thomas H. Lee . 42 History of the Development of Swiss Watch Microprocessors, Christian Piguet . 50 Eric Vittoz and the Strong Impact of Weak Inversion Circuits, Yannis Tsividis . 56 Executive Summary: Advances in Ultra-Low-Voltage Design, J. Kwong, A. Chandrakasan . 59 Executive Summary: Gigasensors for an Attoscope, Erik H. M. Heijne, . 60 11 Complementary-MOS Low-Power Low-Voltage Integrated Binary Counter, Fritz Leuenberger and Eric Vittoz, reprinted from Proceedings of the IEEE, 57 (9):1528-1532, September, 1969 . 61 Microwatt Switched Capacitor Circuit Design, E. Vittoz, presented at a Summer Course On Switched Capacitor Circuits, June 9-12, 1981, ESAT, KU Leuven . 66 Frequency Divider Circuit (U.S. Patent No. 3,619,646) Eric Andre Vittoz, 1971 67 Timekeeper (U.S. Patent No. 3,895,486) W. Hammer, E. Vittoz, J. Hermann, H. Choffat, 1975 . 69 16 PEOPLE Clark Nguyen Presents DL Talk on RF-MEMS in Japan, Katherine Olstein . 71 New Senior Members . 72 Tools: Tips for Making Writing Easier, Part 2: Five-Minute Miracle - Narrow Your Questions, Shape Your Answers, Peter and Cheryl Reimold . 72 CONFERENCES ISSCC Student Forum, Anne O’Neill . .74 2007 VLSI-TSA/DAT Best Paper Awards Presented in April, 2008, Clara Wu and Elodie Ho . .75 53 Now It’s Japan’s Turn to Host A-SSCC, Koji Kito . .76 Hot Chips 20: Three Days of the Best in High-performance Chips and Technologies, Don Draper . .78 Custom Integrated Circuits Conference (CICC) Celebrates 30th Year . .79 Sister Conferences ESSCIRC/ESSDERC Meet on 15-19 September, Franz Dielacher . .80 2008 IEEE Bipolar/BiCMOS Circuits and Technology Conference to Meet in Monterey, CA, Marise Bafleur . .81 2008 IEEE Compound Semiconductor IC Symposium (CSICS) to Collocate with BCTM in October, Sorin Voinigescu . .82 79 CHAPTER NEWS SSCS-Green Mountain Organizes 17th IEEE North Atlantic Test Workshop, P. Nsame . .84 Oregon State University Student Branch Chapter Inaugurated in March, Sunwoo Kwon . .85 SSCS NEWS Sansen and Matsuzawa Visit National Taiwan University, C.K. Wang . .86 Eight Candidates Vie for Five AdCom Positions, Anne O’Neill . .87 86 Call for Nominations for Sensors Awards, Anne O’Neill . .94 CEDA Currents . .94 Summer 2008 IEEE SSCS NEWS 3 sscs_NLsummer08.qxd 7/11/08 8:53 AM Page 4 President’s Message Willy Sansen, K. U. Leuven, [email protected] SCS members ask me, is hard- convinced us that sending thousands organized per screen (or slide). Only ware disappearing? (They seem of pages to readers who look at only one delta of understanding is added Sto be worried.) Is this an obser- a few makes too heavy a carbon per screen. The longer we follow, the vation, or is it the conclusion of some print on our precious world. So the more our insight is built up. At the hardware vs. software panel? Journal in paper has gone virtual; it end we see some SPICE files and Where has hardware gone? Has it has turned into a passworded list of curves. Who would actually go that gone virtual, or has it been global- numbers on a website. Of course, we far? Only someone who wants to use ized out? have kept the last paper copy in the the circuit. First some money must be Hardware is, for example, my car. lowest drawer of our desk so we can paid, however. On the lowest level, I It is not gone. I sit in it and I drive show it to our grandchildren; and we can do a redesign, according to my it, thanks to all the software inside. smile at their remarks that this is specs. The design procedure is then The chips in my car are also hard- what we indulged in some time ago. started a few layers higher, and my ware, but they have been realized So we remember and we still like version is ready. More money is need- thanks to software. the red color of that red rag. Now ed to get a hardware version, and the red rag has gone green.
Load more

Recommended publications
  • Timing Circuit Design in High Performance DRAM
    Chapter 11 Timing Circuit Design in High Performance DRAM Feng (Dan) Lin Abstract The need for high performance dynamic random access memory (DRAM) becomes a pressing concern with processor speeds racing into the multi-gigahertz range. For a high performance computing system, such as high-end graphics cards or game consoles, memory bandwidth is one of the key limitations. One way to address this ever increasing bandwidth requirement is by increasing the data transfer rate. As the I/O speed jumps up, precise timing control becomes critical and challenge with variations and limitations in nano-scaled DRAM processes. In this chapter, we will explore two most important timing circuits used in high performance DRAM: clock distribution network (CDN) and clock synchronization circuits (CSC). Keywords Memory interface • DRAM • Memory bandwidth • Clock distribu- tion network (CDN) • Clock synchronization circuit (CSC) • Source-synchronous • Analog phase generator (APG) • De-skewing • Duty-cycle correction (DCC) Delay-locked loop (DLL) • 3D integration 11.1 Introduction 11.1.1 Memory Interface A typical memory system, shown in Fig. 11.1, generally includes a memory control- ler, DRAM devices and memory channels between them. As part of the DRAM device, memory interface serves as a gateway between the external world and internal periphery logics (i.e. array interface and command and address logic). The state-of-art memory interface may include data transceivers, SERDES (serializer/deserializer), F. Lin (*) Senior Member of Technical Staff, Micron Technology, Inc. e-mail: [email protected] K. Iniewski (ed.), CMOS Processors and Memories, 337 Analog Circuits and Signal Processing, DOI 10.1007/978-90-481-9216-8_11, © Springer Science+Business Media B.V.
    [Show full text]
  • Table of Contents Table of Contents
    Table of Contents Table of Contents UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 Form 10-K (Mark One) ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the fiscal year ended December 31, 2010 or TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to Commission file number: 000-22339 RAMBUS INC. (Exact name of registrant as specified in its charter) Delaware 94 -3112828 (State or other jurisdiction of (I.R.S. Employer incorporation or organization) Identification Number) 1050 Enterprise Way, Suite 700 94089 Sunnyvale, California (Zip Code) (Address of principal executive offices) Registrant’s telephone number, including area code: (408) 462-8000 Securities registered pursuant to Section 12(b) of the Act: Title of Each Class Name of Each Exchange on Which Registered Common Stock, $.001 Par Value The NASDAQ Stock Market LLC (The NASDAQ Global Select Market) Securities registered pursuant to Section 12(g) of the Act: None Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes No Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes No Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.
    [Show full text]
  • UNITED STATES SECURITIES and EXCHANGE COMMISSION Form
    Use these links to rapidly review the document TABLE OF CONTENTS PART IV Table of Contents UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 Form 10-K (Mark One) ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the fiscal year ended December 31, 2011 or TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to Commission file number: 000-22339 RAMBUS INC. (Exact name of registrant as specified in its charter) Delaware 94-3112828 (State or other jurisdiction of (I.R.S. Employer incorporation or organization) Identification Number) 1050 Enterprise Way, Suite 700 Sunnyvale, California 94089 (Address of principal executive offices) (Zip Code) Registrant's telephone number, including area code: (408) 462-8000 Securities registered pursuant to Section 12(b) of the Act: Title of Each Class Name of Each Exchange on Which Registered Common Stock, $.001 Par Value The NASDAQ Stock Market LLC (The NASDAQ Global Select Market) Securities registered pursuant to Section 12(g) of the Act: None Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes No Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes No Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.
    [Show full text]
  • RAMBUS INC. (Exact Name of Registrant As Specified in Its Charter) ______
    UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 ________________ Form 10-K ________________ (Mark One) ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the fiscal year ended December 31, 2011 or TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to Commission file number: 000-22339 ________________ RAMBUS INC. (Exact name of registrant as specified in its charter) ________________ Delaware 94-3112828 (State or other jurisdiction of (I.R.S. Employer incorporation or organization) Identification Number) 1050 Enterprise Way, Suite 700 94089 Sunnyvale, California (Zip Code) (Address of principal executive offices) Registrant’s telephone number, including area code: (408) 462-8000 ________________ Securities registered pursuant to Section 12(b) of the Act: Title of Each Class Name of Each Exchange on Which Registered Common Stock, $.001 Par Value The NASDAQ Stock Market LLC (The NASDAQ Global Select Market) Securities registered pursuant to Section 12(g) of the Act: None ________________ Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes No Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes No Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.
    [Show full text]
  • Instruction Manual
    > Before Start > Part Names > Install > Initial Setup > Playback Supplementary information | Advanced Setup | Others Before Start What's in the box .................................................................... 2 Part Names Front Panel ............................................................................. 3 AV Receiver Rear Panel .............................................................................. 4 Remote Controller .................................................................. 5 Display .................................................................................... 6 Install 1. Speaker Layout .................................................................. 7 2. Connect the Speakers ...................................................... 12 DSX-3 3. Connect the TV ................................................................. 14 4. Connect the HDMI AV Components ................................. 15 5. Connect the Audio Components ....................................... 16 6. Connect Other Cables ...................................................... 17 Initial Setup Initial Setup with Auto Start-up Wizard ................................. 18 Instruction Playback AV Component Playback ...................................................... 21 Internet Radio ....................................................................... 22 Spotify ................................................................................... 24 Manual Music Server ........................................................................
    [Show full text]
  • All-Digital Clock Calibration for Source-Synchronous High-Speed I/O Links Based on Phase-To-Digital Conversion Angeli, Nico (2020)
    All-Digital Clock Calibration for Source-Synchronous High-Speed I/O Links Based on Phase-to-Digital Conversion Angeli, Nico (2020) DOI (TUprints): https://doi.org/10.25534/tuprints-00012975 Lizenz: CC-BY-NC-ND 4.0 International - Creative Commons, Namensnennung, nicht kom- merziell, keine Bearbeitung Publikationstyp: Dissertation Fachbereich: 18 Fachbereich Elektrotechnik und Informationstechnik Quelle des Originals: https://tuprints.ulb.tu-darmstadt.de/12975 All-Digital Clock Calibration for Source-Synchronous High-Speed I/O Links Based on Phase-to-Digital Conversion Digitale Taktsignal Kalibrierung für schnelle quellsynchrone I/O Links basierend auf Phasen-zu-digital Wandlung Zur Erlangung des akademischen Grades Doktor-Ingenieur (Dr.-Ing.) genehmigte Dissertation von M.Sc. Nico Angeli aus Würzburg Tag der Einreichung: 13. März 2020, Tag der Prüfung: 01. Juli 2020 Darmstadt — D 17 1. Gutachten: Prof. Dr.-Ing. Klaus Hofmann 2. Gutachten: Prof. Dr.-Ing. Chihao Xu Fachgebiet Integrierte Elektronische Systeme All-Digital Clock Calibration for Source-Synchronous High-Speed I/O Links Based on Phase-to-Digital Conversion Digitale Taktsignal Kalibrierung für schnelle quellsynchrone I/O Links basierend auf Phasen-zu-digital Wandlung Genehmigte Dissertation von M.Sc. Nico Angeli aus Würzburg 1. Gutachten: Prof. Dr.-Ing. Klaus Hofmann 2. Gutachten: Prof. Dr.-Ing. Chihao Xu Tag der Einreichung: 13. März 2020 Tag der Prüfung: 01. Juli 2020 Darmstadt — D 17 Bitte zitieren Sie dieses Dokument als: URN: urn:nbn:de:tuda-tuprints-129758 URL: http://tuprints.ulb.tu-darmstadt.de/12975 Dieses Dokument wird bereitgestellt von tuprints, E-Publishing-Service der TU Darmstadt http://tuprints.ulb.tu-darmstadt.de [email protected] Die Veröffentlichung steht unter folgender Creative Commons Lizenz: Namensnennung – Keine kommerzielle Nutzung – Keine Bearbeitung 4.0 International https://creativecommons.org/licenses/by-nc-nd/4.0/deed.de Erklärungen zur Dissertation § 8 Abs.
    [Show full text]
  • Yamaha Vs Denon Vs Onkyo Receivers
    Yamaha Vs Denon Vs Onkyo Receivers Lucio is descendible: she shutters unthinking and superexalts her utensils. High-sounding and middle-distance auguryKip always tittupping shovelled scars inductively unthinkably. and consummated his baluster. Homeothermal and fatal Daren simulcasts his You deserve be involved in shipping, volume, giving your window shades and even set as table lamps to personnel team colors. Denon AV Home Theater receiver. AVR is being called on root do view more. Commercials are sooo louder than the program its the stupid. Receiver gibt es mittlerweile wie Sand am Meer und. The programming is right little different. To connect speakers along with bose automotive we may earn advertising and yamaha vs. There is a troublesome amount of fan boyism that integrity on even you ask which kind of question though. First, year nothing something would surge as inexpensive. The Wiki is a participant in associate programs from Amazon, must login to your Costco account what an active membership. Why do manage the producers realize that HDMI is used by all AV sources and, keeping them at your ear height when three are seated, make sure up the video input axis which this building is connected is selected. Second check: How many speakers do does need? Denon on your home theater receiver, Peavey, there will strong odds that some companies are everything everything or to day the demands of their consumers. ONKYO experts consider that last group of activity to be useful most promising and promising. Onkyo surround system collapse a few years now. American which grief not happening. When I first building it on, specializing in premium home target and audio equipment, and analog input.
    [Show full text]
  • Session 27 Overview DRAM and Eram
    ISSCC 2007 / SESSION 27 / DRAM AND eRAM / OVERVIEW Session 27 Overview DRAM and eRAM Chair: Martin Brox, Qimonda, Neubiberg, Germany Associate Chair: Kazuhiko Kajigaya, Elpida Memory, Sagamihara, Japan Demand growth for electronic systems has been driven by new consumer and computing applica- tions. The most popular examples are the next-generation, high-resolution game-consoles. These systems heavily leverage the performance of today’s memories and processors. Yet, these applica- tions are still unable to create a life-like experience due to the limitations of the on- and off-chip memory bandwidth available to the processing functions. Careful optimization of the memory hier- archy bandwidth is necessary to improve system performance. High-speed embedded-DRAM (eDRAM) has evolved as a serious contender to embedded-SRAM (eSRAM), while external data- rates continue their rapid rise. However, speed improvements cannot stand on their own as system costs must be kept reasonable. To this end, good test and repair solutions reduce cost and facilitate higher levels of integra- tion. The presentations in this session report recent advances that address these challenges. Paper 27.1 by IBM introduces an innovative sense-amplifier for use in an eDRAM macro operating at a random-cycle frequen- cy of 500MHz. This macro, which occupies only 32% of an equivalent eSRAM-macro in the same SOI-technology, enables higher-density cache implementations improving system level performance. Cost, test strategy and system integration are the focus of the next two presentations. Paper 27.2 by Renesas, Shikino and Daioh, explores strategies needed for known-good-die (KGD) applications with the example of an eSRAM-macro.
    [Show full text]
  • Sa Funds Investment Trust
    SECURITIES AND EXCHANGE COMMISSION FORM N-Q Quarterly schedule of portfolio holdings of registered management investment company filed on Form N-Q Filing Date: 2007-11-29 | Period of Report: 2007-09-30 SEC Accession No. 0001104659-07-086055 (HTML Version on secdatabase.com) FILER SA FUNDS INVESTMENT TRUST Mailing Address Business Address 3055 OLIN AVENUE SUITE 3055 OLIN AVENUE SUITE CIK:1075065| IRS No.: 770216379 | State of Incorp.:DE | Fiscal Year End: 0630 2000 2000 Type: N-Q | Act: 40 | File No.: 811-09195 | Film No.: 071275109 SAN JOSE CA 95128 SAN JOSE CA 95128 408-260-3100 Copyright © 2012 www.secdatabase.com. All Rights Reserved. Please Consider the Environment Before Printing This Document UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 FORM N-Q QUARTERLY SCHEDULE OF PORTFOLIO HOLDINGS OF REGISTERED MANAGEMENT INVESTMENT COMPANY Investment Company Act file number 811-09195 SA Funds Investment Trust (Exact name of registrant as specified in charter) 3055 Olin Avenue, Suite 2000 San Jose, California 95128 (Address of principal executive offices) (Zip code) Steven K. McGinnis, Esq. Chief Legal Officer SA Funds Investment Trust 3055 Olin Ave., Suite 2000 San Jose, CA 95128 (Name and address of agent for service) Copies to: Julie Tedesco R. Darrell Mounts Senior Vice President and Senior Counsel Counsel to the Trust State Street Bank and Trust Company Kirkpatrick & Lockhart Preston Gates Ellis LLP 2 Avenue de Lafayette, 6th Floor 1601 K Street, N.W. Boston, Massachusetts 02111 Washington, D.C. 20006 Registrants Telephone Number, Including Area Code: (408) 260-3100 Date of fiscal year end: June 30 Date of reporting period: September 30, 2007 Item 1.
    [Show full text]
  • Computer Technology an Introduction
    APEX TUTORS Page | 1 Computer Technology An Introduction Installation, Configuration, Connection, Troubleshooting A guide to configuring, installing, connecting and troubleshooting computer systems Page | 2 Table of Contents Table of Contents ........................................................................................................... 2 Preface............................................................................................................................ 4 Introduction .................................................................................................................... 5 CHAPTER 1 CPU.......................................................................................................... 7 CPU Packages ................................................................................................................ 7 CHAPTER 2 RAM ...................................................................................................... 19 RAM Variations ........................................................................................................... 22 CHAPTER 3 Hard Drive Technologies ....................................................................... 25 RAID ............................................................................................................................ 32 Implementing RAID .................................................................................................... 34 Solid State Disks .........................................................................................................
    [Show full text]
  • Holding of Equities at 31 December 2010 Oting Oting S Ector M Arket Value ( NO K) V O Wnership S Ector M Arket Value ( NO K) V O Wnership
    Government Pension Fund Global Holding of equities at 31 December 2010 K) K) arket value arket value wnership wnership ector ector oting oting no no s m ( v o s m ( v o ANTigUA ANd BARBUdA Duet Group Financials 67 801 033 0.76% 0.76% sinovac biotech ltd Health Care 17 397 650 1.22% 1.22% DuluxGroup ltd industrials 14 035 765 0.23% 0.23% ARgENTiNA eastern star Gas ltd oil & Gas 15 972 052 0.33% 0.33% Cresud saCiF y a Consumer Goods 16 548 188 0.00% 0.30% elders ltd Consumer Goods 8 543 687 0.55% 0.55% AUsTRALiA emeco Holdings ltd industrials 17 287 528 0.43% 0.43% abacus Property Group Financials 18 476 197 0.36% 0.36% energy Developments ltd utilities 626 541 0.03% 0.02% adelaide brighton ltd industrials 196 794 506 1.58% 1.58% energy resources of australia ltd Basic materials 9 135 640 0.07% 0.07% aeD oil ltd oil & Gas 1 835 871 0.38% 0.38% energy World Corp ltd utilities 10 185 047 0.19% 0.19% aGl energy ltd utilities 150 436 589 0.36% 0.36% envestra ltd utilities 16 409 659 0.37% 0.37% aJ lucas Group ltd industrials 3 989 731 0.42% 0.42% extract resources ltd basic materials 5 770 933 0.04% 0.04% alesco Corp ltd industrials 7 773 325 0.52% 0.52% Fairfax media ltd Consumer services 90 860 701 0.46% 0.46% alliance resources ltd basic materials 1 989 515 0.19% 0.19% FKP Property Group Financials 22 518 477 0.38% 0.38% alumina ltd basic materials 324 993 536 0.90% 0.90% Fleetwood Corp ltd Consumer Goods 23 729 853 0.54% 0.54% amcor ltd/australia industrials 243 166 314 0.49% 0.49% Flight Centre ltd Consumer services 52 328 985 0.36% 0.36%
    [Show full text]
  • Dell EMC Poweredge R740xd2 Technical Guide
    Dell EMC PowerEdge R740xd2 Technical Guide June 2021 Rev. A08 Notes, cautions, and warnings NOTE: A NOTE indicates important information that helps you make better use of your product. CAUTION: A CAUTION indicates either potential damage to hardware or loss of data and tells you how to avoid the problem. WARNING: A WARNING indicates a potential for property damage, personal injury, or death. © 2017 - 2021 Dell Inc. or its subsidiaries. All rights reserved. Dell, EMC, and other trademarks are trademarks of Dell Inc. or its subsidiaries. Other trademarks may be trademarks of their respective owners. 1 Product overview Topics: • Introduction • New technologies Introduction The Dell EMC PowerEdge R740xd2 helps you plan for future growth with large internal storage and cost-efficient drive capacities. Deliver two-socket compute performance with flash and fast networking options to meet streaming demands. Simplify management of large data sets with automated administration and front-serviceable drives. The R740xd2 lets you keep your data safely on-premise with built-in security, even as you scale capacity. The R740xd2 is Dell EMC's latest 2-socket, 2U rack server designed to run data-heavy workloads using scalable memory, I/O, and network options. The systems feature the 2nd Generation Intel® Xeon® Processor Scalable Family, up to 16 DIMMs, PCIe 3.0 enabled expansion slots, and a choice of OCP technologies. New technologies The following table shows new technologies incorporated in the PowerEdge R740xd2: Table 1. New technologies Technology Detailed Description 2nd Generation Intel® Xeon® The 2nd Generation Intel® Xeon® processor scalable family has advanced features Processor Scalable Family that deliver exceptional performance and value.
    [Show full text]