Securing Real-Time Microcontroller Systems Through Customized Memory View Switching
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UG1046 Ultrafast Embedded Design Methodology Guide
UltraFast Embedded Design Methodology Guide UG1046 (v2.3) April 20, 2018 Revision History The following table shows the revision history for this document. Date Version Revision 04/20/2018 2.3 • Added a note in the Overview section of Chapter 5. • Replaced BFM terminology with VIP across the user guide. 07/27/2017 2.2 • Vivado IDE updates and minor editorial changes. 04/22/2015 2.1 • Added Embedded Design Methodology Checklist. • Added Accessing Documentation and Training. 03/26/2015 2.0 • Added SDSoC Environment. • Added Related Design Hubs. 10/20/2014 1.1 • Removed outdated information. •In System Level Considerations, added information to the following sections: ° Performance ° Clocking and Reset 10/08/2014 1.0 Initial Release of document. UltraFast Embedded Design Methodology Guide Send Feedback 2 UG1046 (v2.3) April 20, 2018 www.xilinx.com Table of Contents Chapter 1: Introduction Embedded Design Methodology Checklist. 9 Accessing Documentation and Training . 10 Chapter 2: System Level Considerations Performance. 13 Power Consumption . 18 Clocking and Reset. 36 Interrupts . 41 Embedded Device Security . 45 Profiling and Partitioning . 51 Chapter 3: Hardware Design Considerations Configuration and Boot Devices . 63 Memory Interfaces . 69 Peripherals . 76 Designing IP Blocks . 94 Hardware Performance Considerations . 102 Dataflow . 108 PL Clocking Methodology . 112 ACP and Cache Coherency. 116 PL High-Performance Port Access. 120 System Management Hardware Assistance. 124 Managing Hardware Reconfiguration . 127 GPs and Direct PL Access from APU . 133 Chapter 4: Software Design Considerations Processor Configuration . 137 OS and RTOS Choices . 142 Libraries and Middleware . 152 Boot Loaders . 156 Software Development Tools . 162 UltraFast Embedded Design Methodology GuideSend Feedback 3 UG1046 (v2.3) April 20, 2018 www.xilinx.com Chapter 5: Hardware Design Flow Overview . -
AMNESIA 33: How TCP/IP Stacks Breed Critical Vulnerabilities in Iot
AMNESIA:33 | RESEARCH REPORT How TCP/IP Stacks Breed Critical Vulnerabilities in IoT, OT and IT Devices Published by Forescout Research Labs Written by Daniel dos Santos, Stanislav Dashevskyi, Jos Wetzels and Amine Amri RESEARCH REPORT | AMNESIA:33 Contents 1. Executive summary 4 2. About Project Memoria 5 3. AMNESIA:33 – a security analysis of open source TCP/IP stacks 7 3.1. Why focus on open source TCP/IP stacks? 7 3.2. Which open source stacks, exactly? 7 3.3. 33 new findings 9 4. A comparison with similar studies 14 4.1. Which components are typically flawed? 16 4.2. What are the most common vulnerability types? 17 4.3. Common anti-patterns 22 4.4. What about exploitability? 29 4.5. What is the actual danger? 32 5. Estimating the reach of AMNESIA:33 34 5.1. Where you can see AMNESIA:33 – the modern supply chain 34 5.2. The challenge – identifying and patching affected devices 36 5.3. Facing the challenge – estimating numbers 37 5.3.1. How many vendors 39 5.3.2. What device types 39 5.3.3. How many device units 40 6. An attack scenario 41 6.1. Other possible attack scenarios 44 7. Effective IoT risk mitigation 45 8. Conclusion 46 FORESCOUT RESEARCH LABS RESEARCH REPORT | AMNESIA:33 A note on vulnerability disclosure We would like to thank the CERT Coordination Center, the ICS-CERT, the German Federal Office for Information Security (BSI) and the JPCERT Coordination Center for their help in coordinating the disclosure of the AMNESIA:33 vulnerabilities. -
B.Tech. CSE CBCS W.E.F. July, 2019
The Curriculum Book BACHELOR OF TECHNOLOGY I tn COMPUTER SCIENCE AND ENGINEERING FOUR YEAR PROGRAMME Choice Based Credit System vy. e. f. JuIy ZAlg (70:30) . ,_i 1 .I DEPARTMENT OF COMPUTER SCIENCE AI\D BNGINEERING GURU JAMBHESHWAR UNIVERSITY OF SCIENCE & TECHNOLOGY tr j HISAR.125OO1, HARYANA scheme & syllabi2019 GURU JAMBHESHWAR UNIVERSITY OF SCIENCE & TECHNOLOGY, HISAR (Established by state Legistature 'A',Grade,. Act 17 of lggs) NA.AC Accreditid state Govt. university Acad /AC-ilt,tFqc_1 Vot. 3DAlgJf 7 7 Dated: Ulfr:f To The Controller of Examinations GJUS&T, Hisar. sub: Approval of scheme of examination & syllabi of various B.Tech. progralle(sJ being run in university Teachiig Departments as welt as affil iated En g i neeri ng c oilege(s)/r nstitutelsy. AND Recommendations of Faculty Engineering open & Technology regarding Elective, Format of Minor Quu.ti;;-of papei Mooc strength for programme courses, minimum Erective, semester Registration etc. Sir, I am directed to inform you that the vice-chancellor, on the recommendations of the Faculty of Engineering & Technology, vide resolutions no. 2to 13 in its meeting held on 1B 07'2a19, is pleased to approve . the following scheme & syllabi of B.Tech. programme(s) w'e'f' the academic session batch / mentioned against each being run in University Teaching Departments as well as affiliated colleges/institutions and recommendations of Faculty of Engineering & Technolcgy, regarding open Elective, format of Minor Question Paper, Mooc courses, minimum strength for programme Elective' semester Registration etc under sectio n 11(5) in anticipation of approvat of the Acadenric councir of the University Act, 1995.- 1' B'Tech (Printing Technology), B Tec.h (Packaging Technology) (Printing & Packaging i""r'norogD-ath ""un',i""o,,,& B.Tech. -
OPERATING SYSTEMS.Ai
Introduction Aeroflex Gaisler provides LEON and ERC32 users with a wide range of popular embedded operating systems. Ranging from very small footprint task handlers to full featured Real-Time Operating System (RTOS). A summary of available operating systems and their characteristics is outlined below. VxWorks The VxWorks SPARC port supports LEON3/4 and LEON2. Drivers for standard on-chip peripherals are included. The port supports both non-MMU and MMU systems allowing users to program fast and secure applications. Along with the graphical Eclipse based workbench comes the extensive VxWorks documentation. • MMU and non-MMU system support • SMP support (in 6.7 and later) • Networking support (Ethernet 10/100/1000) • UART, Timer, and interrupt controller support • PCI, SpaceWire, CAN, MIL-STD-1553B, I2C and USB host controller support • Eclipse based Workbench • Commercial license ThreadX The ThreadX SPARC port supports LEON3/4 and its standard on-chip peripherals. ThreadX is an easy to learn and understand advanced pico-kernel real-time operating system designed specifically for deeply embedded applications. ThreadX has a rich set of system services for memory allocation and threading. • Non-MMU system support • Bundled with newlib C library • Support for NetX, and USBX ® • Very small footprint • Commercial license Nucleus Nucleus is a real time operating system which offers a rich set of features in a scalable and configurable manner. • UART, Timer, Interrupt controller, Ethernet (10/100/1000) • TCP offloading and zero copy TCP/IP stack (using GRETH GBIT MAC) • USB 2.0 host controller and function controller driver • Small footprint • Commercial license LynxOS LynxOS is an advanced RTOS suitable for high reliability environments. -
Real-Time Operating System Modelling and Simulation Using Systemc
Real-Time Operating System Modelling and Simulation Using SystemC Ke Yu Submitted for the degree of Doctor of Philosophy Department of Computer Science June 2010 Abstract Increasing system complexity and stringent time-to-market pressure bring chal- lenges to the design productivity of real-time embedded systems. Various System- Level Design (SLD), System-Level Design Languages (SLDL) and Transaction- Level Modelling (TLM) approaches have been proposed as enabling tools for real-time embedded system specification, simulation, implementation and verifi- cation. SLDL-based Real-Time Operating System (RTOS) modelling and simula- tion are key methods to understand dynamic scheduling and timing issues in real- time software behavioural simulation during SLD. However, current SLDL-based RTOS simulation approaches do not support real-time software simulation ade- quately in terms of both functionality and accuracy, e.g., simplistic RTOS func- tionality or annotation-dependent software time advance. This thesis is concerned with SystemC-based behavioural modelling and simu- lation of real-time embedded software, focusing upon RTOSs. The RTOS-centric simulation approach can support flexible, fast and accurate real-time software tim- ing and functional simulation. They can help software designers to undertake real- time software prototyping at early design phases. The contributions in this thesis are fourfold. Firstly, we propose a mixed timing real-time software modelling and simula- tion approach with various timing related techniques, which are suitable for early software modelling and simulation. We show that this approach not only avoids the accuracy drawback in some existing methods but also maintains a high simu- lation performance. Secondly, we propose a Live CPU Model to assist software behavioural timing modelling and simulation. -
Debugging Threadx RTOS Applications Using Tracex Contents
Application Note Renesas Synergy™ Platform R20AN0404EJ0112 Debugging ThreadX RTOS Applications Rev.1.12 Using TraceX Sep 10, 2018 ThreadX® is an RTOS from Express Logic which is based on a high-performance embedded kernel. This application note provides procedures to check ThreadX thread and object states (referred to as resources) during the development of applications in e2 studio for Renesas Synergy™. The procedure for starting TraceX® is also explained. For the ThreadX specifications and functions, visit the Express Logic (http://rtos.com/) website. For TraceX specifications and functions, visit the Synergy Software (https://www.renesas.com/us/en/products/synergy.html) page. Under the Development Tools tab, select TraceX. This application note explains examples using a project called Blinky with ThreadX that is available after installing the Renesas Synergy™ Software Package (SSP). For procedures covering operations with Blinky with ThreadX, see the Renesas Synergy™ e2 studio v6.2 or Greater Getting Started Guide available on the Synergy Solutions Gallery (https://www.renesas.com/us/en/products/synergy/gallery.html). This document describes general usage of e2 studio. This application note supports SSP version 1.4.0 and later and e2 studio version 6.2.0 and later. Target Environment The operations covered in this document were confirmed in the following environment. • Renesas SynergyTM Software Package (SSP) v1.4.0 or later • e2 studio for Renesas Synergy™ v6.2.0 or later • ThreadX (requires development/production license, see section 5.1, Licenses for ThreadX) • Development Kit for DK-S7G2 Synergy MCU Group R20AN0404EJ0112 Rev.1.12 Page 1 of 23 Sep 10, 2018 Renesas Synergy™ Platform Debugging ThreadX RTOS Applications Using TraceX Contents 1. -
D2.11 Report on RTOS Scheduling Revised
D2.11 Report on RTOS scheduling Revised Grant agreement no. 780785 Project acronym OFERA (micro-ROS) Project full title Open Framework for Embedded Robot Applications Deliverable number D2.11 Deliverable name Report on RTOS scheduling Date June 2020 Dissemination level public Workpackage and task WP2 - Task 2.4 Author Juan Flores Muñoz (eProsima) Contributors Francesca Finocchiaro (eProsima), Pablo Garrido Sanchez (eProsima) Keywords micro-ROS, robotics, ROS, microcontrollers, scheduling, real-time Abstract This document reviews the scheduling algorithms of- fered by the three RTOSes supported by micro-ROS and presents the scheduling architecture selected for the project. D2.11: Report on RTOS scheduling – Revised Contents 1 Summary 2 2 Acronyms and keywords 2 3 Introduction 2 4 Supported RTOS 2 4.1 NuttX ............................................. 3 4.2 FreeRTOS ........................................... 3 4.3 Zephyr ............................................ 4 5 Scheduling architecture 4 6 RTOS implementation 5 7 Conclusion and future steps. 5 1 D2.11: Report on RTOS scheduling – Revised 1 Summary This report is the sequel of the deliverable 2.10 (Report on RTOS scheduling-Initial) submitted in December 2018. Based on the previous deliverable, we will analyse the scheduling mechanisms that have been implemented within the micro-ROS project for each of the supported RTOSes, in order to achieve the required functionalities. 2 Acronyms and keywords Term Definition RTOS Real-Time Operating System OS Operating System DDS Data Distribution Service ROS Robot Operating System MCU Microcontroller unit AL Abstraction layer 3 Introduction Schedulers are software entities that manage the execution of processes using different techniques depending on the objectives. Their main task is to decide which process to execute at each time in the processing unit. -
Xenomai - Implementing a RTOS Emulation Framework on GNU/Linux Philippe Gerum First Edition Copyright © 2004
Xenomai - Implementing a RTOS emulation framework on GNU/Linux Philippe Gerum First Edition Copyright © 2004 Copyright © 2002 Philippe Gerum Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front- Cover Texts, and no Back-Cover Texts. A copy of the license is published on gnu.org: "GNU Free Documentation License" [http://www.gnu.org/licenses/ fdl.html]. April 2004 Abstract Generally speaking, the Xenomai technology first aims at helping application designers relying on traditional RTOS to move as smoothly as possible to a GNU/ Linux-based execution environment, without having to rewrite their application entirely. This paper discusses the motivations for proposing this framework, the general observations concerning the traditional RTOS directing this technology, and some in-depth details about its implementation. The Xenomai project has been launched in August 2001. It has merged in 2003 with the RTAI project [http://www.gna.org/projects/rtai/] to produce an industrial- grade real-time Free Software platform for GNU/Linux called RTAI/fusion, on top of Xenomai's abstract RTOS core. Eventually, the RTAI/fusion effort became independent from RTAI in 2005 as the xenomai project [http://www.gna.org/ projects/xenomai/]. Linux is a registered trademark of Linus Torvalds. Other trademarks cited in this paper are the property of their respective owner. 1 Xenomai - Implementing a RTOS emulation framework on GNU/Linux Table of Contents 1. White paper ................................................................................................. 2 1.1. -
Strategic Partnership with Chip Manufacturers
What’s new at Embedded Systems Conference 2007 Strategic Partnership with Chip Manufacturers When the first microcontrollers with on-chip de- Internationa committees bugging interface appeared on the market, the first PowerView debug solutions offered were relatively simple com- Many customers would like to see a higher level pared to the prevailing in-circuit emulators. It soon of standardization of the on-chip debug and trace became clear that pure debuggers without trigger logic as well as a reduction in pincount without any and trace options were not adequate for developing performance loss. In order to take an active role PowerDebug complex embedded designs efficiently. The scope in the development of innovative debug and trace of on-chip debugging and trace interfaces has been technologies, Lauterbach has been participating enlarged gradually, enabling very complex test and in various international committees over the past PowerTrace analysis functions with today’s development tools. years: • Lauterbach has been a member of the Nexus 5001™ Forum ever since its foundation and was first to market with tools conforming to the PowerProbe NEXUS specification. • In the Test & Debug Working Group of the MIPI Alliance, Lauterbach has been involved in the Power- definition of interfaces as well as corresponding Integrator test and debug tools for mobile phones. • Lauterbach has been an active member of the IEEE P1149.7 Working Group for the definition of new JTAG standards ever since its foundation. In 2006 Lauterbach was able to significantly staff up its engineering departments, further strength- ening its leadership position in high performance development tools for a wide range of processor architectures. -
TM4C Applications
From industrial Gateway to functional safety with TI Cortex based MCU Texas Instruments Inc. Nov, 2015 MCU Trends Ultra-low power • Pushing the limits of power consumption toward a world without batteries Real-time control • Enabling “green” end equipments that use less energy and operate more efficiently Communications • Connecting and automating home, building and industrial systems. Security • Securing data flow over all means of communication Safety • Bringing intelligence to safety-critical applications to prevent and protect Building a Stronger MCU Portfolio Low Power MCUs Performance MCUs Ultra-low Power Real-time Control Applications where the majority of device Applications needing low latency Ultra-low power life in standby closed loop control Real-time control Low Power Performance Control + Automation Mostly ‘On’ battery powered applicationsCommunicationsCommunicationsExpanding real-time control platforms with with significant computational requirements Host Control & Industrial Communications technology Security Security + Communications Hercules™ Safety Datalogging applications that transfer Safety Applications that require functional safety securely over RF TI Confidential - Maximum Restrictions Texas Instruments MCU Portfolio Hercules Tiva™ C C2000™ MSP Safety ARM® Series Real-time Low-power Cortex™-R4 ARM® control MCUs MCUs & Cortex-M3 Cortex™-M4F MCUs Includes dual-core MCUs ARM+DSP MCUs System expertise, integrated analog, software, tools, training and support 4 World’s Broadest Portfolio Wireless Connectivity Portfolio -
Tech Datasheet Using RTOS Simulator As a Development Platform
R Tech Datasheet DEVELOP AND TEST EMBEDDED APPLICATION ON WINDOWS OR LINUX HOST MACHINE MapuSoft’s RTOS Simulator allows engineers to develop and test commercial RTOS applications on Windows or Linux host environments. Most commercial RTOS’s are expensive to purchase and obtaining them from di¬erent sources is dicult and time consuming. Industry demands that students have experience with popular commercial RTOS’s without which the program and the students will be of little value to Industry. This is where MapuSoft’s RTOS Simulator™ can provide commercial RTOS environments at a very low price. RTOS Simulator eliminates the need for the for expensive target hardware while learning RTOS applications and testing. Using RTOS Simulator as a development platform CROSS_COMPILE, DOWLOAD AND TEST APPLICATIONS C/C++ Applications ON VARIOUS SUPPORTED TARGET HARDWARE MapuSoft’s RTOS Simulator allows engineers to generate R optimized RTOS hypervisor source code to enable Application OS Abstractor POSIX µITRON pSOS ThreadX Windows VxWorks Platform Interface Interface Interface Interface Interface Interface Interface Proler various RTOS applications to be tested and proled for Nucleus µC/OS FreeRTOS VRTX QNX RTLinux performance on Raspberry boards and other supported Interface Interface Interface Interface Interface Interface target hardware. The hypervisor code can be hosted on OS Abstractor Linux and FreeRTOS which are freely available for use. GNU/Eclipse/Mingw Tools Environment There is absolutely no need to purchase the actual OS Simulation Code Generation commercial RTOS’s for your hardware, as MapuSoft’s C/C++ Applications generated hypervisor code will support hosting various types of RTOS environment. This way, the students get Optimized good working experience on using an embedded target Cross-OS Interface and further be able to develop application prototypes Project Files RTOS SIMULATOR for their projects, thesis and other industry collaboration Cross Compilers work. -
MINITEE—A Lightweight Trustzone-Assisted TEE for Real-Time Systems
electronics Article MINITEE—A Lightweight TrustZone-Assisted TEE for Real-Time Systems Songran Liu 1,2 , Nan Guan 2, Zhishan Guo 3,* and Wang Yi 1 1 College of Computer Science and Engineering, Northeastern University, Shenyang 110819, China; [email protected] (S.L.); [email protected] (W.Y.) 2 Department of Computing, The Hong Kong Polytechnic University, Hong Kong 999077, China; [email protected] 3 Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816-2362, USA * Correspondence: [email protected] Received: 31 May 2020; Accepted: 8 July 2020; Published: 11 July 2020 Abstract: While trusted execution environments (TEEs) provide industry standard security and isolation, TEE requests through secure monitor calls (SMCs) attribute to large time overhead and weakened temporal predictability. Moreover, as current available TEE solutions are designed for Linux and/or Android initially, it will encounter many constraints (e.g., driver libraries incompatible, large memory footprint, etc.) when integrating with low-end Real-Time Operating Systems, RTOSs. In this paper, we present MINITEE to understand, evaluate and discuss the benefits and limitations when integrating TrustZone-assisted TEEs with RTOSs. We demonstrate how MINITEE can be adequately exploited for meeting the real-time needs, while presenting a low performance overhead to the rich OSs (i.e., low-end RTOSs). Keywords: real-time system; ARM TrustZone; trusted execution environment 1. Introduction As real-time embedded systems become more complex and interconnected, certain sections or parts of the systems may need to be protected to prevent unauthorized access, or isolated to ensure functional/non-functional correctness.