DOCSLIB.ORG

Programming with CUDA

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Programming with CUDA Programming with CUDA Jens K. Mueller [email protected] Department of Mathematics and Computer Science Friedrich-Schiller-University Jena Tuesday 31st May, 2011 Today’s lecture: Analyzing Parallel Algorithms Sequential Machine Models Well established models sequential models of computability I Turing machine I Random Access Machine (RAM) I µ-recursive functions I λ-calculus All these notions of computability are Turing equivalent. Church hypothesis: "Every function that is computable is computable by a Turing machine." 2011-05-31 – CUDA 3 / 20 Parallel Machine Models I Directed acyclic graph I Networking models CPUs directly connected I Parallel Random Access Machine (PRAM) RAMs only connected via infinite shared memory I Exclusive Read Exclusive Write (EREW) I Concurrent Read Exclusive Write (CREW) I Concurrent Read Concurrent Write (CRCW) I Common Concurrent Read Concurrent Write I Arbitrary Concurrent Read Concurrent Write I Priority Concurrent Read Concurrent Write I Associative Concurrent Read Concurrent Write I ... Algorithm analysis for one model may not adapt to another model. 2011-05-31 – CUDA 4 / 20 Algorithm Analysis I Run-Time analysis I Space analysis in dependence to input size I Worst Case I Average Case I Best Case I Amortized Average time per operation over a worst-case sequence of operations. 2011-05-31 – CUDA 5 / 20 Big O Notation I f (n) ∈ O(g(n)) There exists a c for all n > n0 such that f (n) ≤ c · g(n). f is asymptotically bounded above by g (up to a constant factor). I f (n) ∈ Ω(g(n)) There exists a c for all n > n0 such that f (n) ≥ c · g(n). f is asymptotically bounded below by g (up to a constant factor). 2011-05-31 – CUDA 6 / 20 Big O Notation (cont.) I f (n) ∈ Θ(g(n)) There exists a c1, c2 for all n > n0 such that c1 · g(n) ≤ f (n) ≤ c2 · g(n). f is asymptotically bounded above and below by g (up to a constant factors). Shorthand for: f (n) ∈ O(g(n)) and f (n) ∈ Ω(g(n)). 2011-05-31 – CUDA 7 / 20 Parallel RAM I Infinite processors I Infinite memory I Constant Random Access I Processors clock is synchronized I Instructions: Read, Compute, Write I Run-time analysis dependent on input size and number of processors 2011-05-31 – CUDA 8 / 20 Running Time Definition (Sequential Running Time) Given a problem P. Then T is the best known running time of an sequential algorithm that solves P. Definition (Parallel Running Time) Given a problem P. Then Tp is the best known running time of an parallel algorithm using p processors that solves P. 2011-05-31 – CUDA 9 / 20 Parallel Speedup Definition (Parallel Speedup) T Sp := Tp where T is the running time of the best known sequential algorithm and Tp is the running time of a parallel algorithm using p processors. Lemma Sp ≤ p The parallel speedup can never be larger than the number of processors. Ideal speedup is p (linear speedup; n-times faster with n-times more processors). 2011-05-31 – CUDA 10 / 20 Parallel Efficiency Definition (Parallel Efficiency) The efficiency of an parallel algorithm is S E = p p p Corollary Ep ≤ 1 2011-05-31 – CUDA 11 / 20 Parallel Cost Definition (Parallel Cost) The cost of an parallel algorithm is Cp := p · Tp i.e., the product of parallel running time and the number of processors. Lemma The costs of an parallel algorithm are greater than the sequential running time: T ≤ Cp 2011-05-31 – CUDA 12 / 20 Parallel Work Definition (Parallel Work) The work of an parallel algorithm W is the total number of executed operations over all processors. Lemma W ≤ Cp Proof. PTp PTp W = i=1 Wi ≤ i=1 p = p · Tp = Cp Wi ≤p 2011-05-31 – CUDA 13 / 20 Work Optimality Definition (Work optimal) A parallel algorithm is work optimal if W = T . 2011-05-31 – CUDA 14 / 20 Cost Optimality Definition (Cost optimal) A parallel algorithm is cost optimal if Cp = T . Corollary For a parallel cost optimal algorithm it follows Sp = p and Ep = 1. Cost optimality implies linear speedup. Example (Summation) I Sequential summation is cost optimal since C1 = 1 · T = 1 · n = O(n) I Parallel summation (using a binary tree) is not cost optimal since Cn = n · log n = O(n · log n) 6= O(n) 2011-05-31 – CUDA 15 / 20 Sorting I T = O(n log n) I Cost optimal algorithms I p = O(n) and Tp = O(log n) n 2 I p = O( log n ) and Tp = O(log n) 2 I Using O(n ) and Tp = O(1) is not cost optimal. I Cost optimality takes care of the number of used processors. Important when there are fewer processors. 2011-05-31 – CUDA 16 / 20 Brent’s Theorem Theorem (Brent) A parallel algorithm using p processors with time Tp and work W can be executed on p0 < p processors with time W 0 Tp = Tp + b p0 c. Brent’s Theorem allows changing the number of processors for a given parallel algorithm. Example (Parallel Reduction (using a binary tree)) 0 n Tp = O(log n). Set p = O( log ). Then O(n) Tp0 = O(log n) + b n c = O(log n) + O(log n) = O(log n). O( log n ) Then the parallel reduction is cost optimal, i.e. n 0 Cp = O(log n) ·O( log n ) = O(n). 2011-05-31 – CUDA 17 / 20 Amdahl’s Law Assume T = 1 and fraction x of the sequential algorithm can be parallelized using p processors. x Then Tp = (1 − x) + . | {z } p sequential part |{z} parallel part Overall speedup is 1 x (1 − x) + p I Based on fixed input 2011-05-31 – CUDA 18 / 20 Amdahl’s Law (cont.) 10 x = 0.5 9 x = 0.6 x = 0.7 8 x = 0.8 x = 0.9 7 6 5 speedup 4 3 2 1 1 4 16 64 256 1024 4096 16384 65536 # processors Figure: Amdahl’s Law 2011-05-31 – CUDA 19 / 20 Questions?.
Load more

Recommended publications
  • Chapter 4 Algorithm Analysis
    Chapter 4 Algorithm Analysis In this chapter we look at how to analyze the cost of algorithms in a way that is useful for comparing algorithms to determine which is likely to be better, at least for large input sizes, but is abstract enough that we don’t have to look at minute details of compilers and machine architectures. There are a several parts of such analysis. Firstly we need to abstract the cost from details of the compiler or machine. Secondly we have to decide on a concrete model that allows us to formally define the cost of an algorithm. Since we are interested in parallel algorithms, the model needs to consider parallelism. Thirdly we need to understand how to analyze costs in this model. These are the topics of this chapter. 4.1 Abstracting Costs When we analyze the cost of an algorithm formally, we need to be reasonably precise about the model we are performing the analysis in. Question 4.1. How precise should this model be? For example, would it help to know the exact running time for each instruction? The model can be arbitrarily precise but it is often helpful to abstract away from some details such as the exact running time of each (kind of) instruction. For example, the model can posit that each instruction takes a single step (unit of time) whether it is an addition, a division, or a memory access operation. Some more advanced models, which we will not consider in this class, separate between different classes of instructions, for example, a model may require analyzing separately calculation (e.g., addition or a multiplication) and communication (e.g., memory read).
    [Show full text]
  • Introduction to Parallel Computing, 2Nd Edition
    732A54 Traditional Use of Parallel Computing: Big Data Analytics Large-Scale HPC Applications n High Performance Computing (HPC) l Much computational work (in FLOPs, floatingpoint operations) l Often, large data sets Introduction to l E.g. climate simulations, particle physics, engineering, sequence Parallel Computing matching or proteine docking in bioinformatics, … n Single-CPU computers and even today’s multicore processors cannot provide such massive computation power Christoph Kessler n Aggregate LOTS of computers à Clusters IDA, Linköping University l Need scalable parallel algorithms l Need to exploit multiple levels of parallelism Christoph Kessler, IDA, Linköpings universitet. C. Kessler, IDA, Linköpings universitet. NSC Triolith2 More Recent Use of Parallel Computing: HPC vs Big-Data Computing Big-Data Analytics Applications n Big Data Analytics n Both need parallel computing n Same kind of hardware – Clusters of (multicore) servers l Data access intensive (disk I/O, memory accesses) n Same OS family (Linux) 4Typically, very large data sets (GB … TB … PB … EB …) n Different programming models, languages, and tools l Also some computational work for combining/aggregating data l E.g. data center applications, business analytics, click stream HPC application Big-Data application analysis, scientific data analysis, machine learning, … HPC prog. languages: Big-Data prog. languages: l Soft real-time requirements on interactive querys Fortran, C/C++ (Python) Java, Scala, Python, … Programming models: Programming models: n Single-CPU and multicore processors cannot MPI, OpenMP, … MapReduce, Spark, … provide such massive computation power and I/O bandwidth+capacity Scientific computing Big-data storage/access: libraries: BLAS, … HDFS, … n Aggregate LOTS of computers à Clusters OS: Linux OS: Linux l Need scalable parallel algorithms HW: Cluster HW: Cluster l Need to exploit multiple levels of parallelism l Fault tolerance à Let us start with the common basis: Parallel computer architecture C.
    [Show full text]
  • Oblivious Network RAM and Leveraging Parallelism to Achieve Obliviousness
    Oblivious Network RAM and Leveraging Parallelism to Achieve Obliviousness Dana Dachman-Soled1,3 ∗ Chang Liu2 y Charalampos Papamanthou1,3 z Elaine Shi4 x Uzi Vishkin1,3 { 1: University of Maryland, Department of Electrical and Computer Engineering 2: University of Maryland, Department of Computer Science 3: University of Maryland Institute for Advanced Computer Studies (UMIACS) 4: Cornell University January 12, 2017 Abstract Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely access untrusted memory, such that the access patterns reveal nothing about sensitive data. ORAM is known to have broad applications in secure processor design and secure multi-party computation for big data. Unfortunately, due to a logarithmic lower bound by Goldreich and Ostrovsky (Journal of the ACM, '96), ORAM is bound to incur a moderate cost in practice. In particular, with the latest developments in ORAM constructions, we are quickly approaching this limit, and the room for performance improvement is small. In this paper, we consider new models of computation in which the cost of obliviousness can be fundamentally reduced in comparison with the standard ORAM model. We propose the Oblivious Network RAM model of computation, where a CPU communicates with multiple memory banks, such that the adversary observes only which bank the CPU is communicating with, but not the address offset within each memory bank. In other words, obliviousness within each bank comes for free|either because the architecture prevents a malicious party from ob- serving the address accessed within a bank, or because another solution is used to obfuscate memory accesses within each bank|and hence we only need to obfuscate communication pat- terns between the CPU and the memory banks.
    [Show full text]
  • An External-Memory Work-Depth Model and Its Applications to Massively Parallel Join Algorithms
    An External-Memory Work-Depth Model and Its Applications to Massively Parallel Join Algorithms Xiao Hu Ke Yi Paraschos Koutris Hong Kong University of Science and Technology University of Wisconsin-Madison (xhuam,yike)@cse.ust.hk [email protected] ABSTRACT available. This allows us to better focus on the inherent parallel The PRAM is a fundamental model in parallel computing, but it is complexity of the algorithm. On the other hand, given a particular p, seldom directly used in parallel algorithm design. Instead, work- an algorithm with work W and depth d can be optimally simulated depth models have enjoyed much more popularity, as they relieve on the PRAM in O¹d + W /pº steps [11–13]. Thirdly, work-depth algorithm designers and programmers from worrying about how models are syntactically similar to many programming languages various tasks should be assigned to each of the processors. Mean- supporting parallel computing, so algorithms designed in these while, they also make it easy to study the fundamental parallel models can be more easily implemented in practice. complexity of the algorithm, namely work and depth, which are The PRAM can be considered as a fine-grained parallel model, irrelevant to the number of processors available. where in each step, each processor carries out one unit of work. The massively parallel computation (MPC) model, which is a However, today’s massively parallel systems, such as MapReduce simplified version of the BSP model, has drawn a strong interest and Spark, are better captured by a coarse-grained model. The first in recent years, due to the widespread popularity of many big data coarse-grained parallel model is the bulk synchronous parallel (BSP) systems based on such a model.
    [Show full text]
  • Introduction to Parallel Computing
    732A54 / TDDE31 Big Data Analytics Introduction to Parallel Computing Christoph Kessler IDA, Linköping University Christoph Kessler, IDA, Linköpings universitet. Traditional Use of Parallel Computing: Large-Scale HPC Applications High Performance Computing (HPC) Much computational work (in FLOPs, floatingpoint operations) Often, large data sets E.g. climate simulations, particle physics, engineering, sequence matching or proteine docking in bioinformatics, … Single-CPU computers and even today’s multicore processors cannot provide such massive computation power Aggregate LOTS of computers → Clusters Need scalable parallel algorithms Need exploit multiple levels of parallelism C. Kessler, IDA, Linköpings universitet. NSC Tetralith2 More Recent Use of Parallel Computing: Big-Data Analytics Applications Big Data Analytics Data access intensive (disk I/O, memory accesses) Typically, very large data sets (GB … TB … PB … EB …) Also some computational work for combining/aggregating data E.g. data center applications, business analytics, click stream analysis, scientific data analysis, machine learning, … Soft real-time requirements on interactive querys Single-CPU and multicore processors cannot provide such massive computation power and I/O bandwidth+capacity Aggregate LOTS of computers → Clusters Need scalable parallel algorithms Need exploit multiple levels of parallelism Fault tolerance C. Kessler, IDA, Linköpings universitet. NSC Tetralith3 HPC vs Big-Data Computing Both need parallel computing Same kind of hardware – Clusters of (multicore) servers Same OS family (Linux) Different programming models, languages, and tools HPC application Big-Data application HPC prog. languages: Big-Data prog. languages: Fortran, C/C++ (Python) Java, Scala, Python, … Par. programming models: Par. programming models: MPI, OpenMP, … MapReduce, Spark, … Scientific computing Big-data storage/access: libraries: BLAS, … HDFS, … OS: Linux OS: Linux HW: Cluster HW: Cluster → Let us start with the common basis: Parallel computer architecture C.
    [Show full text]
  • Parallel Functional Arrays
    Parallel Functional Arrays Ananya Kumar Guy E. Blelloch Robert Harper Carnegie Mellon University, USA Carnegie Mellon University, USA Carnegie Mellon University, USA [email protected] [email protected] [email protected] Abstract ment with logarithmic time accesses and updates using balanced The goal of this paper is to develop a form of functional arrays trees, but it seems that getting both accesses and updates in con- (sequences) that are as efficient as imperative arrays, can be used stant time cannot be achieved without some form of language ex- in parallel, and have well defined cost-semantics. The key idea is tension. This means that algorithms for many fundamental prob- to consider sequences with functional value semantics but non- lems are a logarithmic factor slower in functional languages than in functional cost semantics. Because the value semantics is func- imperative languages. This includes algorithms for basic problems tional, “updating” a sequence returns a new sequence. We allow such as generating a random permutation, and for many important operations on “older” sequences (called interior sequences) to be graph problems (e.g., shortest-unweighted-paths, connected com- more expensive than operations on the “most recent” sequences ponents, biconnected components, topological sort, and cycle de- (called leaf sequences). tection). Simple algorithms for these problems take linear time in We embed sequences in a language supporting fork-join paral- the imperative setting, but an additional logarithmic factor in time lelism. Due to the parallelism, operations can be interleaved non- in the functional setting, at least without extensions. deterministically, and, in conjunction with the different cost for in- A variety of approaches have been suggested to alleviate this terior and leaf sequences, this can lead to non-deterministic costs problem.
    [Show full text]
  • Oblivious Parallel RAM and Applications
    Oblivious Parallel RAM and Applications 1? 2?? 3??? Elette Boyle , Kai-Min Chung , and Rafael Pass y 1 IDC Herzliya, [email protected] 2 Academica Sinica, [email protected] 3 Cornell University, [email protected] Abstract. We initiate the study of cryptography for parallel RAM (PRAM) programs. The PRAM model captures modern multi-core architectures and cluster computing models, where several processors execute in par- allel and make accesses to shared memory, and provides the \best of both" circuit and RAM models, supporting both cheap random access and parallelism. We propose and attain the notion of Oblivious PRAM. We present a compiler taking any PRAM into one whose distribution of memory ac- cesses is statistically independent of the data (with negligible error), while only incurring a polylogarithmic slowdown (in both total and par- allel complexity). We discuss applications of such a compiler, building upon recent advances relying on Oblivious (sequential) RAM (Goldreich Ostrovsky JACM'12). In particular, we demonstrate the construction of a garbled PRAM compiler based on an OPRAM compiler and secure identity-based encryption. 1 Introduction Completeness results in cryptography provide general transformations from arbitrary functionalities described in a particular computational model, to solutions for executing the functionality securely within a de- sired adversarial model. Classic results, stemming from [Yao82,GMW87], ? The research of the first author has received funding from the European Union's Tenth Framework Programme (FP10/ 2010-2016) under grant agreement no. 259426 ERC-CaC, and ISF grant 1709/14. Supported by the ERC under the EU's Seventh Framework Programme (FP/2007-2013) ERC Grant Agreement n.
    [Show full text]
  • Parallel Programming
    Parallel Programming SCPD Master Module Emil Slusanschi [email protected] University Politehnica of Bucharest Acknowledgement The material in this course has been adapted from various (cited) authoritative sources by Lawrence Rauchwerger from the Parasol Lab and myself and is used with his approval The presentation has been put together with the help of Dr. Mauro Bianco, Antoniu Pop, Tim Smith and Nathan Thomas from the Parasol Lab at Texas A&M University 1 Grading@PP Activity during lectures – 1 point – Presence in class for the lectures is compulsory but does not insure the point – you have to (try to) participate actively Project work – 5 points – Similar to APP: 3/coding, 1/documentation, 1/presentation, 1/bonus – Topics from subjects related to the PP – Teams of 2-3 people – independent grading – Subject can also be done in the “research” hours – at the end a paper/presentation should emerge Oral exam – 4 points – 5-10 minutes / person – 2-3 subjects from the lecture – Can be replaced by holding a talk during the semester on a topic agreed with me in advance “Your” Feedback Last year’s feedback: – Important because you learn how to present ideas in precise and accurate English – Team work experience is vital – Working on big SW projects is important – Improvements required: Hard rules & deadlines Periodic evaluation of individual effort Learn during the whole year (3 week session) Put emphasis on reading… Individual oral exam 2 Deadlines Choosing the Project: – Soft-deadline 31.10 – Hard-deadline 7.11 Project Status – Agreed at the lab by each team Project Submission – The only Deadline: 4.01.2011 – Project Presentations on 4.01 & 11.01 Project Work Roadmap One page project description (pdf + trac) due 7.11.2010 – Introduction: A one paragraph description of the significance of the application.
    [Show full text]
  • Oblivious Network
    J Cryptol (2019) 32:941–972 https://doi.org/10.1007/s00145-018-9301-4 Oblivious Network RAM and Leveraging Parallelism to Achieve Obliviousness Dana Dachman-Soled Department of Electrical and Computer Engineering, University of Maryland, College Park, USA University of Maryland Institute for Advanced Computer Studies (UMIACS), College Park, USA [email protected] Chang Liu University of California, Berkeley, USA [email protected] Charalampos Papamanthou Department of Electrical and Computer Engineering, University of Maryland, College Park, USA University of Maryland Institute for Advanced Computer Studies (UMIACS), College Park, USA [email protected] Elaine Shi Cornell University, Ithaca, USA [email protected] Uzi Vishkin Department of Electrical and Computer Engineering, University of Maryland, College Park, USA University of Maryland Institute for Advanced Computer Studies (UMIACS), College Park, USA [email protected] Communicated by Alon Rosen. Received 13 December 2016 / Revised 7 May 2018 Online publication 9 August 2018 Abstract. Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely access untrusted memory, such that the access patterns reveal nothing about sensitive data. ORAM is known to have broad applications in secure processor design and secure multiparty computation for big data. Unfortunately, due to a logarith- mic lower bound by Goldreich and Ostrovsky (J ACM 43(3):431–473, 1996), ORAM is bound to incur a moderate cost in practice. In particular, with the latest developments in ORAM constructions, we are quickly approaching this limit, and the room for perfor- mance improvement is small. In this paper, we consider new models of computation in which the cost of obliviousness can be fundamentally reduced in comparison with the standard ORAM model.
    [Show full text]
  • Effective Data Parallel Computing on Multicore Processors
    EFFECTIVE DATA PARALLEL COMPUTING ON MULTICORE PROCESSORS by Jong-Ho Byun A dissertation submitted to the faculty of The University of North Carolina at Charlotte in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering Charlotte 2010 Approved by: ______________________________ Dr. Arun Ravindran ______________________________ Dr. Arindam Mukherjee ______________________________ Dr. Bharat Joshi ______________________________ Dr. Gabor Hetyei ii ©2010 Jong-Ho Byun ALL RIGHTS RESERVED iii ABSTRACT JONG-HO BYUN. Effective data parallel computing on multicore processors. (Under direction of DR. ARUN RAVINDRAN) The rise of chip multiprocessing or the integration of multiple general purpose processing cores on a single chip (multicores), has impacted all computing platforms including high performance, servers, desktops, mobile, and embedded processors. Programmers can no longer expect continued increases in software performance without developing parallel, memory hierarchy friendly software that can effectively exploit the chip level multiprocessing paradigm of multicores. The goal of this dissertation is to demonstrate a design process for data parallel problems that starts with a sequential algorithm and ends with a high performance implementation on a multicore platform. Our design process combines theoretical algorithm analysis with practical optimization techniques. Our target multicores are quad-core processors from Intel and the eight-SPE IBM Cell B.E. Target applications include Matrix Multiplications (MM), Finite Difference Time Domain (FDTD), LU Decomposition (LUD), and Power Flow Solver based on Gauss-Seidel (PFS-GS) algorithms. These applications are popular computation methods in science and engineering problems and are characterized by unit-stride (MM, LUD, and PFS-GS) or 2-point stencil (FDTD) memory access pattern.
    [Show full text]
  • Parallel Computation Models Parallel Computation Models
    Parallel Computation Models • PRAM (parallel RAM) Parallel Computation Models • Fixed Interconnection Network – bus, ring, mesh, hypercube, shuffle-exchange • Boolean Circuits Lecture 3 • Combinatorial Circuits Lecture 4 • BSP • LOGP Slide 1 Slide 2 TYPES OF MULTIPROCESSING FRAMEWORKS PARALLEL DISTRIBUTED PARALLEL AND DISTRIBUTED COMPUTATION TECHNICAL ASPECTS • MANY INTERCONNECTED PROCESSORS WORKING CONCURRENTLY •PARALLEL COMPUTERS (USUALLY) WORK IN TIGHT SYNCRONY, SHARE MEMORY TO A LARGE EXTENT AND HAVE A VERY FAST AND RELIABLE COMMUNICATION MECHANISMBETWEEN THEM. • DISTRIBUTED COMPUTERS ARE MORE INDEPENDENT, COMMUNICATION IS LESS P4 P5 FREQUENT AND LESS SYNCRONOUS, AND THE COOPERATION IS LIMITED. P3 PURPOSES • PARALLEL COMPUTERS COOPERATE TO SOLVE MORE EFFICIENTLY (POSSIBLY) DIFFICULT PROBLEMS INTERCONNECTION NETWORK • DISTRIBUTED COMPUTERS HAVE INDIVIDUAL GOALS AND PRIVATE ACTIVITIES. SOMETIME COMMUNICATIONS WITH OTHER ONES ARE NEEDED. (E. G. DISTRIBUTED DA TA BASE OPERATIONS). P2 PARALLEL COMPUTERS: COOPERATION IN A POSITIVE SENSE P1 . Pn DISTRIBUTED COMPUTERS: COOPERATION IN A NEGATIVE SENSE, ONLY WHEN IT IS NECESSARY • CONNECTION MACHINE • INTERNET Connects all the computers of the world Slide 3 Slide 4 FOR PARALLEL SYSTEMS PARALLEL ALGORITHMS WE ARE INTERESTED TO SOLVE ANY PROBLEM IN PARALLEL • WHICH MODEL OF COMPUTATION IS THE BETTER TO USE? FOR DISTRIBUTED SYSTEMS • HOW MUCH TIME WE EXPECT TO SAVE USING A PARALLEL ALGORITHM? WE ARE INTERESTED TO SOLVE IN PARALLEL • HOW TO CONSTRUCT EFFICIENT ALGORITHMS? PARTICULAR PROBLEMS ONLY,
    [Show full text]
  • A Practical Hierarchial Model of Parallel Computation: the Model
    Syracuse University SURFACE Electrical Engineering and Computer Science - Technical Reports College of Engineering and Computer Science 2-1991 A Practical Hierarchial Model of Parallel Computation: The Model Todd Heywood Sanjay Ranka Syracuse University Follow this and additional works at: https://surface.syr.edu/eecs_techreports Part of the Computer Sciences Commons Recommended Citation Heywood, Todd and Ranka, Sanjay, "A Practical Hierarchial Model of Parallel Computation: The Model" (1991). Electrical Engineering and Computer Science - Technical Reports. 123. https://surface.syr.edu/eecs_techreports/123 This Report is brought to you for free and open access by the College of Engineering and Computer Science at SURFACE. It has been accepted for inclusion in Electrical Engineering and Computer Science - Technical Reports by an authorized administrator of SURFACE. For more information, please contact [email protected]. SU-CIS-91-06 A Practical Hierarchial Model of Parallel Computation: The Model Todd Heywood and Sanjay Ranka February 1991 School of Computer and Information Science Suite 4-116 Center for Science and Technology Syracuse, New York 13244-4100 (315) 443-2368 A Practical Hierarchical Model of Parallel Computation: The Model Todd Heywood and Sanjay Ranka School of Computer and Information Science Syracuse University Syracuse, NY 13244 Email: heywoodGtop. cis. syr. edu and rankaOtop. cis. syr. edu February 26, 1991 Abstract We introduce a model of parallel computation that retains the ideal properties of the PRAM by using it as a sub-model, while simultaneously being more reflective of realistic paral­ lel architectures by accounting for and providing abstract control over communication and synchronization costs. The Hierarchical PRAM (H-PRAM) model controls conceptual com­ plexity in the face of asynchrony in two ways.
    [Show full text]