Energy-Harvesting Powered Variable Storage Topology for Battery-Free Wireless Sensors †

technologies

Article Energy-Harvesting Powered Variable Storage Topology for Battery-Free Wireless Sensors †

Firdaous El Mahboubi *, Marise Baﬂeur, Vincent Boitier * and Jean-Marie Dilhac

LAAS-CNRS, Université de Toulouse, CNRS, INSA, UPS, 31042 Toulouse, France; marise.bafl[email protected] (M.B.); [email protected] (J.-M.D.) * Correspondence: [email protected] or fi[email protected] (F.E.M.); [email protected] (V.B.) † El Mahboubi, F.; Bafleur, M.; Boitier, V.; Dilhac, J.-M. Energy-Harvesting Powered Variable Storage Topology for Battery-Free Wireless Sensors. In Proceedings of the IEEE International Conference on Modern Circuits and Systems Technologies (MOCAST2018) on Electronics and Communications, Thessaloniki, Greece, 7–9 May 2018; doi:10.1109/MOCAST.2018.8376624.

Received: 29 October 2018; Accepted: 13 November 2018; Published: 16 November 2018

Abstract: The energy autonomy of wireless sensors is one of the main roadblocks to their wide deployment. The purpose of this study is to propose simple adaptive storage architecture, which combined with energy harvesting, could replace a battery. The main concept is based on using several ultracapacitors (at least two) that are reconﬁgured in a series or in parallel according to its state of charge/discharge, either to speed up the startup of the powered system or to provide energy autonomy. The proposed structure is based on two ultra-capacitors, one of small capacitance value and one of big value. Powered by an energy-harvesting source, the devised control circuitry allows cold start up with empty ultra-capacitors, pre-regulated output voltage, and energy usage efﬁciency close to 94.7%.

Keywords: energy harvesting; autonomy; variable energy storage; ultra-capacitors; wireless sensor

1. Introduction The energy autonomy of wireless sensors is one of the main roadblocks to their wide deployment in the different following areas: structural health monitoring (SHM) in severe environment such as aeronautics [1] or in building or infrastructure such as bridges with very long lifetime (>25 years) [2]. A way to strengthen the energy autonomy of these systems is to use energy harvesting from the surrounding environment coupled to a storage unit. The device used for storage is either a battery or an ultra-capacitor. In some cases, ultra-capacitors are more interesting than batteries: in conditions of extreme temperatures (in specific locations of an aircraft); in terms of safety (batteries may cause fire or explode); the peak power that can deliver ultra-capacitors is significantly larger than that of batteries (high power density); high charge/discharge efficiency and lifetime much greater (up to 500,000 cycles) than that of a battery (3000 to 4000 cycles). Even if the new technologies of low-power integrated circuits have made it possible to extend their lifetime, the replacement of hundreds or even thousands of batteries is not economically viable. Moreover, getting rid of primary batteries to avoid costly maintenance would be a must. However, the storage in ultra-capacitor has some drawbacks and requires a compromise to satisfy two important objectives: a sufficient voltage during the initial charge must be rapidly reached (small capacitance) to get and maintain the powered system operational as quickly as possible and a large amount of energy should be stored (big capacitance) to increase its energy autonomy. A self-adaptive storage architecture consisting of four ultra-capacitors (UCs) was already proposed to address these constraints [3]. This structure is based on reconfiguring the storage elements from all

Technologies 2018, 6, 106; doi:10.3390/technologies6040106 www.mdpi.com/journal/technologies Technologies 2018, 6, 106 2 of 13

Technologies 2018, 6, x 2 of 13 in-series to all in-parallel and reversely according to the availability of harvested energy and to the loadenergy consumption. and to the Thisload autonomous consumption. adaptive This autonomous storage strategy adaptive allows astorage fast start-up strategy and allows an increased a fast energystart-up usage and an (~10%) increased compared energy to usage a single (~10%) big capacitor. compared However, to a single it does big capacitor. not provide However, a pre-regulated it does voltagenot provide and inducesa pre-regulated abrupt voltagevoltage changesand induces upon ab capacitorrupt voltage switching changes that upon could capacitor induce unwantedswitching perturbations.that could induce We unwanted propose a perturbations. variable storage We topology propose constituteda variable storage of only topology two ultra-capacitors, constituted of a smallonly two value ultra-capacitors, one (Csmall) and a a small large valuevalue oneone (C (Cbigsmall), which) and area large appropriately value one switched (Cbig), towhich provide are fastappropriately start-up of switched the system to toprovide be powered, fast start-up large energyof the system storage, to output be powered, voltage large pre-regulation, energy storage, and autonomyoutput voltage of the pre-regulation, system. and autonomy of the system.

2. Basic Operation Principle This adaptive storage system, aimed at supplyingsupplying a wireless sensor node poweredpowered byby ambientambient energy harvesting, is not new. new. Se Severalveral solutions solutions were were already already propos proposeded in in the the literature: literature: one one needs needs a avery very large large number number of of switches switches causing causing heavy heavy lo lossessses [4], [4], another another requires requires a a large number of ultra-capacitors [[5],5], andand a a third third one one uses uses a a complex comple architecturex architecture with with multi-stacked multi-stacked dc-dc dc-dc converters converters [6]. In[6]. this In paper,this paper, we propose we propose an alternative an alternativ and verye simpleand very self-adaptive simple self-adaptive energy storage energy architecture. storage Wearchitecture. analyze and We experimentally analyze and experimental compare twoly differentcompare architectures.two different architectures. 2.1. Basic Principle of Adaptive Storage 2.1. Basic Principle of Adaptive Storage The proposed adaptive storage system, schematically described in Figure1, is self-powered The proposed adaptive storage system, schematically described in Figure 1, is self-powered by by an energy-harvesting source and is composed of at least two ultra-capacitors (UCs). It is meant an energy-harvesting source and is composed of at least two ultra-capacitors (UCs). It is meant to to replace a battery. The basic idea is to adapt the size of the storage so that the system can start replace a battery. The basic idea is to adapt the size of the storage so that the system can start rapidly rapidly (small capacitance by implementing the different capacitor elements in series) but also provide (small capacitance by implementing the different capacitor elements in series) but also provide a a good autonomy (large capacitance by implementing the different capacitor elements in parallel). good autonomy (large capacitance by implementing the different capacitor elements in parallel). These conﬁguration changes require a control circuitry that should be able to operate at low voltage, These configuration changes require a control circuitry that should be able to operate at low voltage, since it is supplied by the energy stored in the ultra-capacitors. The main challenges of this adaptive since it is supplied by the energy stored in the ultra-capacitors. The main challenges of this adaptive storage system are twofold: storage system are twofold: • First, it should allow a cold startup operation that corresponds to the case when ultra-capacitors • First, it should allow a cold startup operation that corresponds to the case when ultra-capacitors are empty. are empty. • • Second, itsits architecturearchitecture shouldshould bebe optimizedoptimized toto minimizeminimize losses.losses.

Figure 1.1. BlockBlock diagram diagram of of the the proposed proposed self-powered self-powered adaptive adaptive storage storage architecture architecture (dashed-line (dashed-line block). 2.2. Referenceblock). Self-Adaptive Switched Architecture Storage with 4 Ultra-Capacitors

2.2. ReferenceThe reference Self-Adaptive architecture Switched already Arch proposeditecture Storage in a previous with 4 Ultra-Capacitors work [7] uses a matrix of four identical ultra-capacitors (Ci = C for I = 1, 2, 3, 4), interconnected by nine switches. As shown in Figure2, three The reference architecture already proposed in a previous work [7] uses a matrix of four Schottky diodes allow a default serial structure at start-up. identical ultra-capacitors (Ci = C for I = 1, 2, 3, 4), interconnected by nine switches. As shown in Figure 2, three Schottky diodes allow a default serial structure at start-up.

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DuringDuring thethe chargecharge phase,phase, thethe changechange ofof conﬁgurationconfiguration dependsdepends onon thethe statestate ofof chargecharge ofof thethe ultra-capacitorultra-capacitor connectedconnected toto groundground (V(VC4C4).). This allows for three different conﬁgurations:configurations: • • “All“All in-series”in-series” allowsallows fastfast startupstartup (C(Ceqeq = C/4) • • “Series-parallel”“Series-parallel” (C(Ceqeq = C) • eq • “All“All in-parallel”in-parallel” in in order order to maximizeto maximize the amount the amount of stored of energystored (Cenergyeq = 4 C)(C without = 4 C) increasing without V+increasing voltage. V+ voltage.

AndAnd converselyconversely forfor thethe dischargedischarge phase,phase, toto reducereduce thethe equivalentequivalent capacitancecapacitance ofof thethe architecturearchitecture andand useuse thethe storedstored energyenergy inin ultra-capacitorsultra-capacitors asas muchmuch as as possible. possible.

FigureFigure 2.2. ElectricalElectrical schematic schematic of ofthe the reference reference self-ada self-adaptiveptive switched switched architecture architecture with with4 UCs 4 (V+ UCs =

(V+VIN = V OUTIN =). VOUT).

ForFor thethe sakesake ofof simplicity,simplicity, thisthis self-adaptiveself-adaptive architecturearchitecture storagestorage doesdoes notnot includeinclude aa balancingbalancing circuit,circuit, thethe maximum maximum losses, losses, related related to theto the capacitance-value capacitance-value variability variability for a tolerancefor a tolerance range ofrange±50%, of being±50%, 2% being of the 2% relative of the storedrelative energy. stored To energy. characterize To characterize the efficiency the ofefficiency such reconfigurable of such reconfigurable storage, we havestorage, defined we have a figure defined of merit a figure called of themerit energy called usage the energy efficiency usage as follows:efficiency as follows:

EOUT , (1) η = , (1) EIN where EIN is the total energy supplied to the adaptive storage unit and EOUT is the energy actually whereprovidedEIN tois the the load. total energy supplied to the adaptive storage unit and EOUT is the energy actually providedThe global to the load.losses including the required control electronics and the losses in the ultra-capacitors resultThe in global93% energy losses usage including efficiency. the required This autonomo control electronicsus structure and insures the losses a very in thefast ultra-capacitors start-up, stores resulta high in amount 93% energy of energy, usage efﬁciency. and provides This autonomousa maximum structureenergy usage insures rate a very by limiting fast start-up, the residual stores a highenergy amount left in of the energy, ultra-capacitor. and provides However, a maximum it is quite energy complex usage rateand bythe limiting abrupt thevoltage residual variation energy at lefteach in configuration the ultra-capacitor. change However, may induce it is electrom quite complexagnetic and disturbances. the abrupt The voltage purpose variation of the at eachnew conﬁgurationproposed structure change that may is inducedescribed electromagnetic in the following disturbances. section is to The reduce purpose the complexity of the new and proposed at the structuresame time, that the is described power losses. in the followingIn addition, section this is proposed to reduce thestructure complexity exhibits and atless the abrupt same time, voltage the powervariations losses. and In provides addition, a thispre-regulated proposed structure voltage. exhibits less abrupt voltage variations and provides a pre-regulated voltage. 3. Proposed Self-Variable Storage Topology with 2 Ultra-Capacitors 3. Proposed Self-Variable Storage Topology with 2 Ultra-Capacitors The proposed storage topology requires only two ultra-capacitors, a small value one (Csmall) and The proposed storage topology requires only two ultra-capacitors, a small value one (Csmall) and a a large value one (Cbig), which are appropriately switched to provide both a fast start-up of the large value one (C ), which are appropriately switched to provide both a fast start-up of the system to system to be powered,big large energy storage, and output voltage pre-regulation. The energy stored in be powered, large energy storage, and output voltage pre-regulation. The energy stored in a capacitor a capacitor is Estored = ½CV². As a result, a given input power using a small value capacitor allows the is E = 1 CV2. As a result, a given input power using a small value capacitor allows the requested requestedstored voltage2 to reach across it much more rapidly than a single big capacitor. voltage to reach across it much more rapidly than a single big capacitor.

3.1.3.1. CircuitCircuit TopologyTopology TheThe topologytopology presented presented in in Figure Figure3 is 3 simple:is simple: it includes it includes a Schottky a Schottky diode diode to naturally to naturally ensure ensure the the initial charging of the small ultra-capacitor (Csmall) and three switches, which allow the initial charging of the small ultra-capacitor (Csmall) and three switches, which allow the reconﬁguration reconfiguration of the two ultra-capacitors with regard to the supplied power and to the load. The Schottky diode provides a low threshold voltage and unidirectional flow for the current.

Technologies 2018, 6, x 4 of 13 Technologies 2018, 6, 106 4 of 13 of the two ultra-capacitors with regard to the supplied power and to the load. The Schottky diode providesTechnologies a low 2018 threshold, 6, x voltage and unidirectional ﬂow for the current. 4 of 13

(a) (b)

Figure 3. Electrical schematic of (a) the proposed variable storage architecture with 2 UCs and (b) its control circuitry.

3.2. Operating Principle(a) (b) The principle of this variable storage architecture is to initially supply the small ultra-capacitor FigureFigure 3. Electrical 3. Electrical schematic schematic of of ( a(a)) the the proposedproposed variable variable storage storage architecture architecture with with 2 UCs 2 UCsand (b and) its (b) its Csmall via D1 Schottky diode; all the switches being open (normally-off). The main objective is to be controlcontrol circuitry. circuitry. able to supply the load as soon as possible. A control circuitry monitoring the voltage across Csmall, 3.2. Operating3.2.VCsmall Operating and Principle the Principle voltage across Cbig, VCbig allows driving the switches according to appropriate voltage thresholds. The principle of this variable storage architecture is to initially supply the small ultra-capacitor The principleFirst, when of V thisCsmall variable reaches a storage sufficient architecture voltage (~0.8 is V), to the initially control supply circuitry the is smallable to ultra-capacitor operate. In Csmall via D1 Schottky diode; all the switches being open (normally-off). The main objective is to be Csmallavia second D1 Schottkystep, once diode; Csmall has all stored the switches enough beingenergy open for supplying (normally-off). the loadThe (Vmax1 main threshold), objective the is to able to supply the load as soon as possible. A control circuitry monitoring the voltage across Csmall, be ablecontrol to supply logic closes the loadS2 switch as soon to supply as possible. it (see Figures A control 4a,b and circuitry 5). monitoring the voltage across VCsmall and the voltage across Cbig, VCbig allows driving the switches according to appropriate voltage If the energy-harvesting source is sufficient, VCsmall can reach its maximum value (Vmax2) and S3 Csmallthresholds.,VCsmall and the voltage across Cbig,VCbig allows driving the switches according to appropriate switch is closed such that Cbig can be charged (see Figure 4c). This charge phase of Cbig is stopped as voltage thresholds.First, when VCsmall reaches a sufficient voltage (~0.8 V), the control circuitry is able to operate. In soon as VCsmall decreases by 50 mV (Vmin2). aFirst, second when step, V onceCsmall Creachessmall has stored a sufﬁcient enough voltage energy (~0.8for supplying V), the control the load circuitry (Vmax1 threshold), is able to the operate. These two cycles (c and b) are repeated, the load being supplied by Csmall, until the two voltages In acontrol second logic step, closes once S2 C smallswitchhas to storedsupply enoughit (see Figures energy 4a,b for and supplying 5). the load (Vmax1 threshold), the VCsmall and VCbig become equal. In this case, the architecture moves to a parallel configuration (see If the energy-harvesting source is sufficient, VCsmall can reach its maximum value (Vmax2) and S3 controlFigure logic 4d) closes to maximize S2 switch energy to supply autonomy. it (see Figures4a,b and5). switch is closed such that Cbig can be charged (see Figure 4c). This charge phase of Cbig is stopped as soon as VCsmall decreases by 50 mV (Vmin2). These two cycles (c and b) are repeated, the load being supplied by Csmall, until the two voltages VCsmall and VCbig become equal. In this case, the architecture moves to a parallel configuration (see Figure 4d) to maximize energy autonomy.

(a) (b)

Figure 4. The different operation modes of the proposed variable storage architecture: (a) charge of

Csmall only via D1 Schottky diode; (b) when reaching Vmax1 threshold, S2 switch is closed and Csmall supplies the load; (c)Csmall continues to charge; when reaching Vmax2 threshold, S3 switch is also (c) (d) closed to charge Cbig and Csmall supplies the load until reaching maximum discharge threshold Vmin2; (d) when VCsmall = VCbig, all switches are closed and both Cbig by Csmall supplies the load [8]. Technologies 2018, 6, x 5 of 13

Figure 4. The different operation modes of the proposed variable storage architecture: (a) charge of

closed to charge Cbig and Csmall supplies the load until reaching maximum discharge threshold Vmin2; Technologies 2018, 6, 106 5 of 13 (d) when VCsmall = VCbig, all switches are closed and both Cbig by Csmall supplies the load [8].

FigureFigure 5. 5. OperationOperation principle principle of of the the proposed proposed variable variable storage storage architecture architecture for for two two scenario scenario cases: cases: harvestedharvested power power (P (PIN)IN ≥) consumed≥ consumed power power (POUT (P) OUTand) harvested and harvested power power (PIN) < (P consumedIN) < consumed power (P powerOUT) (red(POUT curves,) (red times curves, t1, times t2 and t1, t3). t2 and t3).

3.3. LogicIf the Control energy-harvesting Parameters and source Optimization is sufﬁcient, VCsmall can reach its maximum value (Vmax2) and S3 switch is closed such that Cbig can be charged (see Figure4c). This charge phase of C big is stopped as For an optimized operation of this variable storage structure, two voltages, VCsmall and VCbig, soon as VCsmall decreases by 50 mV (Vmin2). need to be monitored and appropriate voltage thresholds defined. Moreover, two different cases of These two cycles (c and b) are repeated, the load being supplied by Csmall, until the two voltages operations should be taken into account: first, when the harvested power (PIN) is larger than the VCsmall and VCbig become equal. In this case, the architecture moves to a parallel conﬁguration consumed(see Figure power4d) to maximize(POUT) and energy second, autonomy. when the harvested power is smaller than the consumed power. Figure 5 illustrates these two cases. To control these switched capacitors, five different conditions3.3. Logic Controlare required: Parameters and Optimization

For an optimized operation of this variableVCsmall ≥ storage Vmax1, structure, two voltages, VCsmall and V(2)Cbig , need to be monitored and appropriate voltage thresholds deﬁned. Moreover, two different cases of VCsmall ≤ Vmin1, (3) operations should be taken into account: ﬁrst, when the harvested power (PIN) is larger than the VCsmall ≥ Vmax2, (4) consumed power (POUT) and second, when the harvested power is smaller than the consumed power.

Figure5 illustrates these two cases. To controlVCsmall these ≤ Vmin2 switched, capacitors, five different conditions(5) are required: VCsmall = VCbig, (6) VCsmall ≥ Vmax1, (2) Let us start with the first ideal case being when harvested power (PIN) is sufficient. As soon as VCsmall ≤ Vmin1, (3) VCsmall reaches Vmax1 (the minimum voltage for which the load can be operated), S2 switch closes. While supplying the load, VCsmall continuesVCsmall to charge≥ Vmax2 and, reaches Vmax2. Reaching this threshold (4) means that the energy-harvesting source is sufficient and that Cbig can be charged. To do so, S3 VCsmall ≤ Vmin2, (5) switch is closed until VCsmall decreases to Vmin2. The cycle is repeated (VCsmall ≥ Vmax2 or VCsmall ≤ Vmin2, see Figure 5), until VCsmall = VCbig. At this phase,VCsmall both= ultra-capacitors VCbig, operate in parallel to supply the (6) load at a pre-regulated voltage around the average value of (Vmax2 + Vmin2)/2. It is to be noted that in a Let us start with the first ideal case being when harvested power (PIN) is sufficient. As soon as real system to protect the ultra-capacitors, a voltage limitation (Zener diode or DC/DC converter) is VCsmall reaches Vmax1 (the minimum voltage for which the load can be operated), S2 switch closes. required at the input of the adaptive storage unit. While supplying the load, VCsmall continues to charge and reaches Vmax2. Reaching this threshold If the energy-harvesting source becomes temporarily insufficient—see red curves in Figure 5 (at means that the energy-harvesting source is sufficient and that Cbig can be charged. To do so, S3 switch times t1, t2 and t3)—and the system is starting with empty ultra-capacitors, the startup is similar to is closed until VCsmall decreases to Vmin2. The cycle is repeated (VCsmall ≥ Vmax2 or VCsmall ≤ Vmin2, the previous case and depending on the harvested power, only Csmall will be involved and as soon as see Figure5), until V Csmall = VCbig. At this phase, both ultra-capacitors operate in parallel to supply it gets discharged down to Vmin1, the S2 switch is opened so that it can get charged again up to Vmax1. the load at a pre-regulated voltage around the average value of (Vmax2 + Vmin2)/2. It is to be noted that in a real system to protect the ultra-capacitors, a voltage limitation (Zener diode or DC/DC converter) is required at the input of the adaptive storage unit. Technologies 2018, 6, 106 6 of 13

If the energy-harvesting source becomes temporarily insufficient—see red curves in Figure5 (at times t1, t2 and t3)—and the system is starting with empty ultra-capacitors, the startup is similar to Technologies 2018, 6, x 6 of 13 theTechnologies previous 2018 case, 6, x and depending on the harvested power, only Csmall will be involved and as soon6 of as13 it gets discharged down to Vmin1, the S2 switch is opened so that it can get charged again up to Vmax1. If the intermittency of the source occurs when VCsmall = VCbig, both of them will continue supplying the If the intermittency of the the source source occurs occurs when when V VCsmallCsmall = V=Cbig VCbig, both, both of them of them will will continue continue supplying supplying the load and get alternatively discharged down to Vmin1 and charged up to Vmax1. theload load and and get getalternatively alternatively discharged discharged down down to V tomin1 V and andcharged charged up to up V tomax1 V. . To implement control circuitry, we used commemin1rcial discrete components:max1 one Schottky diode, To implementimplement control circuitry, wewe usedused commercialcommercial discretediscrete components:components: one Schottky diode, three bidirectional CMOS switches (normally-off ADG801), two LT6700 hysteresis comparators for three bidirectionalbidirectional CMOS switchesswitches (normally-off ADG801), two LT6700 hysteresishysteresis comparators for (Vmin1, Vmax1) and (Vmin2, Vmax2), one LTC1540 comparator for the last condition (Equation (6)), eight (V(Vmin1, ,VVmax1) and) and (V (Vmin2, Vmax2,V), one), LTC1540 one LTC1540 comparator comparator for the for last the condition last condition (Equation (Equation (6)), eight (6)), ANDmin1 gates,max1 two invertersmin2 andmax2 two logical OR gates. To avoid detrimental short-circuit and related eightAND ANDgates, gates,two inverters two inverters and two and logical two logicalOR gates. OR To gates. avoid To detrimental avoid detrimental short-circuit short-circuit and related and losses during configuration changes, we added a dead time (10 ms) to the logic signals applied to S1 relatedlosses during losses duringconfiguration configuration changes, changes, we added we addeda dead a time dead (10 time ms) (10 to ms) the tologic the signals logic signals applied applied to S1 and S3 switches. The sizing of the ultra-capacitors, Csmall = 100 mF and Cbig = 400 mF, was defined toand S1 S3 and switches. S3 switches. The sizing The sizingof the ofultra-capacitors, the ultra-capacitors, Csmall = C 100 mF= 100and mF Cbig and = 400 C mF,= 400was mF,defined was according to the chosen load, an interfacing LDO TPS78227small connected to a Jennicbig N5148-001 data definedaccording according to the chosen to the chosenload, an load, interfacing an interfacing LDO TPS78227 LDO TPS78227 connected connected to a Jennic to a Jennic N5148-001 N5148-001 data logger. datalogger. logger. To optimize the operating principle for this variable storage architecture, we performed To optimizeoptimize the the operating operating principle principle for thisfor variablethis variable storage storage architecture, architecture, we performed we performed electrical electrical simulations using LTspice software. For the charging phase, we used a Thevenin generator simulationselectrical simulations using LTspice using software. LTspice For software. the charging For th phase,e charging we used phase, a Thevenin we used a generator Thevenin made generator up of made up of a 50 Ω resistor and a 5.1 V voltage source to simulate an energy-harvesting source. For amade 50 Ω upresistor of a 50 and Ω aresistor 5.1 V voltage and a 5.1 source V voltage to simulate source an to energy-harvesting simulate an energy-harvesting source. For the source. discharge For the discharge phase, we connected a 1 kΩ resistor at the output. phase,the discharge we connected phase, we a 1 kconnectedΩ resistor a at 1 thekΩ output.resistor at the output. During the different phases, we monitored the voltages at each intermediate node (VCsmall, VCbig During thethe differentdifferent phases,phases, wewe monitored monitored the the voltages voltages at at each each intermediate intermediate node node (V (VCsmallCsmall,V, VCbigCbig and Vout, see Figures 6 and 7). The benefits of this variable architecture are fast start-up (tON~5 s) and and V out,, see see Figures Figures 66 andand7 7).). The The benefits benefits of of this this variable variable architecture architecture are are fast fast start-up start-up (t (tON~5 s) and high rateout of stored energy with output pre-regulation. ON high rate of stored energyenergy withwith outputoutput pre-regulation.pre-regulation.

Figure 6. Simulated evolution of VCsmall and VCbig voltages for the proposed variable storage Figure 6.6. Simulated evolution of VVCsmall andand V VCbig voltagesvoltages for for the the proposed variable storage architecture during charge and dischargCsmalle for the idealCbig case (harvested power ≥ consumed power): architecture during charge andand dischargedischarge forfor thethe idealideal casecase (harvested(harvested powerpower ≥≥ consumed power): energy source is a Thevenin generator (Eth = 5.1 V, Rth = 50 Ω) and a load resistor (RLOAD = 1 kΩ). energy source isis aa TheveninThevenin generatorgenerator (E(Ethth = 5.1 5.1 V, V, R th == 50 50 ΩΩ) )and and a a load load resistor resistor (R (RLOADLOAD = 1= k 1Ω k).Ω ).

Figure 7. Zoomed view of Figure6 showing details of the startup phase and the evolution of V out. Figure 7. Zoomed view of Figure 6 showing details of the startup phase and the evolution of Vout. Figure 7. Zoomed view of Figure 6 showing details of the startup phase and the evolution of Vout.

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3.4. Experimental Implementation and Characterization 3.4.3.4. ExperimentalExperimental ImplementationImplementationand andCharacterization Characterization A discrete prototype of the variable storage structure is shown in Figure 8. The electronic board AA discrete discrete prototype prototype of of the the variable variable storage storage structure structure is shownis shown in Figurein Figure8. The 8. The electronic electronic board board on onon the the left left shows shows the the adaptive adaptive storage storage architecture architecture with with C Csmallsmall and and C Cbigbig implemented implemented with with AVX AVX the left shows the adaptive storage architecture with Csmall and Cbig implemented with AVX BestCap BestCap ultra-capacitors. The electronic board on the right shows the control logic of this ultra-capacitors.BestCap ultra-capacitors. The electronic The board electronic on the board right shows on the the right control shows logic ofthe this control architecture. logic of this architecture.architecture.

Figure 8. Prototype of the proposed variable storage architecture. FigureFigure 8. 8. Prototype Prototype of of the the proposed proposed va variableriable storage storage architecture. architecture. For the experimental validation, we deﬁned the different voltage thresholds as follows: ForFor the the experimental experimental validation, validation, we we defined defined th the edifferent different voltage voltage thresholds thresholds as as follows: follows: V Vmax1max1 = = Vmax1 = 2.8 V,Vmax2= 4.4 V, Vmin1 = 2.75 V and Vmin2 = 4.35 V. Figure9 provides the plots of the 2.82.8 V, V, V Vmax2max2= =4.4 4.4 V, V, V Vmin1min1 = =2.75 2.75 V V and and V Vmin2min2 = =4.35 4.35 V. V. Figure Figure 9 9provides provides the the plots plots of of the the evolution evolution of of evolution of VCsmall and VCbig for the ideal energy scenario when starting with empty ultra-capacitors. VVCsmallCsmall and and V VCbigCbig for for the the ideal ideal energy energy scenario scenario when when starting starting with with empty empty ultra-capacitors. ultra-capacitors. As As soon soon as as As soon as Csmall charging voltage reaches 0.8 V, the logic circuitry is activated and VCsmall and CCsmallsmall chargingcharging voltagevoltage reachesreaches 0.8 0.8 V, V, thethe logic logic circuitrycircuitry is is activatedactivated andand V VCsmallCsmall andand V VCbigCbig areare VCbig are monitored. The global principle of the proposed variable storage architecture is validated. monitored.monitored. The The global global principle principle of of the the proposed proposed variable variable storage storage arch architectureitecture is is validated. validated. However, However, However, we detected an unexpected behavior at the very beginning: Cbig starts to get charged before wewe detected detected an an unexpected unexpected behavior behavior at at the the very very beginning: beginning: C Cbigbig starts starts to to get get charged charged before before C Csmallsmall Csmall reaches Vmax2 thus delaying the powering of the load. We investigated this issue and found out reachestworeaches problems: V Vmax2max2 thus thus delaying delaying the the powering powering of of the the load. load. We We investigated investigated this this issue issue and and found found out out two two problems:problems: • The LTC1540 comparator exhibits an erroneous behavior when its VDD is below 1 V, thus • • TheThe LTC1540 LTC1540 comparator comparator exhibits exhibits an an erroneous erroneous behavior behavior when when its its VDD VDD is is below below 1 1V, V, thus thus inducing the triggering of S3 switch and the early charging of Cbig. This behavior was not inducinginducing the the triggering triggering of of S3 S3 switch switch and and the the early early charging charging of of C Cbigbig. .This This behavior behavior was was not not observed in simulation. observedobserved in in simulation. simulation. • The electrostatic discharge (ESD) protection of S3 switch provides a parasitic current path in • • TheThe electrostatic electrostatic discharge discharge (ESD) (ESD) protection protection of of S3 S3 switch switch provides provides a aparasitic parasitic current current path path in in parallel with the Schottky diode. parallelparallel with with the the Schottky Schottky diode. diode.

FigureFigureFigure 9. 9. 9. MeasuredMeasured Measured behavior behaviorbehavior of ofof the thethe proposed proposedproposed variable variablevariable st storagestorageorage architecture architecturearchitecture in inin th thethe eideal idealideal case casecase scenario: scenario:scenario: EnergyEnergyEnergy source source source is is is a a aThevenin Thevenin Thevenin generator generator generator (E (E (Ethth th== =5.1 5.15.1 V, V,V, RR Rthth th= =1 1k Ω kΩ) and)) and and a a load load resistor resistor (R (R LOADLOAD = =1 = 1k 1ΩkΩ k).Ω ). ).

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Technologies 2018, 6, x 8 of 13

The ﬁrstThe first issue issue was was corrected corrected by by introducing introducing a divi dividerder bridge bridge by by two two before before the theinput input of S3 ofgate. S3 gate. It allowedIt allowed getting getting the correctthe correct behavior behavior of theof the variable variable storage storage structure structure as as shown shown in in Figure Figure 10 10 in in good agreementgood agreement with the simulatedwith the simulated one. one.

FigureFigure 10. Measured 10. Measured behavior behavior of of the the proposed proposed variablevariable st storageorage architecture architecture in the in theideal ideal case casescenario scenario afterafter corrective corrective action action on on the the LTC1540 comparator comparator.. The Theenergy energy source source is a Thevenin is a Thevenin generator generator(Eth = 5.1 V, Rth = 50 Ω) and a load resistor (RLOAD = 1 kΩ). The different voltage thresholds are as follows: (Eth = 5.1 V,Rth = 50 Ω) and a load resistor (RLOAD = 1 kΩ). The different voltage thresholds are Vmax1 = 2.8 V, Vmax2 = 4.45 V, Vmin1 = 2.75 V and Vmin2 = 4.4 V. as follows: Vmax1 = 2.8 V, Vmax2 = 4.45 V, Vmin1 = 2.75 V and Vmin2 = 4.4 V.

The secondThe second issue issue was was identified identified when when analyzinganalyzing th thee respective respective losses losses of each of each block block by LTspice by LTspice simulation in the following conditions: charge phase, lasting 2 h 30 min, using a Thevenin source (Eth simulation in the following conditions: charge phase, lasting 2 h 30 min, using a Thevenin source = 5.1 V, Rth = 50 Ω) as energy source and discharge phase, until reaching Vmin1, with energy source (Eth =disconnected 5.1 V,Rth = and 50 Ωresistive) as energy load sourceof 1 kΩ and. They discharge are summarized phase,until in Table reaching 1. The V min1energy, with usage energy sourceefficiency disconnected η as defined and resistiveby Equation load (1) of is 191%. kΩ .There They are are three summarized main blocks in that Table induce1. The the energy majority usage efficiencyof theη losses:as defined the switches, by Equation the Schottky (1) is 91%. diode There and arethe threeultra-capacitors. main blocks By thatanalyzing induce the the different majority of the losses:current the paths, switches, it appeared the Schottky that the high-power diode and thecons ultra-capacitors.umption of the switches By analyzing is related the to differentthe parasitic current paths,path it appeared through the that ESD the protection high-power diode consumption of the S3 switch, of the switcheswhich provides is related a less-resistive to the parasitic path path throughcompared the ESD to the protection Schottky diode diode ofwhose the S3on-resistance switch, which is 6 Ω provides. Implementing a less-resistive a Schottky path diode compared with a to the Schottkymuch lower diode on-resistance whose on-resistance such as the isMBRS360 6 Ω. Implementing whose on-resistance a Schottky is 0.042 diode Ω allows with ato muchgreatly lower on-resistanceincrease usage such efficiency as the MBRS360 to up to 94.7%. whose on-resistance is 0.042 Ω allows to greatly increase usage The losses in the ultra-capacitors are related to the parallel parasitic resistor associated with efficiency to up to 94.7%. their self-discharge current. That means that this has to be a choice criterion for the ultra-capacitors Theimplemented losses in in the such ultra-capacitors variable storage struct are relatedure, in order to the to paralleloptimize parasiticperformance. resistor associated with their self-discharge current. That means that this has to be a choice criterion for the ultra-capacitors implementedTable in 1. suchEnergy variable consumption storage of each structure, respective in block order in the to variable optimize storage performance. structure computed by LTspice simulation for a total supplied energy of 210 J and energy provided to the load of 192 J.

Table 1. Energy consumption of each respectiveSchottky blockLT6700 in the variableLT1540 storage structureLogic computedDelay by Block Switches Ultra-Capacitors LTspice simulation for a total supplied energyDiode of 210Comparators J and energy providedComparator to theGates load of 192Circuits J. Losses 11 J 3.9 J 1.29 J 330 mJ 210 mJ 3.6 mJ 663 nJ LT6700 LT1540 Block Switches Ultra-Capacitors Schottky Diode Logic Gates Delay Circuits Comparators Comparator 3.5. Final Optimization and Characterization Losses 11 J 3.9 J 1.29 J 330 mJ 210 mJ 3.6 mJ 663 nJ Finally, to definitively get rid of any parasitic current path through the ESD protection of S3 3.5. Finalswitch Optimization and extend andthe voltage Characterization range of the adaptive storage unit, we decided to use discrete MOS switches and modify the architecture, as indicated in the electrical schematic of Figure 11. The main Finally,switch is to a deﬁnitivelyPMOS transistor get ridthat of isany driven parasitic by an NMOS current transistor. path through A highly the ESDresistive protection resistor of(7 S3MΩ switch) and extendallows keeping the voltage it open range as long of the as the adaptive NMOS storagetransistor unit, is inactive. we decided The operation to use discrete principle MOS is almost switches and modifythe same the as previously architecture, discussed as indicated and summarized in the electrical hereafter: schematic of Figure 11. The main switch is a PMOS transistor that is driven by an NMOS transistor. A highly resistive resistor (7 MΩ) allows keeping it open as long as the NMOS transistor is inactive. The operation principle is almost the same as previously discussed and summarized hereafter: Technologies 2018, 6, 106 9 of 13

Technologies 2018, 6, x 9 of 13 a. At start-up with empty ultra-capacitors, D1 charges Csmall and S2 and S3 are open. a. At start-up with empty ultra-capacitors, D1 charges Csmall and S2 and S3 are open. b.V Csmall ≥ Vmax1 = > S2 switch is closed and Csmall supplies the load. b. VCsmall ≥ Vmax1 = > S2 switch is closed and Csmall supplies the load. c.V ≤ V = > S2 switch is opened, D1 recharges C . c. VCsmallCsmall ≤ Vmin1 min1= > S2 switch is opened, D1 recharges Csmall. small ≥ d.V VCsmallCsmall ≥ Vmax2Vmax2 = > S3= >switch S3 switch is closed is closed and C andbig starts Cbig starts charging charging through through D2 (Step D2(Step c Figure c Figure 5). 5). Technologies 2018, 6, x 9 of 13 e. VVCsmallCsmall ≤ V≤min2V min2= > S3= switch > S3 switch is opened, is opened, D1 recharges D1 recharges Csmall. Steps Csmall b. and Steps c (Figure b and c5) (Figure are repeated5) are untilrepeateda. VAtCbig start-up = until VCsmall V withCbig. empty= VCsmall ultra-capacitors,. D1 charges Csmall and S2 and S3 are open. b. VCsmall ≥ Vmax1 = > S2 switch is closed and Csmall supplies the load. f. VVCbigCbig ≥ V≥CsmallVCsmall = > D1,= > D2 D1, and D2 D3 and diodes D3 diodes are ON, are S2 ON, and S2 S3 and switches S3 switches are closed are closed to supply to supply the load the c. VCsmall ≤ Vmin1 = > S2 switch is opened, D1 recharges Csmall. fromload C fromsmall and Csmall Cbigand. Cbig. d. VCsmall ≥ Vmax2 = > S3 switch is closed and Cbig starts charging through D2 (Step c Figure 5). Thise. proposed VCsmall ≤ V adaptive adaptivemin2 = > S3 switchstorage storage is isopened, is easily easily D1 scalablescalable recharges toto higherCsmall higher. Steps power power b and and c and(Figure voltage. voltage. 5) are Its repeatedadvantage Its advantage lies liesin the in thefact factuntilthat that VtheCbig the =two VCsmall two ultra-capacitors. ultra-capacitors are are eith eitherer perfectly perfectly isolated isolated or or when when setup setup in in parallel, Cbig Csmall chargedf. at exactlyV ≥ V the same = > D1, voltage, D2 and D3 avoiding diodes are any ON, balancing S2 and S3 switches current current are to to closedflow. flow. toThis supply is not the theload case for from Csmall and Cbig. the 4 UCs-based structure where voltage monitoring is performed on on one single UC. As a result, in the presence This of capacitance proposed adaptive variabi variability storagelity (that (thatis easily could could scalable be be as asto higherhigh high as aspower 20%), 20%), and upon upon voltage. storage storage Its advantage reconfigurability, reconfigurability, lies in the fact that the two ultra-capacitors are either perfectly isolated or when setup in parallel, balancing peakpeak currents currents are are going going to flow.to flow. Anyway, Anyway, for higher for higher power, power, a soft starta soft circuit start for circuit the switches for the charged at exactly the same voltage, avoiding any balancing current to flow. This is not the case for wouldswitches bethe would needed 4 UCs-based be to needed avoid structure anyto avoi where overstressd anyvoltage overstress of monitoring the UCs. of theis performed UCs. on one single UC. As a result, in the presence of capacitance variability (that could be as high as 20%), upon storage reconfigurability, balancing peak currents are going to flow. Anyway, for higher power, a soft start circuit for the switches would be needed to avoid any overstress of the UCs.

Figure 11. New version of the variable storage arch architectureitecture using discrete MOS switches. Figure 11. New version of the variable storage architecture using discrete MOS switches. Figure 12 illustrates the measured behavior of the new variable storage architecture. It is very Figure 12 illustrates the measured behavior of the new variable storage architecture. It is very similar to theFigure previous 12 illustrates one, except the measured that C behavioris able of tothe charge new variable to a higher storage voltagearchitecture. than It Cis very. This is bigbig smallsmall similar similarto the toprevious the previous one, one, except except that that C Cbig is is ableable toto chargecharge to to a highera higher voltage voltage than Cthansmall. ThisC is. This is due to the fact that Csmall is supplying the load whereas Cbig is only charging, due to the D3 diode that due to thedue fact to the that fact C thatsmall C issmall supplying is supplying the the load load whereas whereas C Cbigbig is is only only charging, charging, due todue the to D3 the diode D3 thatdiode that isolates it from the load as long as VCbig < VCsmall + VD3. isolates isolatesit from it the from load the loadas long as long as VasCbig VCbig < V< VCsmallCsmall + + VVD3..

Figure 12.FigureExperimental 12. Experimental validation validation of the ofnew the new version version of the of variablethe variable storage storage architecture architecture using usingdiscrete discrete MOS switches in the ideal case scenario: energy source is a Thevenin generator (Eth = 5.1 V, MOS switches in the ideal case scenario: energy source is a Thevenin generator (Eth = 5.1 V, Rth = 50 Ω) Rth = 50 Ω) and a load resistor (RLOAD = 1 kΩ). Defined voltage thresholds are: Vmax1 = 4.2 V, Vmax2 = 4.5 and a load resistor (RLOAD = 1 kΩ). Deﬁned voltage thresholds are: Vmax1 = 4.2 V, Vmax2 = 4.5 V, Figure 12.V, V min1Experimental = 2.8 V and V validationmin2 = 4.45 V. Theof theThevenin new generatorversion isof disconnected the variable at timestorage t = 400 architecture s (phase b). using V = 2.8 V and V = 4.45 V. The Thevenin generator is disconnected at time t = 400 s (phase b). discretemin1 MOS switchesmin2 in the ideal case scenario: energy source is a Thevenin generator (Eth = 5.1 V, Rth = 50 Ω) and a load resistor (RLOAD = 1 kΩ). Defined voltage thresholds are: Vmax1 = 4.2 V, Vmax2 = 4.5

V, Vmin1 = 2.8 V and Vmin2 = 4.45 V. The Thevenin generator is disconnected at time t = 400 s (phase b).

Technologies 2018, 6, 106 10 of 13 Technologies 2018, 6, x 10 of 13

WeWe analyzedanalyzed thethe resultingresulting losseslosses inin thisthis newnew architecturearchitecture (Table(Table2 )2) that that are are greatly greatly improved improved comparedcompared toto itsits previous versions, versions, resulting resulting in in in increasedcreased energy energy usage usage efficiency efﬁciency up up to to94.6%. 94.6%. In Inaddition, addition, this this new new variable variable storage storage structure structure has has the the following following advantages: advantages: • • ReducedReduced number number of of components components (control (control circuitry circuitr consistsy consists of of only only two two comparators), comparators), resulting resulting in lowerin lower cost cost and and lower lower power power consumption. consumption. • • BetterBetter genericness,genericness, meaning meaning that that it it is is able able to to operate operate at at low low and and high high voltages. voltages. • • EasilyEasily integrableintegrable in in CMOS CMOS technology. technology.

Table 2. Energy consumption of each respective block in the new variable storage structure Table 2. Energy consumption of each respective block in the new variable storage structure computed computed by LTspice simulation for a total supplied energy of 216 J and energy provided to the load by LTspice simulation for a total supplied energy of 216 J and energy provided to the load of 204.4 J. of 204.4 J. Block Schottky Diodes Ultra-Capacitors LT1540 Comparators Switches Block Schottky Diodes Ultra-Capacitors LT1540 Comparators Switches LossesLosses 7 7J J 4.08 JJ 316 316 mJ mJ 310.9 mJmJ

4.4. ImplementationImplementation andand ValidationValidation in in a a Wireless Wireless Sensor Sensor Node Node ToTo completely completely validate validate the the concept concept of self-supplied of self-supplied adaptive adaptive storage, storage, we implemented we implemented the second the versionsecond ofversion the proposed of the proposed topology topology into a wireless into a sensorwireless node, sensor as shownnode, as in shown Figure in13 Figure. For a ﬁrst13. For test a case,first test the case, energy-harvesting the energy-harvesting source is source a photovoltaic is a photovoltaic cell (VOC cell= (V 1.5OC V,= 1.5 ISC V,= I 100SC = mA100 mA with with a size a size of 50of mm50 mm× 68 × mm68 mm)) that that is interfacedis interfaced with with a boosta boost circuit circuit BQ25504 BQ25504 to to provide provide impedance impedance matching,matching, limitinglimiting thethe inputinput voltagevoltage toto 5.35.3 V.V. The The load load is is a a low-power low-power Jennic Jennic 5148 5148 datalogger datalogger that that is is interfaced interfaced withwith a a TPS78227 TPS78227 Low Low Drop Drop Out Out regulator regulator (LDO) (LDO) providing providing 2.7 2.7 V V regulated regulated voltage. voltage.

FigureFigure 13. 13.Implementation Implementation ofof the the proposed proposed variable variable storage storage architecturearchitecture intointo aa wireless wireless sensor sensor nodenode poweredpowered by by a a photovoltaic photovoltaic cell cell (PV). (PV).

TheThe dataloggerdatalogger performsperforms temperature measurement measurement every every 47 47 s. s. Initialization Initialization startup startup energy energy of ofJennic Jennic 5148 5148 is is~0.5 ~0.5 J. J.The The global global energy energy consumption consumption of one measurementmeasurement cyclecycle includingincluding communicationcommunication andand sleepsleep modemode isis 13.813.8 mJ.mJ. FigureFigure 14 14 provides provides the the evolution evolution of of the the input input and and output output voltagesvoltages of of the the adaptiveadaptive UCUC whenwhen suppliedsupplied by by aa photovoltaicphotovoltaic cellcell overover aa fullfull day.day. TheThe startupstartup timetime ofof thethe self-adaptive self-adaptive storage storage unit unit in in irradiance irradiance around around 720 720 W/m W/m22 isis 3030 ss withwith ultra-capacitorsultra-capacitors completelycompletely empty.empty. TheThe autonomyautonomy duringduring nightnight isis 55 h.h. ItIt isis interestinginteresting toto notenote thatthat thethe circuitcircuit startsstarts upup againagain inin thethe morningmorning for for a a very very low low irradiance irradiance around around 25 25 W/m W/m22.. InIn thisthis fullfull system,system, thethe globalglobal energyenergy usageusage efﬁciencyefficiency isis dependentdependent onon thethe irradianceirradiance andand isis equalequal toto 80%80% overover thethe timetime intervalinterval (30(30 min);min); seesee FigureFigure 14 14.. For a second test case, the energy-harvesting source is a much smaller photovoltaic panel (VOC = 5.6 V,ISC = 3 mA with a size of 50 mm × 20 mm). As its open circuit voltage VOC is compatible with UC handling voltage, we implemented a direct connection to the adaptive storage unit without any energy conditioning system. This test was performed for both the proposed adaptive storage (Csmall = 100 mF and Cbig = 2.5 mF) and a single ultra-capacitor (Cﬁxe = 2.6 mF) of the same equivalent capacitance (corresponding to the equivalent capacitance of the adaptive storage unit at the end of charging phase). Compared to the previous case, we resized Cbig such that the supplied system could be fully autonomous under very low irradiance conditions. Each storage unit is connected to a photovoltaic panel under the same irradiance and supplies an LDO regulator TPS78227 and Jennic 5148 datalogger (as Figure 13). Figure 15 provides the evolution of the input and output voltages of

Technologies 2018, 6, 106 11 of 13 the adaptive UC in cold startup condition (UCs being empty). This adaptive storage makes it possible to validate a faster startup of 1 h 50 min compared to the single UC that needs 5 h 16 min, while ensuring the autonomy of the wireless system all night long. This startup may seem high but we have to take into account that at the beginning of this particular day, the solar panel provides a very low current and irradiation is also very low (cloudy day). The ﬂuctuation of the input voltage (Figure 15) is linked to its connection to charge Csmall ultra-capacitor or to charge Cbig ultra-capacitor (permutation betweenTechnologies Step 2018, b6, andx c, Figure4). 11 of 13

Figure 14.14. ImplementationImplementation ofof thethe proposedproposed variablevariable storagestorage architecturearchitecture (with(with CCsmallsmall = 100 mF and Cbig = 400400 mF)mF) into into a wirelessa wireless sensor sensor node node powered powered by a photovoltaic by a photovoltaic cell (PV): cell evolution (PV): ofevolution irradiance, of Technologiesinputirradiance, 2018 and, output6 input, x and voltages output of adaptivevoltages of UC adaptive over one UC day. over one day. 12 of 13

For a second test case, the energy-harvesting source is a much smaller photovoltaic panel (VOC = 5.6 V, ISC = 3 mA with a size of 50 mm × 20 mm). As its open circuit voltage VOC is compatible with UC handling voltage, we implemented a direct connection to the adaptive storage unit without any energy conditioning system. This test was performed for both the proposed adaptive storage (Csmall = 100 mF and Cbig = 2.5 mF) and a single ultra-capacitor (Cfixe = 2.6 mF) of the same equivalent capacitance (corresponding to the equivalent capacitance of the adaptive storage unit at the end of charging phase). Compared to the previous case, we resized Cbig such that the supplied system could be fully autonomous under very low irradiance conditions. Each storage unit is connected to a photovoltaic panel under the same irradiance and supplies an LDO regulator TPS78227 and Jennic 5148 datalogger (as Figure 13). Figure 15 provides the evolution of the input and output voltages of the adaptive UC in cold startup condition (UCs being empty). This adaptive storage makes it possible to validate a faster startup of 1 h50 min compared to the single UC that needs 5 h16 min, while ensuring the autonomy of the wireless system all night long. This startup may seem high but we have to take into account that at the beginning of this particular day, the solar panel provides a very low current and irradiation is also very low (cloudy day). The fluctuation of the input voltage (Figure 15) is linked to its connection to charge Csmall ultra-capacitor or to charge Cbig ultra-capacitor (permutation between Step b and c, Figure 4). Figure 15. ImplementationImplementation of of the the proposed proposed va variableriable storage storage architecture architecture (with (with Csmall Csmall = 100= mF 100 and mF Candbig =C 2.5big F)= 2.5into F )a intowireless a wireless sensor node sensor powered node powered by a photovoltaic by a photovoltaic cell (PV): evolution cell (PV): of evolution irradiance, of inputirradiance, and output input voltages and output of adap voltagestive UC of adaptiveover one UCday overand a one half day with and very a halfbad withmeteorological very bad conditions.meteorological conditions.

5. Discussion In Table 3, the proposed adaptive storage architecture is compared to the reference architecture with four UCs and to one from the literature [9]. We can see that both versions of the proposed structure allow increasing energy usage efficiency, thanks to simplification of the circuitry and the reduction of the number of UCs and switches. Compared to the other structures proposed in the literature, it is self-supplied from an energy-harvesting source, can operate in cold startup i.e., when the UCs are empty, and provides at its output a pre-regulated voltage. Compared to the four UCs-based structure of Figure 2, the output voltage undergoes variations at a very slow rate, thus resulting in electromagnetic emissions. The residual voltage is very dependent on the voltage regulator setup at the output; some of them are operational with very low input voltage (<<1 V). In addition, the sizing of the big capacitor, defining the energy autonomy of the powered system, can be independent of the sizing of the small one that defines the startup speed. It is well suited for CMOS integration, and when combined with silicon-integrated microsupercapacitors [10] makes a very attractive and compact solution to the replacement of a battery.

Table 3. Comparison of the proposed adaptive storage to previously published ones.

Reference Topology 1st Version of Proposed 2nd Version of Proposed Topology with Topology/Performance with 4 UCs Topology with 2 UCs Topology with 2 UCs 4 UCs from [9] (Figure 2) (Figure 3) (Figure 11) Complexity: 4/5/Not UCs/Switches/Schottky 4/9/3/2/2 2/3/1/3/12 2/2/3/2/0 available diode/Comparators/Logic gates Low variations of output voltage - +++ +++ - Fast startup +++ +++ +++ +++ Pre-regulated output voltage - ++ ++ - Low cost + ++ ++ + Residual energy + - - + Self-supply + + + - Autonomy (Ratio Cmax/Cmin) 16 As desired As desired 4 Energy usage efficiency 93% 94.7% 94.6% 88%

Technologies 2018, 6, 106 12 of 13

5. Discussion In Table3, the proposed adaptive storage architecture is compared to the reference architecture with four UCs and to one from the literature [9]. We can see that both versions of the proposed structure allow increasing energy usage efficiency, thanks to simplification of the circuitry and the reduction of the number of UCs and switches. Compared to the other structures proposed in the literature, it is self-supplied from an energy-harvesting source, can operate in cold startup i.e., when the UCs are empty, and provides at its output a pre-regulated voltage. Compared to the four UCs-based structure of Figure2, the output voltage undergoes variations at a very slow rate, thus resulting in electromagnetic emissions. The residual voltage is very dependent on the voltage regulator setup at the output; some of them are operational with very low input voltage (<<1 V). In addition, the sizing of the big capacitor, defining the energy autonomy of the powered system, can be independent of the sizing of the small one that defines the startup speed. It is well suited for CMOS integration, and when combined with silicon-integrated microsupercapacitors [10] makes a very attractive and compact solution to the replacement of a battery.

Table 3. Comparison of the proposed adaptive storage to previously published ones.

1st Version of Proposed 2nd Version of Proposed Reference Topology with Topology with 4 Topology/Performance Topology with 2 UCs Topology with 2 UCs 4 UCs (Figure2) UCs from [9] (Figure3) (Figure 11) Complexity: UCs/Switches/Schottky 4/9/3/2/2 2/3/1/3/12 2/2/3/2/0 4/5/Not available diode/Comparators/Logic gates Low variations of output voltage - +++ +++ - Fast startup +++ +++ +++ +++ Pre-regulated output voltage - ++ ++ - Low cost + ++ ++ + Residual energy + - - + Self-supply + + + - Autonomy (Ratio Cmax/Cmin) 16 As desired As desired 4 Energy usage efﬁciency 93% 94.7% 94.6% 88%

Author Contributions: Conceptualization, M.B., V.B., J.-M.D. and F.E.M.; methodology, F.E.M.; validation, F.E.M.; formal analysis, F.E.M.; investigation, F.E.M.; supervision, M.B. and V.B.; project administration, J.-M.D.; funding acquisition, M.B. and J.-M.D. Funding: This research work was partially carried out within the framework of the European project SMARTER funded by the CHIST-ERA program, “Green ICT, towards Zero Power ICT”. Acknowledgments: This work is carried out within the framework of the European project SMARTER funded by the CHIST-ERA program, “Green ICT, towards Zero Power ICT”. Conﬂicts of Interest: The authors declare no conﬂict of interest.

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