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Phase Alignment of Asynchronous External PHASEALIGNMENTOFASYNCHRONOUSEXTERNALCLOCK CONTROLLABLEDEVICESTOPERIODICMASTERCONTROLSIGNALUSING THEPERIODICEVENTSYNCHRONIZATIONUNIT by CharlesNicholasOstrander Athesissubmittedinpartialfulfillment oftherequirementsforthedegree of MasterofScience in ElectricalEngineering MONTANASTATEUNIVERSITY Bozeman,Montana May2009 ©COPYRIGHT by CharlesNicholasOstrander 2009 AllRightsReserved ii APPROVAL ofathesissubmittedby CharlesNicholasOstrander Thisthesishasbeenreadbyeachmemberofthethesiscommitteeandhasbeen foundtobesatisfactoryregardingcontent,Englishusage,format,citation,bibliographic style,andconsistency,andisreadyforsubmissiontotheDivisionofGraduateEducation. Dr.BrockJ.LaMeres ApprovedfortheDepartmentElectricalEngineering Dr.RobertC.Maher ApprovedfortheDivisionofGraduateEducation Dr.CarlA.Fox iii STATEMENTOFPERMISSIONTOUSE Inpresentingthisthesisinpartialfulfillmentoftherequirementsfora master’sdegreeatMontanaStateUniversity,IagreethattheLibraryshallmakeit availabletoborrowersunderrulesoftheLibrary. IfIhaveindicatedmyintentiontocopyrightthisthesisbyincludinga copyrightnoticepage,copyingisallowableonlyforscholarlypurposes,consistentwith “fairuse”asprescribedintheU.S.CopyrightLaw.Requestsforpermissionforextended quotationfromorreproductionofthisthesisinwholeorinpartsmaybegranted onlybythecopyrightholder. CharlesNicholasOstrander May2009 iv TABLEOFCONTENTS 1.INTRODUCTION .......................................................................................................... 1 ProjectOverview ............................................................................................................ 1 RegardingOff-The-ShelfSolutions................................................................................ 4 DesignStrategy............................................................................................................... 6 ComplementaryCodeDesign......................................................................................... 9 2.SYSTEMEQUIPMENTSPECIFICATIONS.............................................................. 12 AdvantestD3186PulsePatternGenerator.................................................................... 12 MaximMAX9382Phase/FrequencyDetector.............................................................. 13 AgilentE4432BRadioFrequencySignalGenerator .................................................... 15 Inphi2080MX20GBPS4:1Multiplexer...................................................................... 15 Agilent83752A20GHzSweepGenerator.................................................................... 16 3.CIRCUITIMPLEMENTATION.................................................................................. 17 SSH-ADCReferenceGeneratorasaControlSystem.................................................. 17 CircuitOperationOverview.......................................................................................... 18 PESUCircuitStage1:TriggerPulseManipulation ..................................................... 21 PESUCircuitStage2:Phase/FrequencyDetection...................................................... 26 PESUCircuitStage3:DifferenceIntegrationandScaling .......................................... 28 IntegratorDesignintermsofthePhaseLockedLoop ................................................. 31 DeviceFabrication........................................................................................................ 33 4.SIMULATIONOFDEVICE........................................................................................ 37 5.DEVICEPERFORMANCE ......................................................................................... 44 SystemSetup................................................................................................................. 44 DeviceOperation .......................................................................................................... 45 SystemOperation.......................................................................................................... 52 6.EXTENSIONOFDEVICEFUNCTIONALITY......................................................... 57 AlignmenttoOtherDevices ......................................................................................... 57 Arbitrary20GBPSCodeProduction............................................................................. 58 7.CONCLUSIONS .......................................................................................................... 61 v TABLEOFCONTENTS-CONTINUED REFERENCESCITED..................................................................................................... 64 APPENDICES .................................................................................................................. 67 APPENDIXA:REVISION2PESUCIRCUITSCHEMATIC ................................... 68 APPENDIXB:REVISION2PESUBOARDLAYOUT ............................................ 71 APPENDIXC:MATLABSCRIPTSFORDETERMININGCOMPLEMENTARY CODESEED................................................................................................................. 75 APPENDIXD:MATHCADSCRIPTFORADJUSTINGPLLLOOPFILTER........ 78 vi LISTOFTABLES TablePage 1.SummaryofGoalsforAlignmentProject ............................................................. 4 2.PossibleBitSequencesUsingthe{1110}Seed ............................................... 11 3.TimingDiagramfor20GBPSComplementarySequenceCodeGeneration....... 11 4.PPGDataPatternsforMUXTesting................................................................... 53 5.PESUPartList ..................................................................................................... 74 vii LISTOFFIGURES Figure Page 1.ProposedMeansofDirectDigitalConversionofMicrowaveSignals................ 2 2.GeneralBlockDiagramofReferenceSignalSystem.......................................... 7 3.PPGDataProgrammingforPatternGeneration.................................................. 8 4.ExampleSpectraofaComplementaryPair....................................................... 10 5.PFDOutputVoltagevs.InputPhaseDifference............................................... 14 6.Inphi2080MXTimingDiagram........................................................................ 16 7.OverallControlSystemModel .......................................................................... 17 8.BlockModelofSignalStagesinPESU............................................................. 19 9.Stage1SchematicRevision1............................................................................ 22 10.Stage1SchematicRevision2.......................................................................... 23 11.IdealEventPulseManipulation....................................................................... 25 12.RMMOutputPulseWidthforExternalResistor/CapacitorCombinations..... 25 13.Stage2Schematics(Revision1leftandRevision2right).............................. 26 14.IdealResponseofPFDtoSimilarFrequencyInputs....................................... 27 15.Stage3SchematicforRevision1 .................................................................... 28 16.Stage3SchematicforRevision2 .................................................................... 29 17.IdealIntegrationofPFDOutputs..................................................................... 30 18.ActiveFilterBaseforStage3.......................................................................... 31 19.PLLSystemClosedLoopBodePlot ............................................................... 33 20.PrototypeofRevision1PESU......................................................................... 34 viii LISTOFFIGURES-CONTINUED Figure Page 21.FinalRevisionoftheCircuitBoard(unloaded)............................................... 35 22.FinalVersionofPESU(loaded) ...................................................................... 36 23.LabeledPESUUnit.......................................................................................... 36 24.IdealPESUSimulationBlockDiagram........................................................... 37 25.ActualSPICESimulationModelofPESUinSystem..................................... 38 26.ModeledTransientResponseofPESUinSystem........................................... 39 27.ClosedLoopFrequencyResponseofPESUinSystem................................... 40 28.SetupforTestingtheSystemFrequencyResponse......................................... 42 29.ComparisonofModeledandObservedSystemClosedLoopBandwidth ...... 43 30.SSH-ADCReferenceSignalSystemSetup ..................................................... 45 31.PatternTriggerMisalignmentatEquipmentStart-up...................................... 46 32.PatternTriggerAlignmentwithPESUat100nsperdivision.......................... 46 33.PatternTriggerAlignmentwithPESUat100psperdivision.......................... 47 34.ModulationSignalfromPESUduringTriggerPhaseLock ............................ 49 35.FullPatternDataAlignmentwithPESU ......................................................... 50 36.MinimumAchievedDataEdgeAlignment ..................................................... 51 37.BitAlignmentStabilityofPESU..................................................................... 52 38.EyeDiagramofMultiplexedPattern1 ............................................................ 54 39.EyeDiagramofMultiplexedPattern2 ............................................................ 54 40.PPGDataStreamJitterwithRespecttotheReferenceTriggerSignal
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