Acceleration of Applications with FPGA-Based Computing Machines: Code Restructuring
FACULDADE DE ENGENHARIA DA UNIVERSIDADE DO PORTO Acceleration of Applications with FPGA-Based Computing Machines: Code Restructuring Tiago Lascasas dos Santos Mestrado Integrado em Engenharia Informática e Computação Supervisor: João M. P. Cardoso, PhD Co-supervisor: João Bispo, PhD July 31, 2020 c Tiago Santos, 2020 Acceleration of Applications with FPGA-Based Computing Machines: Code Restructuring Tiago Lascasas dos Santos Mestrado Integrado em Engenharia Informática e Computação Approved in oral examination by the committee: Chair: Prof. João Paulo de Castro Canas Ferreira, PhD External Examiner: Dr. José Gabriel de Figueiredo Coutinho, PhD Supervisor: Prof. João Manuel Paiva Cardoso, PhD July 31, 2020 Abstract Field-programmable gate arrays (FPGAs) can be used to accelerate performance-critical programs from a wide range of fields and still providing energy-efficient solutions. Programs written in high level languages, such as C and C++, can be compiled to FPGAs through High-level Synthesis (HLS). Although FPGAs benefit the most from parallel and data-streaming applications, efficient compilation to FPGAs is a problem for both tools and developers. Most applications do not follow these patterns, and extensive code restructuring and the use of HLS directives need to be applied to a program in order to take advantage of FPGAs. Code restructuring and the use of HLS directives often needs to be manually performed by an experienced developer, and as such there is a need to automate this process. This dissertation proposes a framework that automatically optimizes C code via directives, using a source-to-source compiler on a stage prior to HLS. This optimization is primarily applied by strategies that select, configure and insert directives on the code to be input to an HLS tool, e.g., Vivado HLS, in order to synthesize more efficient hardware accelerators.
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