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Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

Digital Transceiver using H-Ternary Line Coding Technique A. Mahadevan Abstract – In this paper “Digital In the other hand, it can be defined as the Transceiver using Hybrid Ternary representation of binary 1s and 0s in Technique” gives the details about various serial-bit signaling formats is digital transmitter and receiver with known as line cods. The main objective the design of a hybrid ternary line of the is to find the suitable form coding. Current applications of line of the transmitted message signal so that codes are enormous in data to minimize noise effects on the message transmission networks and in recording existing on the channel. Current and storage of information systems. applications of line codes are enormous in The applications include local and wide data transmission networks and in area networks both wireless and wire recording and storage of information connected and the technology of the systems. The applications include Local digital subscriber loops networks. A Area Network (LAN) and Wide Area coding technique named hybrid ternary Network (WAN) both wireless and wire line code can be derived from three connected, ISDN and the of the digital popular line codes NRZ-L, dicode NRZ subscriber loops networks. The place of and polar RZ. the line coding in a communication systems is as shown in Fig. 1. The output Keywords: - Binary Line Code, Ternary of the multiplexer is coded into electrical Line Code, FSK , FSK pulses or waveforms for the purpose of Demodulation, VCO, PLL and Power transmission over the channel. Line codes Spectral Density (PSD) for binary data transmission generally classified into three ways. The first type is 1 Introduction still in binary in nature, but the code Line coding is the process of converting a structure is modified to improve the code sequence of 1s and 0s to a time domain properties. The second type of line signal (a sequence of pulses) suitable for codes are ternary codes which operate on transmission over a channel. three signal levels (+, 0, and -). The third type of line codes are called as multilevel

Manuscript submitted on December 30, 2006; accepted codes which has more than three output January 30, 2007. levels. The encoder and decoder circuits A.Mahadevan, PG Student, Department of ECE, Adhiyamaan Engineering College, AERI, Hosur, Tamil can be able to simulate and implement by Nadu, India 635 109 (e-mail: [email protected])

ISBN:978-988-98671-5-7 WCE 2007 Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

Low-Pass Channel Error Coding Input for security / Line Coder or signal Multiplexing Band-Pass Modulator Channel

Fig.1 Place of line coding in the communication system modulator (FSK) stage which is used to using simple combinational logic circuits. transmit the encoded PN sequences The digital modulation technique called through the channel. In this project, the Frequency Shift Keying (FSK) is used in channel is considered as a wired channel. the modulator and demodulator. Then, the A block diagram of the transmitter is as Power Spectral Density (PSD) of the H- shown in the Fig. 2. Ternary code is analyzed by comparing with other line codes like as unipolar NRZ, 3 Principles and Design of Bipolar NRZ and Manchester coding etc. H-Ternary Line Encoder with the help of MATLAB programming. This code worked on the basis of hybrid 2 Design of Digital Transmitter principle that combines three binary codes. The polar NRZ (NRZ-L), dicode NRZ The transmitter has consisted of three and Polar RZ codes are involved in the major blocks. One is the binary random Hybrid Ternary line coding [1]. Three data signal generator. This can be levels are used to represent the H-Ternary constructed by Pseudo-Noise (PN) or output. These are positive (+), negative (-) Pseudo-Random sequence generator. and zero (0). The state of the line code is Second is the H-Ternary line encoder in any one of the three levels. The state of stage. This stage is mainly concentrated in the next level of the line code is depends this project. And finally it has a digital on the input binary 1 or 0 and present

Clock PN H-Ternary FSK To Generator Generator Line Encoder Modulator Channel

Fig. 2 Block diagram of Transmitter

ISBN:978-988-98671-5-7 WCE 2007

Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

state of the line code. There is no frequency f0 called free running frequency. mathematical relation between this H- This frequency is determined by an ternary line code and the basic three codes external timing capacitor and an external NRZ-L, dicode NRZ and polar RZ codes. resistor. It can also be shifted to either

When the PN sequence is occurs like as side by applying a dc control voltage vc to 10101010…, the H-ternary code will acts an appropriate terminal of the VCO IC. as NRZ-L code. If the sequence of PN The frequency deviation is directly signal is occurs like as 1111111… or proportional to the dc control voltage and 000000…, the H-ternary code will be act hence it is called a Voltage Controlled as polar RZ and dicode NRZ. The Oscillator or, in short, VCO. The block function of the encoder is as shown in diagram of FSK modulator using VCO is state table 1. as shown in Fig. 3. Table 1 State table for encoder FSK H-ternary Leveling VCO Input Binary Output H-Ternary Encoded data Circuit output Present State Next State 1 0 + Fig. 3 Block diagram of FSK modulator 1 - + 1 + 0 0 - 0 0 + - 5 Design of Digital Receiver 0 0 - The receiver has consists of three major

blocks. One is the FSK demodulator for In order to get the design of the encoder, detecting the signal from the FSK output. the above table is modified as a truth table Second stage is H-ternary line decoder. by assigning values to +, 0 and – signs. And finally it has a clock recovery signal The values for +, 0 and – are assigned as for proper decoding process. The clock 10, 00 and 01 respectively. The encoder recovery circuit is essential for making circuit is designed from the Boolean synchronisation between transmitter and expression which is obtained from the receiver. A block diagram of the receiver truth table. The encoder circuit is is as shown in the Fig. 4. designed by simple combinational circuit FSK H-Ternary O/p and analog subtractor. From channel Demodulator Line Decoder 4 Design of FSK Modulator

The simplest method to generate the FSK signal is Voltage Controlled Oscillator Clock Recovery Circuit (VCO). The VCO is a free running multivibrator and operates at a set Fig. 4 Block diagram of receiver

ISBN:978-988-98671-5-7 WCE 2007

Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

6 Design of FSK Demodulator Table 2 State table for decoder The block diagram of FSK demodulator Input H- Output Binary Ternary Present Next State using Phase Locked Loop (PLL) is as State shown in Fig.5. FSK demodulation or + 1 1 + 0 1 0 1 1 PLL LPF Comparator 0 0 0 - 1 0

- 0 0 FSK Demodulated signal signal 8 PSD Analysis for Fig. 5 Block diagram of FSK demodulator H-Ternary and Other Codes detection can be directly achieved by Since, considering the input data sequence using PLL circuit. If the PLL center is random, stochastic analysis technique is frequency is designed at the FSK carrier adopted to find the PSD. The PSD frequency, the filtered output voltage of general expression of a is the circuit is the desired demodulated given by, signal, varying in value proportional to | S(f) | 2 +∝ the variation of the signal frequency. j 2π f k Tb Pc(f) = ------Σ R(k)e (1) k = -∝ Tb 7 Principles and Design of

H-Ternary Line Decoder where, S(f) is the Fourier transform of the The design of the H-ternary decoder is pulseshape and R(k) is the autocorrelation based on the state table 2. The decoding is function of the data. The spectrum of the a reverse process of the encoding digital signal depends on two things: (1) operation. The decoder input is in the the pulse shaped used and (2) statistical form of three bit H-ternary code and its properties of the data. And the above output is a two state binary signal. In equation (1) can be rewritten in a simpler order to design the decoder circuit , the series form as follows state table is modified to truth table by | S(f) | 2 assigning the values for +, 0, and – signs. +∝ Pc(f) = ------[R(0)+2 ΣR(k) cos (2πkfTb)] The decoder circuit consists of a clock k = 1 Tb (2) recovery circuit. This is used to

synchronize the transmitter circuit with receiver circuit.

ISBN:978-988-98671-5-7 WCE 2007

Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

For the basic pulse s (t), has a rectangular by using the following method. The

pulse of unit amplitude and duration Tb. following table 3 shows the binary input Hence, the Fourier transform of s(t) and it’s H – Ternary outputs with the equals product of the designated signal levels.

S(f) = Tb sinc (fTb) (3) The probability of each case is also

The statistical properties of the data is Table 3 Determination of the auto- referenced to the autocorrelation function correlation function R(1) of the line code that is given by Binary H – Product of l Input Ternary T1 and T2 R(k) = Σ ( A m A m + k ) i Pi (4) Output i = 1 00 -0 0 01 -+ - 10 +- - 11 +0 0 where, Am and Am+k are the signal levels Summation of product - 2 that correspond to the mth and m+kth symbol positions that represent the line depending on the number of H – Ternary

code respectively and Pi is the probability symbols that are considered. For example, th of having the i A m and Am+k product. To from the above tables, the probabilities of calculate the autocorrelation function of each symbols are P1=¼, P2=1/8, P3=1/16 symbols, it needed to calculate the value and so on. By using the eqn (5), the of R(0). The probability of occurrences of autocorrelation function for each case is each symbol of the H – Ternary line code calculated as R(1)=(-2) ( ¼) = - ½ , R(2) = is equal. This gives the probability of the (+2)(1/8)=¼ and R(3) = (-2) (1/16) = -1/8. three transmitted code levels are equal. The overall autocorrelation functions for

Therefore the probabilities are given as P+ all values of k excluding k = 0, is given as R(k) = 2 [-1k / 2 k+1] = (-1/2) k (6) = P0 = P- = 1/3. The autocorrelation R(k) can be calculated by using the eqn. (4). Substituting the eqn. (5) and eqn. (6)

together with eqn. (3) into eqn. (2) gives R(k) = Σ ( A m A m + k ) i Pi 2 2 the PSD of the H – Ternary line code that R(0) = 1/N [N/3 (+1) + N/3 (-1) + N/3 (0)2] = 2/3 (5) is,

If k = 0, R(k) is calculated for N signal +∝ 2 (Tb) sinc (fTb)[R(0)+2ΣR(k)cos(2πkfTb)] symbols and averaging the same signal k = 1 (7) symbols. If k ≠ 0, R(k) can be determined

ISBN:978-988-98671-5-7 WCE 2007

Proceedings of the World Congress on Engineering 2007 Vol I WCE 2007, July 2 - 4, 2007, London, U.K.

The PSD of the H–Ternary line code is a due to involving memory elements in the re-shaped form of the Fourier transform of circuits. PSD analysis of the H-ternary a rectangular pulse having ±A amplitude line coding is done by MATLAB 7.0

and duration of Tb. So, the above equation can be rewritten as

2 2 A (Tb)sinc (fTb)[R(0)+2ΣR(k)cos(2πkfTb)] (8)

The above eqn. (8) is known as the power spectral density (PSD) of the H-Ternary line code. Similarly, the PSD for the other codes are calculated and given as Fig. 7 PN signal and H-Ternary follows, encoded signal 2 2 Polar NRZ = A Tb sinc (fTb) 2 2 2 Bipolar NRZ = A Tbsinc (fTb) sin (πfTb) 2 2 Unipolar NRZ = [(A Tb)/4][sinc (fTb)]

[1+ (1/Tb) δ(f) ] 2 2 2 BipolarRZ =A Tb/4sinc (fTb/2)sin (πfTb)

9 Simulation Results And Fig. 8. Transmitted and Received PSD Analysis PN signals The simulated graph is as shown in figure 6. The PN signal and H-ternary encoded signals of the implemented system are shown in figure 7. The transmitted and received PN signals are as shown in figure 8. The results are giving 2 bit time delay

Figure 9 PSD for various line codes

References [1] Glass, A., Ali, B. and Bastaki, E. “Design and modeling of H-Ternary line encoder for digital data transmission”. International Conference on Info-Tech & Info-Net, Beijing, China, 2001, pp 503- 507.

Fig. 6 Simulation results of encoder and decoder

ISBN:978-988-98671-5-7 WCE 2007