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Design of a General Purpose 8-Bit RISC Processor for Computer Architecture Learning Design of a General Purpose 8-bit RISC Processor for Computer Architecture Learning Antonio Hernández Zavala1, Oscar Camacho Nieto3, Jorge A. Huerta Ruelas1, Arodí R. Carvallo Domínguez2 1 Instituto Politécnico Nacional, Centro de Investigación en Ciencia Aplicada y Tecnología Avanzada, Mechatronics Department, Querétaro, Mexico 2 Instituto Politécnico Nacional, Unidad Profesional Interdisciplinaria en Ingeniería y Tecnologías Avanzadas, Engineering Department, Mexico City, Mexico 3 Instituto Politécnico Nacional, Centro de Innovación y Desarrollo Tecnológico en Cómputo, Mexico City, Mexico {anhernandezz, ocamacho, jhuertar, acarvallo}@ipn.mx Abstract. Computers are becoming indispensable for Computer types differ in the amount of manipulating most everyday consumer products, information they can process. As information is ranging from communications and domestic electronics grouped into 8-bit data packages, there are 8, 16, to industrial processes monitoring and control. High 32, and 64-bit computers. Today’s devices such as performance computer design is not only subject to the desktops, laptops, notebooks, or tablets are 32 and technology used for its implementation, it is also a matter of efficient training. The skills that must prevail in a good 64-bit computers. For specific tasks in computer designer come from the type of courses taken communication, automotive, and industrial and the tools employed during them. This work shows appliances, 16-bit computers are commonly used. the design of an 8-bit RISC soft-core processor However, 8-bit computers are the number one dedicated to a complete understanding of computer sales processors in the world as they are used as architecture. We consider this Processor an effective controllers for simple computational tasks. hands-on training solution for the comprehension of a According to the divide and conquer principle, a computer from its lowest level up to testing. common personal computer is divided into smaller Keywords. Computer architecture, digital design, digital ones (commonly 8-bit) which share information logic, microprocessor, programmable logic devices, with the main computer (32 or 64-bit). An 8-bit training system. processor commonly manipulates the drivers for almost every component card inside a computer. It is noteworthy to mention that 8-bit type processors 1 Introduction are widely used in home appliances and industrial specific systems. Nowadays, computers perform required In order to train engineering students in the calculations for almost all electronic devices in the computer architecture field, it becomes necessary market. Computer hardware is build based upon to have the correct tools. In this sense, there have binary operations to satisfy a set of mathematical, been different approaches in which students use data transfer, and control instructions. The basic hardware or software tools with the purpose of instructions realized directly by hardware are understanding the processor architecture. known as the processor instruction set. It is used Our purpose is to provide students with a for the creation of structured software programs for flexible but consistent tool for understanding data manipulation in problem solving. computer architecture from its basics. This work Computación y Sistemas, Vol. 19, No. 2, 2015, pp. 371–385 ISSN 1405-5546 doi: 10.13053/CyS-19-2-1941 372 Antonio Hernández Zavala, Oscar Camacho Nieto, Jorge A. Huerta Ruelas, Arodí R. Carvallo Domínguez presents the design of an 8-bit data width 4. Hardware Description Languages HDL. Each processor with the Harvard architecture and the functional unit is programmed using an HDL Reduced Instruction Set (RISC) for educational (Verilog or VHDL) which is compiled to create a purposes. It includes a basic instruction set and all logical array for the processor description. Next the functional blocks such as program and data step is to download it into a device. This memories, general-purpose registers, and a simple approach is fast to carry out and implement. Arithmetical Logical Unit (ALU) for basic 5. Logic blocks. This approach is also intended operations. Its operating mode is multi-cycle for programmable logic devices based in the execution due to its easy visualization and use of basic logical gates. The construction of effectiveness. The processor implementation is in each functional unit is by means of the union of a Xilinx Spartan-3E FPGA. pre-constructed blocks. This approach allows The organization of the paper is as follows: students to fully understand a processor from Section 2 explains current methodologies used in its basics along with its integration and the computer architecture courses. Section 3 synchronization of the functional blocks. introduces some general and basic concepts concerning computer architecture. Section 4 In the paper category, Stuart Madnick designed presents the processor development, describing the “Little Man Computer LMC” in 1965 [2] to teach the operation of each functional unit. Finally, students. Nowadays, there is a modern version of Section 5 presents the results from tests and his 3-digit Von Neumann computer which has all compilations, along with a comparative discussion. the basic computer features and it can be programmed either in machine code or in assembly code. These new versions include a 2 Computer Architecture Education graphical user interface and a compiler. Another paper approach is the “CARDIAC” computer It is noteworthy that the educational processors developed by David Hagelbarger and Saul theme has been widely explored since Edmund Fingerman from Bell Laboratories in 1968 [3], it is Berkeley and Robert Jensen made the first 2-bit a processor made of cardboard which nowadays is desktop computer implementation using relays in implemented in a simulator software. Finally, the 1950 [1]. Since then, there have been five different “Paper Processor” developed by Saito Yutaka in approaches used to explain computer architecture: 2010 [4] is another tool to understand processor behavior. 1. Paper. This was the first approach to teach In the hardware approach there are many computer architecture because of the limited proposals starting with [1] which is a 2-bit relay computer availability. It was based on the use based computer. In this approach it is common to of pencil and paper to understand the use MSI digital components such as TTL’s to instruction execution flow by means of construct a computer as in the 16-bit Glen G. drawings. Finally, with high limitations, students Langdon “SC-16” processor in 1982 [5], the 32-bit were able to understand the general functioning Hennessy-Patterson “DLX” processor in 1990 [6] of a computer. which was based on the MIPS and is still used with 2. Simple Hardware. This type of computer is TTL’s by ElAarag in [7]. The 16-bit Bradford constructed using available technology. There Rodriguez “PISC” Processor in 1994 [8] and the are relay and TTL versions that can show the 32-bit MIT “Beta” processor in 1997 [9] are based physical interaction among the computer on the DEC computer. The hardware approach for modules. Its main disadvantage is the time computer architecture courses is a very good invested in the wiring process. exercise to synchronize data transfer between 3. Simulator. This is a software-based simulator functional blocks, although using wires to build that allows the execution of a code to see how those complex connections is extremely time- each functional unit works in a computer. The consuming. disadvantage is that it does not allow interaction There are several simulation tools for the with physical devices. computer architecture teaching approach [10-16]. Computación y Sistemas, Vol. 19, No. 2, 2015, pp. 371–385 ISSN 1405-5546 doi: 10.13053/CyS-19-2-1941 Design373 of a General Purpose 8-bit RISC Processor for Computer Architecture Learning Most of these are graphical environments in which word (64-bit). This is how computers are classified the student can see all the functional modules of a according to the amount of information they can processor and data transfer among them. It also process (i.e. 8, 16, 32, 64-bit). allows the interaction to make variations in the All computers perform data transfer instructions testing code, registers, or memories. These in order to interchange data among the different characteristics are advantageous given that there memories and peripherals. There are integer is no need to have physical processors. At the arithmetic processors, floating point processors, same time it is its weakness, since there is no digital signal processors, and application specific interaction with physical devices. processors. Integer arithmetic processors are best For the case of the HDL language approach suited for general-purpose applications. Thus, it is implementations, there are also many types of possible to find byte, word, dword, and qword sized didactical processors in 8, 16, and 32-bit versions general-purpose processors. [17, 23]. This option allows the physical According to the architecture of the functional construction of a simple computer by using FPGA elements, there are two architectures: the Von devices programmed by HDL language. The Neumann architecture and the Harvard advantage is that the time required to develop a architecture. The main difference is in the memory processor is short, but the main disadvantage is elements, given that the Von Neumann the lack of understanding of the physical data flow architecture shares the program and data memory induced by programming. in a single bus connection. The Harvard In the logic blocks approach, the option is to architecture has two separate memories for build a simple computer by using schematic mode. program and data, each with an independent bus A graphical user interface allows gate level design connection. There are also architectural by placing components in a spreadsheet. It is easy techniques applied to any case in order to increase to use, and data flow between the components is the performance such as pipelining and straightforward. It is even more comprehensive if parallelism. we can create all of the functional blocks out of According to the technology used for the logical gates.
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