Embedded Magazine Issue 1, March 2005
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Issue 1 March 2005 Embeddedmagazine EMBEDDED SOLUTIONS FOR PROGRAMMABLE PROCESSING DESIGNS INSIDE Accelerated System Performance with APU-Enhanced Processing The New Virtex-4 FPGA Family with Immersed PowerPC Embedded Processing with Virtex and Spartan FPGAs High-Bandwidth TCP/IP PowerPC Applications Scalable Software-Defined Radio Emulate 8051 Microprocessor in PicoBlaze IP Core Optimize MicroBlaze Processors for Consumer Electronics Products Xilinx Embedded Processing with Optos R EMBEDDED MAGAZINE ISSUE 1, MARCH 2005 CONTENTS Introducing the New Virtex-4 FPGA Family . .6 Accelerated System Performance with APU-Enhanced Processing . .10 Sign of the Times . .14 Xilinx Teams with Optos . .18 What Customers and Partners are Saying about Xilinx Embedded Processor Solutions . .22 Considerations for High-Bandwidth TCP/IP PowerPC Applications . .24 Configure and Build the Embedded Nucleus PLUS RTOS Using Xilinx EDK . .27 MicroBlaze and PowerPC Cores as Hardware Test Generators . .30 Nohau Shortens Debugging Time for MicroBlaze and Virtex-II Pro PowerPC Users . .34 A Scalable Software-Defined Radio Development System . .37 Nucleus for Xilinx FPGAs – A New Platform for Embedded System Design . .40 Emulate 8051 Microprocessor in PicoBlaze IP Core . .44 Optimize MicroBlaze Processors for Consumer Electronics Products . .48 Use an RTOS on Your Next MicroBlaze-Based Project . .50 UltraController-II Reference Design . .53 Welcome to the inaugural edition of the new Xilinx Embedded Magazine and the Embedded Systems Conference 2005. Embeddedmagazine In this, our first edition of Embedded Magazine, we have assembled a host of articles representing a wide range of embedded processing applications. During the last few years, Xilinx®, our partners, and EDITOR IN CHIEF Carlis Collins W [email protected] our customers have developed and shared a vision to build and assemble all of the elements required 408-879-4519 for a complete and robust range of embedded processing solutions for FPGA technologies. Included in this magazine and at the Embedded Systems Conference 2005 are examples and MANAGING EDITOR Forrest Couch [email protected] demonstrations of state-of-the-art commercial applications, real-time operating systems, multi- 408-879-5270 processor debugging environments, testing of complex hardware modules, and high-speed Internet communication protocols. ASSISTANT MANAGING EDITOR Charmaine Cooper Hussain Last year, we made significant strides in the embedded processing arena. In July, we announced the formation of the Embedded Processing Division, reinforcing our commitment to the increasingly XCELL ONLINE EDITOR Tom Pyles [email protected] diverse and evolving embedded systems market. This division brings talent and technology togeth- 720-652-3883 er in an organization that intends to accelerate development of an even wider range of embedded system solutions, optimizing the full capabilities of our silicon architectures at multiple perform- ADVERTISING SALES Dan Teie ance and price points. 1-800-493-5551 In September, Xilinx launched our breakthrough Virtex™-4 family of products, featuring embed- ded processing solutions with PicoBlaze™ and MicroBlaze™ soft-processor cores and PowerPC™ ART DIRECTOR Scott Blair (available on all Virtex-4 FX devices). The Virtex-4 FX device includes the new PowerPC Auxiliary Processor Unit (APU) controller to easily connect the CPU to the FPGA fabric, enabling the implementation of acceleration hardware for virtually any application. Once only the domain of www.xilinx.com/xcell/embedded high-budget ASIC and ASSP design teams, the Virtex-4 FPGA’s architectural ability to combine application-specific hardware acceleration with the high-performance PowerPC and MicroBlaze processor shatters the traditional barriers of cost, time to market, and risk. In February 2005, our Xilinx Platform Studio (XPS) embedded tool suite received top honors at the inaugural International Engineering Consortium (IEC) DesignVision Awards. Judged by inde- pendent industry experts, XPS was selected in the FPGA/PLD Design Tools category for its inno- vation, uniqueness, market impact, customer benefits, and value to society. We have an exciting lineup of events at the conference, showcasing both Xilinx and our partners’ latest solutions. The Xilinx booth (#1525) will feature our award-winning Xilinx Platform Studio, as well as the latest Virtex-4 FX solution; our flexible PicoBlaze and MicroBlaze soft processors with Xilinx, Inc. Spartan™-3 devices; and our high-performance DSP solutions. 2100 Logic Drive San Jose, CA 95124-3400 Phone: 408-559-7778 I hope you find the conference and our first edition of Embedded Magazine informative and inspir- FAX: 408-879-4780 ing. We invite you to unlock the power of Xilinx programmability. The advantages will change the way embedded systems are designed. © 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx Logo, and otherdesignated brands included herein are trademarks of Xilinx, Inc. PowerPC is a trade- mark of IBM, Inc. All other trademarks are the propert y of their respective owners. The articles, information, and other materials included in this issue are provided solely for the convenience of our readers. Xilinx makes no warranties, express, implied, Mark Aaldering statutory, or otherwise, and accepts no liability with respect to any such articles, information, or other materials or Vice President their use, and any use thereof is solely at the risk of the user. Any person or entity using such information in any Embedded Processing way releases and waives any claim it might have against & IP Divisions Xilinx for any loss, damage, or expense caused thereby. Theatre Presentations in Xilinx Booth #1525 Hands-On Workshops Switching Fabrics at Layers 1 and 2 Network Systems Design Seminar: NSD-707 A Complete Spectrum of Programmable Processing Solutions Implementing a Virtex-4 FX PowerPC System with Tuesday, March 8: 1:30 p.m., 4:30 p.m., 7 p.m. Floating-Point Co-Processor Using Platform Studio Wednesday, March 9: 8:30 a.m.–10:00 a.m. Wednesday, March 9: 12 p.m., 3 p.m., 5:30 p.m. Instructor: Glenn Steiner Presenter: Hamish Fallside, Xilinx, Sr. Manager, Thursday, March 10: 10:30 a.m., 1:30 p.m. Following a brief presentation, this workshop will provide Networking Systems Solutions Boot a Live Embedded System in Just 15 Minutes hands-on experience implementing a PowerPC processor sys- Tuesday, March 8: 2 p.m., 5 p.m., 7:30 p.m. tem demonstrating code acceleration through an FPU co- Hardware/Software Codesign for Platform FPGAs processor. You will create the design utilizing the award-win- Wednesday, March 9: 12:30 p.m., 3:30 p.m., 6 p.m. Embedded Training Program: ETP-423 Thursday, March 10: 11 a.m. ning Platform Studio tool suite and target actual hardware. The application will demonstrate code acceleration via the Thursday, March 10: 11:15 a.m.–12:45 p.m. Breakthrough Performance with Virtex-4 FPU with graphical display of the output. Presenter: Don Davis, Xilinx, Sr. Manager, High-Level Tools Tuesday, March 8: 2:30 p.m., 5:30 p.m. Location: Room 256 Tuesday, March 8: Wednesday, March 9: 10:30 a.m., 1 p.m., 4 p.m., 6:30 p.m. Software-Defined Radio with 10:00 a.m.–11:30 a.m. Thursday, March 10: 12 p.m. Reconfigurable Hardware and Software 2:00 p.m.–3:30 p.m. Eclipse-Based HW/SW Debug 4:00 p.m.–5:30 p.m. Embedded Training Program: ETP-442 Tuesday, March 8: 3 p.m., 6 p.m. Thursday, March 10: 2:00 p.m.–3:30 p.m. Wednesday, March 9: 11 a.m., 1:30 p.m., 4:30 p.m. Accelerating an IDCT Software Application Using the Presenter: Peter Ryser, Xilinx, Thursday, March 10: 9:30 a.m., 12:30 p.m. Configurable MicroBlaze 32-bit RISC Processor Embedded SW Systems Engineer Manager Breakthrough DSP Performance at the Lowest Cost Instructor: Derek Palmer Tuesday, March 8: 3:30 p.m., 6:30 p.m. Utilizing the new Fast Simplex Link (FSL) port on the Xilinx Other Xilinx-Related Technical Papers Wednesday, March 9: 11:30 a.m., 2 p.m., 5 p.m. MicroBlaze soft-core processor, we can add dedicated low-laten- Designing with Embedded Processor Cores in FPGAs Thursday, March 10: 10 a.m., 1 p.m. cy co-processing engines tuned specifically for any application Easy Paths to Silicon Design Seminar: EPD-524 Xilinx Distributor Presentations at hand. We will demonstrate a 10X performance improvement Tuesday, March 8: 4 p.m. – Presenter: Insight/Memec of an inverse discrete cosine transform (IDCT) algorithm, uti- Monday, March 7: 11:00 a.m.–12:30 p.m. Wednesday, March 9: 2:30 p.m. – Presenter: Avnet lizing a Spartan-3 platform for hands-on experience. Presenter: Avnet Thursday, March 10: 11:30 a.m. – Presenter: Nu Horizons Location: Room 256 Wednesday, March 9: Designing with IP in FPGAs 10:00 a.m.–11:30 a.m. Easy Paths to Silicon Design Seminar: EPD-544 2:00 p.m.–3:30 p.m. Product Demonstrations in Xilinx Booth #1525 4:00 p.m.–5:30 p.m. Monday, March 7: 1:30 p.m.–3:00 p.m. Intelligent Tools Accelerate Development Presenter: Avnet We will use the Xilinx Platform Studio tool suite to create an embedded High-Performance DSP on an FPGA Made Easy Implementing DSPs in FPGAs hardware/software/IP system and boot a real-time operating system. Instructor: Sabine Lam We will show how Platform Studio accelerates embedded processing Easy Paths to Silicon Design Seminar: EPD-604 development for programmable systems through the IDE, as well as In this DSP workshop, designers will learn how to implement Tuesday, March 8: 8:30 a.m.–10:00 a.m. high-performance DSP designs using the new Xilinx Virtex-4 powerful design wizards, BSP, and application code generators. Presenter: Avnet FPGAs. By leveraging tools such as Xilinx System Generator Low Cost and Flexible Processing for DSP, IP cores, and hardware, even designers new to FPGAs Designing with Soft-Processor Cores in FPGAs, Part 1 Come see the new Spartan-3 SP305 board implementing complex embed- will realize the capability and ease-of-use of Xilinx DSP Embedded Training Program: ETP-309 ded motor control using the MicroBlaze soft 32-bit processor, a floating design solutions.