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Brain-Inspired Computing Using Phase-Change Memory Devices

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Brain-Inspired Computing Using Phase-Change Memory Devices RZ 3946 (# ZUR1806-019) 06/08/2018 Electrical Engineering 15 pages Research Report Tutorial: Brain-Inspired Computing using Phase-Change Memory Devices Abu Sebastian,1 Manuel Le Gallo,1 Geoffrey W. Burr,2 Sangbum Kim,3 Matthew BrightSky,3 Evangelos Eleftheriou1 1IBM Research – Zurich 8803 Rüschlikon Switzerland 2IBM Research – Almaden San Jose, CA USA 3IBM Research T. J. Watson Research Center Yorktown Heights, NY USA This is the accepted version of the article. The final version has been published by AIP: Abu Sebastian, Manuel Le Gallo, Geoffrey W. Burr, Sangbum Kim, Matthew BrightSky, Evangelos Eleftheriou "Tutorial: Brain-inspired computing using phase-change memory devices," in Journal of Applied Physics, 124 (11), 111101 (2018), 10.1063/1.504241, licensed under a Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/), except where otherwise noted © 2018 Author(s). LIMITED DISTRIBUTION NOTICE This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies (e.g., payment of royalties). Some reports are available at http://domino.watson.ibm.com/library/Cyberdig.nsf/home. Research Africa • Almaden • Austin • Australia • Brazil • China • Haifa • India • Ireland • Tokyo • Watson • Zurich This manuscript was published in: Journal of Applied Physics, volume 124, 111101 (2018) Link to published article: https://aip.scitation.org/doi/10.1063/1.5042413 DOI: https://doi.org/10.1063/1.5042413 Tutorial: Brain-inspired computing using phase-change memory devices Abu Sebastian,1 Manuel Le Gallo,1 Geoffrey W. Burr,2 Sangbum Kim,3 Matthew BrightSky,3 and Evangelos Eleftheriou1 1)IBM Research – Zurich, Saumerstrasse¨ 4, 8803 Ruschlikon,¨ Switzerland 2)IBM Research – Almaden, San Jose, CA, USA 3)IBM Research, T. J. Watson Research Center, Yorktown Heights, NY, USA There is a significant need to build efficient non-von Neumann computing systems for highly data-centric artificial intelligence related applications. Brain-inspired computing is one such approach that shows significant promise. Mem- ory is expected to play a key role in this form of computing and in particular, phase-change memory (PCM), arguably the most advanced emerging non-volatile memory technology. Given a lack of comprehensive understanding of the working principles of the brain, brain-inspired computing is likely to be realized in multiple levels of inspiration. In the first level of inspiration, the idea would be to build computing units where memory and processing co-exist in some form. Computational memory is an example where the physical attributes and state dynamics of memory devices are exploited to perform certain computational tasks in the memory itself with very high areal and energy efficiency. In a second level of brain-inspired computing using PCM devices, one could design a co-processor comprising multiple cross-bar arrays of PCM devices to accelerate training of deep neural networks. PCM technology could also play a key role in the space of specialized computing substrates for spiking neural networks and this can be viewed as the third level of brain-inspired computing using these devices. I. INTRODUCTION FIG. 1. Most of the algorithms related to artificial intelligence run on conventional computing systems such as central processing units (CPUs), graphical processing units (GPUs) and field programmable gate arrays (FPGAs). There is also a significant recent interest in application specific integrated circuits (ASICs). In all these computing systems, the memory and processing units are physically separated and hence a significant amount of data need to be shuttled back and forth during computation. This creates a performance bottleneck. We are on the cusp of a revolution in artificial intelligence (AI) and cognitive computing. The computing systems that run today’s AI algorithms are based on the von Neumann architecture where large amounts of data need to be shuttled back and forth at high speeds during the execution of these computational tasks (see Fig. 1). This creates a performance bottleneck and also leads to significant area/power inefficiency. Thus, it is becoming increasingly clear that to build efficient cognitive computers, we need to transition to novel architectures where memory and processing are better collocated. Brain-inspired computing is a key non-von Neumann approach that is being actively researched. It is natural to be drawn to the human brain for inspiration, a remarkable engine of cognition that performs computation on the order of petaops per joule thus providing an “existence proof” for an ultra low power cognitive computer. Unfortunately, we are still quite far from having a comprehensive understanding of how the brain computes. However, we have uncovered certain salient features of this computing system such as the collocation of memory and processing, a computing fabric comprising large-scale networks of neurons and plastic synapses and spike-based communication and processing of information. Based on these insights, we could begin to realize brain-inspired computing systems at multiple levels of inspiration or abstraction. 2 FIG. 2. a Phase-change memory is based on the rapid and reversible phase transition of certain types of materials between crystalline and amorphous phases by the application of suitable electrical pulses. b Transmission electron micrograph of a mushroom-type PCM device in a RESET state. It can be seen that the bottom electrode is blocked by the amorphous phase. In the brain, memory and processing are highly entwined. Hence the memory unit can be expected to play a key role in brain-inspired computing systems. In particular, very high-density, low-power, variable-state, programmable and non-volatile memory devices could play a central role. One such nanoscale memory device is phase-change memory (PCM)1. PCM is based on the property of certain compounds of Ge, Te and Sb that exhibit drastically different electrical characteristics depending on their atomic arrangement2. In the disordered amorphous phase, these materials have a very high resistivity while in the ordered crystalline phase, they have a very low resistivity. A PCM device consists of a nanometric volume of this phase change material sandwiched between two electrodes. A schematic illustration of a PCM device with a “mushroom-type” device geometry is shown in Fig. 2a. The phase change material is in the crystalline phase in an as-fabricated device. In a memory array, the PCM devices are typically placed in series with an access device such as a field effect transistor (FET) or a diode (typically referred to as a 1T1R configuration). When a current pulse of sufficiently high amplitude is applied to the PCM device (typically referred to as the RESET pulse), a significant portion of the phase change material melts owing to Joule heating. The typical melting temperature of phase-change materials is approx. 600 ◦C. When the pulse is stopped abruptly so that temperatures inside the heated device drop rapidly, the molten material quenches into the amorphous phase due to glass transition. In the resulting RESET state, the device will be in a high resistance state if the amorphous region blocks the bottom electrode. A transmission electron micrograph of a PCM device in the RESET state is shown in Fig. 2b. When a current pulse (typically referred to as the SET pulse) is applied to a PCM device in the RESET state, such that the temperature reached in the cell via Joule heating is high, but below the melting temperature, a part of the amorphous region crystallizes. The temperature that corresponds to the highest rate of crystallization is typically ≈ 400◦C. In particular, if the SET pulse induces complete crystallization, then the device will be in a low resistance state. In this scenario, we have a memory device that can store one bit of information. The memory state can be read by biasing the device with a small amplitude read voltage that does not disturb the phase-configuration. The first key property of PCM that enables brain-inspired computing is its ability to achieve not just two levels but a continuum of resistance or conductance values3. This is typically achieved by creating intermediate phase configurations by the application of suitable partial RESET pulses4,5. For example in Fig. 3a, it is shown how one can achieve a continuum of resistance levels by the application of RESET pulses with varying amplitude. The device is first programmed to the fully crystalline state. Thereafter, RESET pulses are applied with progressively increasing amplitude. The resistance is measured after the application of each RESET pulse. It can be seen that the device resistance, related to the size of the amorphous region (shown in red), increases with increasing RESET current. The curve shown in Fig. 3a is typically referred to as the programming curve. The programming curve is usually bidirectional (can increase as well as decrease the resistance by modulating the programming current) and is typically employed when one has to program a PCM device to a certain desired resistance value. This is achieved through iterative programming by applying several pulses in a closed-loop manner5. The programming curves are shown in terms of the programming current due to the highly nonlinear I-V characteristics of the PCM devices. A slight variation in the programming voltage would result in large variations in the programming current. For example, for the devices shown in Fig. 3, a voltage drop across the PCM devices of 0.5 V corresponds to 100 mA and 1.2 V corresponds to 500 mA. The latter results in a dissipated power of 600 mW and the energy expended assuming a pulse duration of 50 ns is 30 pJ.
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