Ep 1058396 A1

Europäisches Patentamt *EP001058396A1* (19) European Patent Office Office européen des brevets (11) EP 1 058 396 A1 (12) EUROPEAN PATENT APPLICATION (43) Date of publication: (51) Int Cl.7: H04B 1/30 06.12.2000 Bulletin 2000/49 (21) Application number: 99401316.7 (22) Date of filing: 01.06.1999 (84) Designated Contracting States: • Khlat, Nadim AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU 31270 Cugnaux (FR) MC NL PT SE • Clement, Patrick Designated Extension States: 1030 Bussigny (CH) AL LT LV MK RO SI (74) Representative: Joly, Jean-Jacques et al (71) Applicant: MOTOROLA, INC. Cabinet Beau de Loménie Schaumburg, IL 60196 (US) 158, rue de l’Université 75340 Paris Cédex 07 (FR) (72) Inventors: • Hietala, Alex Phoenix, Arizona 85048 (US) (54) Very low IF receiver circuit and method (57) Apparatus 20,30,50,60 for receiving a carrier generating first and second signals at a frequency which signal modulated by a wanted signal, the modulated car- is not an integral multiple of half the channel spacing rier signal occupying one of a plurality of channels whereby when the received carrier signal is mixed with whose central frequencies are separated from one an- the first and second signals, a complex, digital Very Low other by a fixed frequency referred to as the channel Intermediate Frequency (VLIF) signal is generated in spacing, the apparatus including a local oscillator 28 for which the wanted signal is centred about a VLIF which is slightly larger than half the channel spacing. EP 1 058 396 A1 Printed by Jouve, 75001 PARIS (FR) EP 1 058 396 A1 Description Field of the Invention 5 [0001] The present invention relates to a method and apparatus for receiving a signal, and in particular to a radio receiver, for use in a portable communications device, in which the radio signal to be received is directly down converted to In-phase (I) and Quadrature-phase (Q) signals centred around an Intermediate Frequency (IF) which is of the same order of magnitude as the bandwidth of the signal to be received. 10 Background of the Invention [0002] Most conventional radio receivers for use in portable communication devices such as cellular telephones, are of the super-heterodyne type in which a radio signal to be received is first down-converted to an intermediate frequency (which is still in the radio-frequency (rf) range) and then further down-converted to a base-band signal (having both I 15 and Q components) from which the information contained in the signal may be recovered. Such a receiver is robust. However, direct conversion receivers and, more recently, very low IF receivers have been proposed in order to reduce costs by eliminating both a relatively high performance, and therefore expensive, Surface Acoustic Wave (SAW) band- pass filter (for allowing the wanted IF signal to pass while blocking all unwanted IF signals in neighbouring channels) and one of the two rf local oscillators required in super-heterodyne receivers. 20 [0003] Direct conversion receivers immediately down convert the received radio signal to a base-band signal thus completely eliminating the IF stage. However, such receivers suffer from the formation of a very large unwanted dc component interfering with the base-band signal. This dc component is formed largely by leakage from the local oscillator being received at the receiver aerial together with the wanted signal, and also by offsets of the amplifiers and mixers in the receivers. 25 [0004] In order to overcome this problem, a very low IF receiver has been proposed in which the received signal is first down-converted to be centred about an IF which is equal to half the channel spacing (i.e. half the bandwidth of the wanted signal), and then it is down-converted again to base-band. In this way, the dc component which is still formed when the first down-conversion takes place, is located (in frequency) at the very edge of the wanted signal. From here, the unwanted dc component should be able to be relatively easily removed by suitable filtering of the dc 30 component, without losing (very much) information contained in the wanted signal because of the dc component's location at the very edge of the wanted signal. [0005] The choice of exactly half of the channel spacing is convenient because a suitable frequency for producing such an IF signal (the suitable frequency being the central frequency of the wanted channel plus or minus the wanted IF signal (i.e. half the channel spacing)) may be generated by an oscillator, operating at half the channel spacing, used 35 in conjunction with a phase locked loop to generate multiples of half of the channel spacing. Summary of the Invention [0006] According to a first aspect of the present invention, there is provided apparatus for receiving a carrier signal 40 modulated by a wanted signal, the modulated carrier signal occupying one of a plurality of channels whose central frequencies are separated from one another by a fixed frequency referred to as the channel spacing, the apparatus including a local oscillator for generating first and second signals at a frequency which is not an integral multiple of half the channel spacing whereby when the received carrier signal is mixed with the first and second signals, a complex, digital Very Low Intermediate Frequency (VLIF) signal is generated in which the wanted signal is centred about a VLIF 45 which is slightly larger than half the channel spacing. [0007] Preferably, the VLIF about which the wanted signal is centred is between 10 and 20 per cent larger than half the channel spacing. Such a choice of IF is particularly advantageous for complex modulation schemes in which each symbol represents two or more bits, as will be required for the evolving standard known as EDGE (Enhanced Data- rate GSM Evolution), and corresponding standards in the US, as with these modulation schemes, it has been surpris- 50 ingly discovered by the present inventors that significant information is contained in the edge portions of the signal (i. e. up to plus and minus half the channel spacing from the centre of the signal), the loss of which can give rise to an unacceptably large bit or block error rate. An example of a complex modulation scheme in which significant information is contained at the very edge of the channel is 8QPSK (8-position Quadrature Phase Shift Keying) where each symbol represents 3 bits. 55 [0008] Preferably, the local oscillator is a fractional-N phase locked loop (fracNpll). Preferably, the fracNpll is a multi- accumulator fracNpll. [0009] Preferably, the apparatus further comprises a complex multiplier for down-converting the wanted signal from being centred about a VLIF to a base-band signal while substantially removing any unwanted image signals. Preferably, 2 EP 1 058 396 A1 the complex multiplier includes adjustment means for adjusting either or both of the phase or gain of one of the In- phase and Quadrature-phase signals relative to the other. In relatively simple cases, it may be advantageous to use first-order adjustment means. However, in some cases it may be advantageous to use higher-order adjustment means. [0010] The adjustment means is particularly advantageous in the present invention because it helps to overcome a 5 previously perceived difficulty associated with using a VLIF which is larger than half the channel spacing. The drawback is that as the VLIF is increased, so the band-width of the analogue to digital converter (adc) must be increased, and this in turn increases the amount of the negative alternate channel which is admitted by the adc; it also thus increases the amount of this negative alternate channel which, as an image, appears in the bandwidth of the wanted signal and which must be removed by the complex multiplier. By providing first or even second-order phase and gain adjustment 10 means, it is possible to set the image rejection to zero (i.e. such that the amount of image components appearing in the base-band signal as noise after passing through the complex multiplier is substantially zero) for one (in the case of first order adjustment means) or even two or more (in the case of second or higher order adjustment means) specific frequencies. In this way, judicious setting of the adjustment means can minimise the effects of the negative alternate channel (which in many systems may in fact be much larger than either adjacent channel). 15 [0011] Preferably, the apparatus includes an adc, which preferably takes the form of an over-sampled sigma delta adc, located to receive the complex IF signal and to convert it into a digital signal. [0012] Preferably, the apparatus is formed on an integrated circuit which advantageously includes transmission circuitry for transmitting signals. Ideally, the apparatus and the transmission circuitry share a number of components such as the local oscillator. 20 Brief Description of the Drawings [0013] In order that the present invention may be better understood, an embodiment thereof will now be described by way of example only, with reference to the accompanying drawings in which:- 25 Figure 1 is a block diagram of a radio receiver in accordance with the present invention; Figure 2 is a diagram illustrating the signal processing performed by the radio receiver of Figure 1 using a wanted GMSK signal and a single negative adjacent channel GMSK signal as an example input to the receiver; 30 Figure 3 is a diagram illustrating the signal processing performed by the radio receiver of Figure 1 using a wanted GMSK signal and a single negative alternate channel GMSK signal as an example input to the receiver; Figure 4 is a block diagram of a first order complex balanced multiplier suitable for use in the receiver of Figure 1; 35 and Figure 5 is a block diagram similar to Figure 4 showing an alternative complex balanced multiplier suitable for use in the receiver of Figure 1.

Load more