Introducing NXP's I.MX 8M Nano Applications Processor

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Introducing NXP’s i.MX 8M Nano Applications Processor

Amanda McGregor Senior Product Manager Consumer and Industrial i.MX Applications Processors

December 2019

PUBLIC Agenda

• Extending decades of success in i.MX

• Meet the i.MX 8M Nano; NXP’s newest applications processor for edge computing

• Addressing your design challenges; i.MX 8M Nano best practices for system design

• Real world application examples of how you can use i.MX 8M Nano in your product

• NXP and its partner ecosystem gets your i.MX 8M Nano development on the fast-track

PUBLIC 1 Extending Decades of Success in i.MX Applications Processing

PUBLIC 2 Trust. Scalability. Support

PUBLIC 3 SECURE CONNECTIONS FOR THE SMARTER WORLD

4 CONFIDENTIAL AND PROPRIETARY PUBLIC USE 4 i.MX – Trust. Scalability. Support. Longevity. Industry-leading Portfolio of Arm® Cortex-A General Purpose MPUs

• i.MX21 • i.MX 6QP • i.MX23 • i.MX 6DP • i.MX25 • i.MX 6DL • i.MX27 • i.MX 6S • i.MX28 • i.MX 6SX • i.MX31 • i.MX 6SL • i.MX35 • i.MX 6SLL • i.MX50 • i.MX 6UL • i.MX51 • i.MX 6ULL • i.MX53 • i.MX 6ULZ • i.MX 6Q • i.MX 7S/D • i.MX 6D • i.MX8M

New in 2019! • i.MX 8M Mini • i.MX 8M Nano • i.MX 8QM • i.MX 8QP • i.MX8X • i.MX 7ULP PUBLIC 5 i.MX – Trusted Long-term Supplier

• NXP understands that your applications require product longevity − Design cycles can be extensive due to required end-product certifications − Many industrial devices are required to ship for many years post-certification

• NXP has committed to 10- and 15-year supply longevity options − Formal program with products listed at www.nxp.com/productlongevity

PUBLIC 6 i.MX – For Extreme Operating Conditions

• Minimum 10-year product operating life with continuous operation • Product operating life application notes available on www.nxp.com

• Extreme temperature conditions for industrial • As low as -40o C junction temperature for cold start • Up to 105o C junction temperature for hot operation

• Low power consumption for fanless designs achieved through process technology selection, design innovation, dedicated hardware accelerators, and software optimizations

• Small footprint for space-constrained designs

• Automotive options on some devices (AEC-Q100) as well as extended temperature operating conditions (up to 125o C junction temperature)

PUBLIC 7 NXP and i.MX – Trusted Security Partner

TrustZone Secure Real Time Clock

High Hardware Random i.MX Trust Assurance Number Generator Boot Architecture

Secure Hardware Storage Firewall Device Hardware Configurations Content Cryptographic Protection Accelerators

Tamper Secure Detection Debug PUBLIC 8 i.MX Market Leading Ecosystem and Support

Professional Commercial Engineering Services Software Products 1000’s of i.MX Enablement Customers 100’s of Partners i.MX i.MX Field Support i.MX i.MX Factory Support

Greater than 4,000 members 3500 new pieces of content added every year Forums – Discussions – Groups – Blogs Posts – News – Multimedia Gallery – Training

PUBLIC 9 Meet the i.MX 8M Nano NXP’s Newest Quad-core Applications Processor for Secure, Intelligent and Cost-Effective Edge Computing

PUBLIC 10 i.MX 8M Family: Extends Across Multiple Applications

i.MX 8M NOW A53 • 8M Quad i.MX 8M family M4/M7 • 8M QuadLite Advanced Computing, Audio/Video & Voice • 8M Dual

NOW • High Performance Computing i.MX 8M Mini • 8M Mini Quad • Video Encode/Decode • 8M Mini QuadLite • 3D GPU • 8M Mini Dual • Display/Camera • 8M Mini DualLite • 8M Mini Solo • High Speed Interfaces • 8M Mini SoloLite • High-end Audio Support • Hardware Scalability NOW Compatible Software i.MX 8M Nano • Software Scalability • 8M Nano Quad

• Industrial and Consumer • 8M Nano QuadLite Compatible Pin-to-pin • 8M Nano Dual • 8M Nano DualLite Similar ‘look and feel’ to the popular • 8M Nano Solo i.MX 6 series, but with upgraded • 8M Nano SoloLite performance and features PUBLIC 11 i.MX 8M Nano Key Features

Secure, Connected, Cost-Effective Edge Processing

Power Efficient Media-rich: Size- and Industrial and and Scalable Graphics, Audio, Cost-optimized Commercial, Performance User Interface System Design Longevity of Supply • Built in 14LPC FinFET • 3D GPU supports • Cost optimized package • Up to -40C to 105C • 1x-4x Cortex-A53 up to OpenGL® ES2.0/3.0/3.1, delivers 6-layer board junction temperature and Vulkan®, OpenCL™ 1.2 design with no microvias qualification for industrial 1.5GHz per core • 1080p display (MIPI-DSI) • Support for LPDDR4, • Up to 10 year continuous • Cortex-M7 up to 750MHz • Camera input (MIPI-CSI) DDR4, DDR3L memory operation for industrial for task offload, power • USB 2.0, 10/100/100 • Direct connection of • Minimum 10 year supply optimizations, security Ethernet with IEEE1588 PDM microphones longevity on commercial • Pin-compatible with i.MX and AVB timestamping • NXP supported Android and industrial devices 8M Mini applications • Advanced audio support and Linux BSPs, and processor includes hardware ASRC other enabling software

PUBLIC 12 Looking Inside the i.MX 8M Nano

Display Vision • 4-lane MIPI-DSI • 4-lane MIPI-CSI

3D GPU OpenGL ES3.1 512KB OCRAM Arm Vulkan Arm OpenCL 1.2 Cortex-A53Arm Cortex-A53Arm Arm Up toCortex-A53 1.5GHz Up toCortex-A53 1.5GHz Cortex-M7 Up to 1.5GHz Up to 1.5GHz RDC Up to 750MHz

Connectivity • USB 2.0, Ethernet 10/100/1000 Security • SPI, I2S, UART, PDM

PUBLIC 13 i.MX 8M Nano Provides Connectivity and Performance i.MX 8M Nano RDC (resource Security Main CPU Platform Connectivity & I/O domain controller) MIPI-CSI 4-lane with PHY TrustZone Quad/Dual Corte-A53 Quad/Dual ortex-A53 enables flexible, Quad Cortex-A53 MIPI-DSI 4-lane with PHY DRM Ciphers 32KB32KB I-cache I-cache 32KB32KB D-cache D-cache 32KB I-cache 32KB D-cache secure mapping of 32KB I-cache 32KB D-cache NEON Secure Clock NEON FPUFPU S//PDIF, 10x SAI NEON FPU peripheral to NEON FPU (10Tx + 10Rx I2S lanes) Cortex-A or Cortex- eFuse Key Storage TDM, DSD512 512KB L2 Cache M core Random Number 8ch PDM Input Low Power, Security CPU 32KB Secure RAM 10/100/1000 Ethernet (IEEE 1588, EEE & AVB) Cortex-M7 System Control 1x USB2.0 OTG + PHY 256KB TCM (SRAM) RDC 4x UART 5Mbps

2 Smart DMA x3 On-Chip RAM (OCRAM) 4x I C XTAL 512KB OCRAM 3x SPI Package PLLs External Memory Multimedia • FCBGA 14x14mm, Watchdog x3 x16 LPDDR4-3200 0.5mm pitch de-pop array 3D Graphics: GC 7000UL DDR4-2400, DDR3L-1600 2 shaders Qualification PWM x4 OpenGL ES 2.0/3.0/3.1 3x SDIO3.0/eMMC5.0/5.1/SD3.0 • Consumer (0 to +95C) Timer x6 Vulkan OpenCL 1.2 Dual-ch QuadSPI (XIP) • Industrial (-40C to +105C, Secure JTAG ASRC 10yr 24/7) applications Temperature Sensor NAND Controller (BCH62) Longevity • 10yr longevity program Differences to i.MX 8M Mini (minimum) PUBLIC 14 i.MX 8M Nano Target Applications Smart Building Control and Automation, HMI, Appliances, Healthcare, Audio, Intelligent Edge Processing

• Portable audio devices • Smart appliances • Barcode or image scanner • Mobile patient care, e.g. • Networked speakers • Video doorbell • Industrial printer infusion pump, respirator • Wireless speakers • Smart lighting control • Ruggedized HMI • Blood pressure monitor • Voice assistance • HVAC climate control • Machine visual inspection • Activity/wellness monitor • Soundbars • IoT gateway • Factory automation • Exercise equipment • Audio/video receiver • Service robot, e.g. vacuum, • Test and measurement • Public address systems mower, cleaner • Mobility and logistics • Elevator control panel

PUBLIC 15 Addressing your design challenges i.MX 8M Nano best practices for system design

PUBLIC 16 Design Challenge #1: Memory Selection

Feature DDR3L DDR4 LPDDR4 • Considerations when selecting • More • Highest performance your memory may include: • Lowest performance density than DDR3L • Lowest run and idle − Available density (low, high) Advantages offering mode power suits − Memory cost (today) • Lower power power-constrained than DDR3L applications − Performance − Lowest power Bus Width x8, x16 x4, x8, x16 x16 − Longevity Voltage 1.35V 1.2V 1.1V

• NXP enables all three memory 2133MT/s 3200MT/s 4267MT/s Maximum types on the i.MX 8M Nano, Speed *i.MX 8M Nano *i.MX 8M Nano supports *i.MX8M Nano supports supports 1600MT/s 2400MT/s 3200MT/s with software enablement and proven reference designs

PUBLIC 17 Design Challenge #2: PCB Design and Layout

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

DRAM_D DRAM_D DRAM_D DRAM_D ECSPI2_ ECSPI1_ ECSPI2_ MIPI_DSI MIPI_DSI MIPI_DSI MIPI_DSI MIPI_DSI MIPI_CSI MIPI_CSI MIPI_CSI MIPI_CSI MIPI_CSI PCIE_RX PCIE_TX PCIE_CL USB1_D USB2_D PMIC_O RTC_XT A VSS ONOFF VSS A QS0_P Q06 M0 Q00 SS0 MISO MISO _D0_N _D1_N _CLK_N _D2_N _D3_N _D0_N _D1_N _CLK_N _D2_N _D3_N N_N N_N K_N N N N_REQ ALI

DRAM_D DRAM_D DRAM_D DRAM_D ECSPI1_ ECSPI1_ ECSPI2_ MIPI_DSI MIPI_DSI MIPI_DSI MIPI_DSI MIPI_DSI MIPI_CSI MIPI_CSI MIPI_CSI MIPI_CSI MIPI_CSI PCIE_RX PCIE_TX PCIE_CL USB1_D USB2_D RTC_XT 24M_XTA B VSS POR_B VSS B Q05 QS0_N Q07 Q01 SS0 MOSI MOSI _D0_P _D1_P _CLK_P _D2_P _D3_P _D0_P _D1_P _CLK_P _D2_P _D3_P N_P N_P K_P P P ALO LI

DRAM_D 24M_XTA JTAG_TR C VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C Q04 LO ST_B

DRAM_D DRAM_D DRAM_A ECSPI1_ I2C2_SD I2C2_SC I2C4_SC MIPI_VR UART3_T PCIE_RE TEST_M JTAG_M D USB1_ID USB2_ID D Q03 Q02 C11 SCLK A L L EG_CAP XD SREF ODE OD

DRAM_D DRAM_D DRAM_A ECSPI2_ I2C1_SC I2C3_SC I2C4_SD UART1_ UART2_T UART3_ USB1_TX USB2_TX PMIC_ST JTAG_TD JTAG_TD E VSS VSS E Q14 Q15 C10 SCLK L L A RXD XD RXD RTUNE RTUNE BY_REQ O I • DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A I2C1_SD I2C3_SD UART1_T UART2_ UART4_T UART4_ USB1_VB USB2_VB RTC_RE JTAG_TC JTAG_T The i.MX 8M Nano package has been designed to F VSS VSS F M1 Q08 C00 C01 C06 A A XD RXD XD RXD US US SET_B K MS

DRAM_D DRAM_D VDD_PCI_ BOOT_M BOOT_M G VSS VSS VSS VSS VSS VSS VSS VSS G QS1_P Q09 1P8 ODE0 ODE1

DRAM_D NVCC_ECS VDD_MIPI VDD_USB_ CLKOUT H VSS VSS CLKIN1 H QS1_N PI _1P8 1P8 1

TSENSO TSENSO DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A VDD_DRA NVCC_UAR PVCC2_1P VDD_MIPI VDD_MIPI VDD_PCI_ VDD_USB_ NVCC_SNV CLKOUT J VSS VSS NVCC_I2C NC_J18 VSS R_TEST_ R_RES_ VSS CLKIN2 J address both size and manufacturability Q10 Q11 C03 C07 C08 M T 8 _0P9 _1P2 0P8 0P8 S_1P8 2 OUT EXT

DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A NVCC_DRA NVCC_DRA VDD_USB_ VDD_SNVS NAND_D NAND_D NAND_D NAND_C K VSS VSS VDD_VPU VDD_VPU VDD_SOC VDD_SOC VSS VSS VSS K Q13 Q12 C02 C14 C09 M M 3P3 _0P8 ATA02 ATA01 ATA06 LE

DRAM_A DRAM_A NVCC_DRA VDD_DRA VDD_ANA NVCC_JTA NAND_D NAND_C L VDD_VPU VSS VDD_VPU VDD_SOC VSS VDD_SOC L C05 C04 M M _0P8 G ATA05 E3_B

DRAM_A DRAM_A NVCC_DRA NAND_D NAND_C M VSS VDD_VPU VDD_VPU VDD_SOC VSS NVCC_CLK M C16 C17 M ATA04 E2_B

DRAM_A DRAM_A DRAM_A DRAM_A DRAM_A NVCC_DRA NVCC_DRA VDD_DRA VDD_ANA VDD_24M VDD_ANA NAND_A NAND_D NAND_C NAND_D NAND_R N VSS VSS VDD_VPU VSS VDD_SOC VDD_SOC VSS VDD_SOC VSS VSS N C26 C19 C12 C13 C15 M M M _0P8 _XTAL_1P8 1_1P8 LE ATA03 E0_B ATA07 E_B VDD_DRA VDD_DRA DRAM_V DRAM_Z NVCC_DRA VDD_ARM VDD_ANA NAND_D NAND_R NAND_C P VSS M_PLL_1P M_PLL_0P VDD_GPU VSS VSS VSS VSS P REF N M _PLL_0P8 1_1P8 ATA00 EADY_B E1_B 8 8

DRAM_R DRAM_A DRAM_A DRAM_A DRAM_A NVCC_DRA NVCC_DRA VDD_DRA VDD_ARM NAND_D SD1_RE SD1_STR NAND_W NAND_W R VSS VSS VDD_GPU VSS VDD_ARM VDD_ARM VSS VDD_SOC VDD_SOC VSS VSS VSS R ESET_N LERT_N C32 C33 C27 M M M _PLL_1P8 QS SET_B OBE E_B P_B

DRAM_A DRAM_A NVCC_DRA PVCC1_1P SD1_DAT SD1_DAT T VSS VDD_ARM VDD_ARM VDD_ARM VSS T C34 C35 M 8 A3 A2

DRAM_A DRAM_A NVCC_DRA VDD_DRA NVCC_NA SD1_DAT SD1_DAT U VDD_GPU VSS VDD_ARM VDD_ARM VSS VDD_SOC VDD_SOC U C25 C24 M M ND A5 A4 • Delivered in a 14x14mm BGA package, 0.5mm DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A NVCC_DRA NVCC_DRA NVCC_SAI SD2_DAT SD2_DAT SD1_CM V VSS VSS VDD_GPU VDD_ARM VDD_ARM VDD_ARM NVCC_SD1 VSS NVCC_SD2 VSS SD1_CLK V Q21 Q20 C23 C36 C29 M M 2 A3 A2 D

DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A VDD_DRA NVCC_GPI NVCC_SAI NVCC_SAI NVCC_ENE SD2_CM SD1_DAT SD1_DAT W VSS VSS VDD_GPU VDD_ARM VDD_ARM VDD_ARM VDD_ARM VSS SD2_CLK VSS W Q18 Q19 C22 C37 C28 M O1 5 1 T D A7 A6

DRAM_D NVCC_SAI VDD_ANA SD1_DAT SD1_DAT Y VSS VSS VSS Y QS2_N 3 0_1P8 A1 A0 pin pitch, 486 pins, with de-populated array: DRAM_D DRAM_D VDD_ANA SD2_CD_ AA VSS VSS VSS VSS VSS VSS VSS VSS SD2_WP AA QS2_P Q17 0_1P8 B

DRAM_D DRAM_D DRAM_A DRAM_A DRAM_A GPIO1_I GPIO1_I PVCC0_1P SAI5_RX SAI1_MC SAI1_TX SAI2_RX SD2_DAT SD2_DAT SD2_RE ENET_M AB VSS VSS AB M2 Q16 C20 C21 C38 O15 O12 8 FS LK FS C A0 A1 SET_B DIO

DRAM_D DRAM_D DRAM_A SAI3_TX GPIO1_I GPIO1_I SAI5_RX SAI5_RX SAI5_RX SAI1_TX SAI2_RX SAI2_TX SAI2_RX ENET_R ENET_M AC VSS VSS AC Q22 Q23 C30 FS O14 O11 D3 D1 C C FS D0 D0 D3 DC

DRAM_D DRAM_D DRAM_A SAI3_MC GPIO1_I GPIO1_I SAI5_RX SAI5_MC SAI5_RX SAI2_MC SAI2_TX SAI2_TX ENET_R ENET_R AD AD Q27 Q26 C31 LK O13 O10 D2 LK D0 LK C FS D2 D1 − Enables 6-layer board design with high-speed DDR DRAM_D ENET_R ENET_R AE VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AE Q28 XC D0

DRAM_D DRAM_D DRAM_D DRAM_D SAI3_TX SAI3_RX SPDIF_E SPDIF_T GPIO1_I GPIO1_I GPIO1_I GPIO1_I GPIO1_I SAI1_RX SAI1_RX SAI1_RX SAI1_RX SAI1_RX SAI1_TX SAI1_TX SAI1_TX SAI1_TX ENET_T ENET_T ENET_T ENET_R AF VSS AF Q29 QS3_N Q31 Q25 D D XT_CLK X O09 O07 O05 O03 O01 D1 C D3 D5 D7 D1 D3 D5 D7 X_CTL D3 D1 X_CTL

DRAM_D DRAM_D DRAM_D DRAM_D SAI3_TX SAI3_RX SAI3_RX SPDIF_R GPIO1_I GPIO1_I GPIO1_I GPIO1_I GPIO1_I SAI1_RX SAI1_RX SAI1_RX SAI1_RX SAI1_RX SAI1_TX SAI1_TX SAI1_TX SAI1_TX ENET_T ENET_T ENET_T AG VSS VSS AG QS3_P Q30 M3 Q24 C C FS X O08 O06 O04 O02 O00 D0 FS D2 D4 D6 D0 D2 D4 D6 XC D2 D0 (saves $)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Top View Bottom View − Can use low cost drilled vias; no high-cost laser microvias are required (saves $) − 3.2 mil trace and space escape (manufacturability) − Optimized power placement accommodates decoupling capacitors under the BGA (efficiency)

• NXP provides reference schematics and layouts on NXP.com to help you implement our design know-how and best practices

Example Layout PUBLIC 18 Design Challenge #3: Designing for Scalability i.MXi.MX 8M8M NanoMini

• Design your hardware once, scale your product performance and features

• Same base board (8MMINI-BB) used in both EVKs

• Same compute module design, different memory chip, different SoC (i.MX 8M Nano or i.MX 8M Mini)

• Further scalability through part number selection (i.MX 8M Nano – number of Cortex-A53 cores, GPU) (i.MX 8M Mini – number of Cortex-A53 cores, VPU

• Design compatibility guide and NXP proven reference design available to you at www.nxp.com/8mnanoevk

PUBLIC 19 i.MX 8M Nano Applications Processors Cost-optimized, high-performing applications processor for consumer and industrial applications Voice Assistants AI, Machine Vision Industrial IoT Edge Compute

ARM CPU Video 3D GPU Display / Camera Audio I/O Connectivity I/O Cortex-A53 | Cortex-M7 • No • 2 Vec4 Shader • Single display • >20-channels • 1x USB 2.0 • A53 up to 1.5GHz hardware • OpenGL® ES • MIPI-DSI 4-lane • 32-bits @ • 3x SDIO • Quad – 4x A53 video 2.0/3.0/3.1 • MIPI-CSI 4-lane 768kHz • 1x GbE i.MX 8M Nano Quad • Dual – 2x A53 acceleration • Vulkan • DSD512, TDM

• x16 LPDDR4, Compatible Pin 0.5mm, 14x14 • Solo – 1x A53 i.MX 8M Nano Dual – can • OpenVG 1.1 • SPDIF Tx & Rx DDR4, DDR3L

• M7 up to 750MHz Compatibility Software i.MX 8M Nano Solo implement • OpenCL™ 1.2 • 8-ch PDM MIC in SW • ASRC Up 15,000Up to DMIPS

ARM CPU Video 3D GPU Display / Camera Audio I/O Connectivity I/O Cortex-A53 | Cortex-M7 • No No HW graphics • Single display • >20-channels • 1x USB 2.0 • A53 up to 1.5GHz hardware acceleration • MIPI-DSI 4-lane • 32-bits @ • 3x SDIO • Quad – 4x A53 video • MIPI-CSI 4-lane 768kHz • 1x GbE i.MX 8M Nano QuadLite • Dual – 2x A53 acceleration • DSD512, TDM • x16 LPDDR4, i.MX 8M Nano DualLite • Solo – 1x A53 – can • SPDIF Tx & Rx DDR4, DDR3L • M7 up to 750MHz i.MX 8M Nano SoloLite implement • 8-ch PDM MIC in SW • ASRC Up 15,000Up to DMIPS

PUBLIC 20 Real world application examples Ideas for how you can use i.MX 8M Nano in your product

PUBLIC 21 i.MX 8M Nano for Smart Connected Appliances

3D GPU Required for Android Display OpenGL ES3.1 • 4-lane MIPI-DSI Vulkan • 1080p LCD OpenCL 1.2 Class B Libraries

Arm Android OS Arm Cortex-A53Arm Cortex-A53Arm Arm Key Features: Up toCortex-A53 1.5GHz Up toCortex-A53 1.5GHz Cortex-M7 Up to 1.5GHz • Quad-core for Up to 1.5GHz Up to 750MHz Android & UI • 3D GPU • MIPI-DSI • Wi-Fi Connectivity Security • USB 2.0, Ethernet 10/100/1000 • High Assurance Boot • Low Power • SDIO (Wi-Fi) Memory: • OTA Updates • x16 2GB LPDDR4- • SPI, I2S, UART (Idle) 3200/DDR4-2400 • eMMC PUBLIC 22 i.MX 8M Nano for Smart Access Control

Display Camera • 4-lane MIPI-DSI • 4-lane MIPI-CSI • 1080p LCD • 1080p LCD

3D GPU Linux OS plus OpenGL ES3.1 Arm Vulkan Wake Word Detect Face Recognition Arm OpenCL 1.2 Cortex-A53Arm (e.g. MobileFaceNets) Cortex-A53Arm Arm Up toCortex-A53 1.5GHz Up toCortex-A53 1.5GHz Cortex-M7 Up to 1.5GHz Up to 1.5GHz Up to 750MHz Key Features: • Quad-core for Linux and face recognition Connectivity • MIPI-CSI • USB 2.0, Ethernet 10/100/1000 Security Memory: • SDIO (Wi-Fi) • High Assurance Boot • Low Power (Idle • SPI, I2S, UART, PDM (microphone) • x16 1GB DDR3L-1600 and Standby) • eMMC

PUBLIC 23 Fast-track your i.MX 8M Nano design NXP and its partner ecosystem gets your i.MX 8M Nano development on the fast-track with boards, software and design collateral

PUBLIC 24 How NXP Gets You Up and Running Fast with i.MX 8M Nano Pin-compatibility High-speed DDR4-2400 with i.MX 8M Mini design is implemented lets you re-use your and proven same base design • LPDDR4 reference design also available on NXP.com Wi-Fi/BT module 6-layer board design soldered down on compute module, with i.MX 8M Nano, no enabled out-of-the-box microvias needed • Multiple Wi-Fi/BT module vendors can be enabled

BOM optimized PMIC with proven software enablement

25 GENERAL BUSINESS INFORMATION i.MX 8M Nano Evaluation Kit Part Number: Available NOW 1. 8MNANOD4-EVK i.MX 8M Nano / DDR4 / eMMC / Type1MW (CYW43455)

EVK: Compute Module EVK: Base Board • NXP i.MX 8M Nano Quad • Same base board for i.MX 8M Mini • Wi-Fi/BT module: and i.MX 8M Nano • Linux 4.14 (5.4 in 2020) • Murata Type 1MW • Display Connector: 1x mini-SAS • Android 9 (Android 10 in 2020) (CYW43455) MIPI-DSI • FreeRTOS (Cortex-M) rd • Dual band 2.4G/5G • Camera connector:1x mini-SAS • Others: 3 parties • 802.11a/b/g/n/ac MIPI-CSI (1x1) • Audio DAC (WM8524) • BT/BLE 5.0 • Microphone/headphone jacks • NXP Wi-Fi in 1Q20 • 1x full-size SD/MMC card slot Kit Contents • PMIC • 10/100/1000 Ethernet port OV5640 5Mpix MIPI CSI camera • i.MX 8M Nano board. • 2GB DDR4 (AR8031 Gigabit PHY) miniSAS based • MIPI-DSI to HDMI adapter board • LPDDR4 reference • 1x USB 3.0 Type C MINISASTOCSI with 8” mini-SAS cable. schematics available • Connectivity expansion connector: • USB Micro-B cable. • DDR3L reference • M.2 connector • USB Type-C cable. schematics in 2Q20 • Audio expansion connector: OLED • USB Type-C to A adapter. • 16GB eMMC 5.1 • FPC 0.5mm pitch 60pin ZIF MIPI DSI panel • USB Type C power supply. • 64MB QSPI Flash • UART, I2S miniSAS based • Android BSP image pre- • 6-layer PCB, No HDI • General purpose expansion 5.5”, 1920 x 1080 programmed. • Size 2”x2” connector (RPI-like): MX8-DSI-OLED1 • Not sold separately. • UART, I2S • NXP PN7150RPI board 26 GENERAL BUSINESS INFORMATION supported via this interface • Size 4.2”x4.2” i.MX 8M Nano Embedded Board Solutions Available Today!

Board Partner Website

Boundary Devices https://www.boundarydevices.com/

Variscite https://www.variscite.com/

Digi https://www.digi.com

Ka-Ro https://www.karo-electronics.com

Toradex https://www.toradex.com

Congatec https://www.congatec.com/

BCM https://www.bcmcom.com/

PUBLIC 27 i.MX 8M Nano – Get Started Today! • www.nxp.com/imx8mnano • Product documentation • Ordering information

• www.nxp.com/imx8mnanoevk • Design files (DDR4, LPDDR4) • Hardware design guides • Ordering information

• www.nxp.com/imxsw • Linux and Android BSPs • Programming tools, pinmux tools, code-signing tools

• www.nxp.com/imxcommunity • Engineering technical support

PUBLIC 28 A World of Smart Possibilities i.MX 8M Nano Applications Processors for Smart Homes, Buildings and Industries

PUBLIC 29