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A 2-D Numerical Study of Microscale Phase Change Material Thermal Storage for Gan Transistor Thermal Management

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A 2-D Numerical Study of Microscale Phase Change Material Thermal Storage for Gan Transistor Thermal Management A 2-D Numerical Study of Microscale Phase Change Material Thermal Storage for GaN Transistor Thermal Management Xudong Tang, Richard Bonner, Tapan Desai, Angie Fan Advanced Cooling Technologies, Inc 1046 New Holland Ave, Lancaster, PA 17601 [email protected] Abstract Symbols A novel thermal management technology was explored to Two phase ratio lower the peak temperature associated with high power GaN Density transistors in pulse application. The technology involves the ∆ Latent heat use of an embedded microscale PCM heat storage device within the chip (near the active channels of the GaN device), ∆ Time step which effectively increases the heat capacity of the material ∆ Mesh size in X axis by taking advantage of the latent heat of the PCM. In this ∆ Mesh size in Y axis study, 2-D transient thermal models were developed to Subscripts characterize the thermal behavior of GaN transistors with micro-scale PCM heat storage device. The model is capable of PCM melt front computing the spatial-temporal temperature distribution of the , PCM liquid phase GaN transistor as it is rapidly pulsed and captures the , PCM solid phase formation and evolution of hot spots that form within the , , , East, West, North, South mesh nodes device. The model also captures the PCM melting behavior GaN‐to‐Si interface and latent heat absorption during the transient. PCM‐to‐Substrate interface The use of a PCM can effectively control the hot spot Si‐to‐PCM interface temperature by absorbing a significant portion of the transient Si‐to‐Substrate interface heat input. As shown in this modeling study, the use of PCM heat storage in GaN transistors reduces the GaN hot spot 1. Background temperature for a given heat input. Alternatively, the maximum allowable GaN heat input can be increased with the use of PCM. At a given heat input flux of 5×105 W/cm2, for example, the use of PCM heat storage can lower the peak temperature by 21~22°C, relative to transistors without PCM (baseline), regardless of the duty cycle ratio. In addition, a transistor with PCM heat storage can accommodate much higher joule heat generation without exceeding the maximum allowable temperature limit, 180°C. In this study, the modeling results show that by integrating a PCM that has a 140°C melting point in a 5m×6m groove configuration, the critical heat flux can be increased from 13.34×105 W/cm2(baseline) to 16.8×105 W/cm2(with PCM), a 26% improvement. Key PCM design parameters were identified in this Figure 1: Structure of the unit cell of a GaN power modeling study: (1) PCM amount; (2) PCM melting point; amplifier. (The field plate structures are not shown) and (3) PCM groove structure. Their coupling and the impact In recent years, wide bandgap transistors (SiC MESFETs on design optimization require further investigation. and GaN HEMTs) have appeared on the market for high Keywords power RF/microwave transistors [1, 2]. They offer higher GaN Transistor, Thermal Modeling, PCM, Heat Storage power density and higher voltage operation, which are associated with lower parasitic capacitances and higher load- Nomenclature line dynamic resistance, and hence can be used in wider Interfacial thermal resistance bandwidth applications. However, heat removal from these Specific heat semiconductor devices and electronic packages remains a Internal energy in a control volume critical issue in the chips’ electrical performance and life Thermal conductivity cycle [3, 4]. With a continuing increase in the levels of Q Heat flux integration and the introduction of new chip and interconnect Time architectures, the background heat fluxes have become very Temperature high and must be rejected. The heat removal challenge is further exacerbated by the "pulsed" operation, where rapid Velocity 0-7803-XXXX-X/11/$25.00 ©2011 IEEE 27 27th IEEE SEMI-THERM Symposium temperature transients are continuously experienced in chips inactive times, heat can be dissipated as the liquid phase PCM of many communication applications. re-solidifies. By using PCM with an appropriate melting As shown in Figure 1, a typical state-of-the-art GaN power point, the peak junction temperature can be reduced and the amplifier for communication and radar applications, with a transient temperature fluctuation can be stabilized, which can output power of 450W and an efficiency of 65%), operates in result in improved device reliability. a pulsed mode of 2 s pulse width with 100 s period at 3.4 GHz, which has an average heat dissipation of ~30-50 W/mm2. Figure 2 illustrates the heat generation within a typical semiconductor transistor. The heat flux generated from these individual transistors is then conducted through multiple layers of various metals, interface materials, etc. in what is commonly known as the thermal stack-up. Each layer adds to the overall thermal resistance of the device, resulting in high peak junction temperatures. Figure 3: Lattice temperature distribution in standard AlGaN/GaN HEMTs using Silvaco ATLAS (Vds=30V, Vgs=0V, 30nm thick GaN buffer). This paper focuses on a 2-D transient thermal model for GaN transistors needed to evaluate the effectiveness of the microscale PCM thermal storage mechanism for reducing peak junction temperatures and improving thermal stability. Figure 2: Schematic detailing heat generation within a This modeling effort was supported by parallel research transistor [5] efforts devoted to (1) a transistor level molecular dynamics (MD) simulations to simulate the heat flow amongst various Simulations of the cross-sectional profile of the lattice nanometer sized transistor materials, and (2) a Boltzmann temperature distribution in standard AlGaN/GaN HEMTs Transport Equations (BTE) model to calculate heat generation using Silvaco ATLAS were performed [6]. A representative and transport in GaN by taking into account the non- simulation shows in Figure 3 for a standard AlGaN/GaN equilibrium nature of electrons and phonons. Key parameters, HEMT heat is generated in the GaN channel due to the joule such as interfacial boundary resistances from MD simulation heating and the hottest temperature occurs in the AlGaN and and hot spot joule heating from BTE modeling, were GaN layers around the corner of the gate contact close to the incorporated to improve the model fidelity. The thermal drain. This is due to the high electric field and the large model is therefore a useful tool to characterize the overall current density in the region. During operation, GaN device transient thermal behavior of high power transistors in pulse hot spot temperatures in transistors can oscillate between operation, and also provide preliminary guidelines to 180°C and 80°C during the rapid transients. Continuous microscale PCM thermal storage design for GaN transistor thermal cycling and high maximum junction temperatures thermal management. cause cyclical thermal stresses that may lead to reduced 2. Numerical Methodology reliability. Directly dissipating such a large amount of waste A typical unit cell of a GaN transistor is shown in Figure heat during the short pulse operation while maintaining the 1. It includes two sources, two gates, and one drain. When an GaN device temperature within the limit is becoming electric field is applied to the transistor, electric current flows impracticable, and therefore requires advanced chip/die level in the GaN channel from the sources to the drain, which thermal management. results in joule heating due to the energy transfer from the A micro-scale thermal storage approach was therefore electrons to the lattices. The heat is eventually dissipated investigated in this work and takes advantage of the transient through the GaN buffer and substrate to a heat sink. As pulse behavior common to high power transistors in indicated in Figure 3, most of the heat is generated at two communication applications. The idea is to increase the locations around the corner of the gate contact close to the effective heat capacity of the material near the active channels drain. of the GaN devices by embedding a phase change material (PCM, material that changes phase between liquid and solid at a given temperature) in close proximity to the active channels. During the heat generating pulses of each duty cycle, the heat generated in the GaN devices can be temporarily stored in the heat of fusion of the solid phase PCM as it melts. During Tang, A 2-D Numerical Study of Microscale Phase Change … 27th IEEE SEMI-THERM Symposium the unit cell. At the bottom of the unit cell, the substrate surface evenly dissipated the heat to a 25°C heat sink. Interfacial boundary thermal resistances were provided for every two adjacent layers. The Si-to-PCM interfacial thermal -8 2 resistance, = 2.7×10 K·m /W, was obtained by MD analysis. The initial temperature in the entire unit cell was set as the same as the heat sink temperature. Regarding the selection of the PCM, desirable properties for the chip-level transient thermal storage and release include: (1) an adequate melting temperature, (2) a high thermal conductivity, and (3) commercially available. Based on these criteria, low-melting temperature metals and binary alloys stand out. Solder PCM, such as Indium or Indium/Tin alloy, were therefore chosen in this research over normal wax based PCM, because of their higher thermal conductivity (34- Figure 4: Thermal model of a GaN Transistor Unit Cell 81W/m-K), adequate melting point (118-160°C), substantial with Micro-Scale PCM Groove. fusion heat (~29 kJ/kg), and commercial availability. A The concept of a GaN transistor embedded with summary of the material used in the transistor unit cell model microscale PCM thermal storage device is described in Figure are listed in Table 1. 4. The channel length (~100m) is usually much longer than The PCM volume expansion/contraction due to the density the channel width.
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